[X86] Fix crash caused by not properly marking visited registers in Domain Reassignment pass

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Summary

The registers added to closures were not marked as such, causing registers to be in multiple closures.
In some cases (like the added test) this caused an assertion to fail.

lib/Target/X86/X86DomainReassignment.cpp

void Closure::visitRegister(unsigned Reg, SmallVectorImpl<unsigned> &Worklist) {
   RegDomain RD = getDomain(MRI->getRegClass(Reg), MRI->getTargetRegisterInfo());
   // First edge in closure sets the domain.
   if (Domain == NoDomain)
     Domain = RD;
 
   if (Domain != RD)
     return;
 
+  EnclosedEdges.insert(Reg);
   Worklist.push_back(Reg);
 }
 
 void Closure::encloseInstr(MachineInstr *MI) {
   auto I = EnclosedInstrs.find(MI);
   if (I != EnclosedInstrs.end()) {
     if (I->second != this)
       // Instruction already belongs to another closure, avoid conflicts between

test/CodeGen/X86/gpr-to-mask.ll

 
 exit:
   %val = phi i8 [%and, %if], [%add, %else]
   %mask = bitcast i8 %val to <8 x i1>
   %selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
   store <8 x float> %selected, <8 x float>* %fptrvec
   ret void
 }
+
+define void @test_sel(i32 %in, double %d1, double %d2, i32* %ptr) {
+; X86-64-LABEL: test_sel:
+; X86-64:       # %bb.0: # %entry
+; X86-64-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
+; X86-64-NEXT:    movl $2, %eax
+; X86-64-NEXT:    vcmpeqsd %xmm2, %xmm0, %k0
+; X86-64-NEXT:    testl %edi, %edi
+; X86-64-NEXT:    je .LBB10_3
+; X86-64-NEXT:    .p2align 4, 0x90
+; X86-64-NEXT:  .LBB10_2: # %if.then.i
+; X86-64-NEXT:    # =>This Inner Loop Header: Depth=1
+; X86-64-NEXT:    kmovd %k0, %ecx
+; X86-64-NEXT:    movzbl %cl, %ecx
+; X86-64-NEXT:    leal 1(%rcx,%rcx,2), %ecx
+; X86-64-NEXT:    movl %ecx, (%rsi)
+; X86-64-NEXT:    testl %edi, %edi
+; X86-64-NEXT:    jne .LBB10_2
+; X86-64-NEXT:  .LBB10_3: # %if.else6.i
+; X86-64-NEXT:    # =>This Inner Loop Header: Depth=1
+; X86-64-NEXT:    vucomisd %xmm2, %xmm1
+; X86-64-NEXT:    setp %cl
+; X86-64-NEXT:    setne %dl
+; X86-64-NEXT:    orb %cl, %dl
+; X86-64-NEXT:    movl $8, %ecx
+; X86-64-NEXT:    cmovnel %eax, %ecx
+; X86-64-NEXT:    movl %ecx, (%rsi)
+; X86-64-NEXT:    testl %edi, %edi
+; X86-64-NEXT:    jne .LBB10_2
+; X86-64-NEXT:    jmp .LBB10_3
+;
+; X86-32-LABEL: test_sel:
+; X86-32:       # %bb.0: # %entry
+; X86-32-NEXT:    pushl %ebx
+; X86-32-NEXT:    .cfi_def_cfa_offset 8
+; X86-32-NEXT:    pushl %edi
+; X86-32-NEXT:    .cfi_def_cfa_offset 12
+; X86-32-NEXT:    pushl %esi
+; X86-32-NEXT:    .cfi_def_cfa_offset 16
+; X86-32-NEXT:    .cfi_offset %esi, -16
+; X86-32-NEXT:    .cfi_offset %edi, -12
+; X86-32-NEXT:    .cfi_offset %ebx, -8
+; X86-32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-32-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X86-32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-32-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
+; X86-32-NEXT:    movl $2, %edx
+; X86-32-NEXT:    vcmpeqsd {{[0-9]+}}(%esp), %xmm1, %k0
+; X86-32-NEXT:    kmovb %k0, %k0
+; X86-32-NEXT:    leal 1(%k0,%k0,2), %esi
+; X86-32-NEXT:    testl %ecx, %ecx
+; X86-32-NEXT:    je .LBB10_3
+; X86-32-NEXT:    .p2align 4, 0x90
+; X86-32-NEXT:  .LBB10_2: # %if.then.i
+; X86-32-NEXT:    # =>This Inner Loop Header: Depth=1
+; X86-32-NEXT:    movl %esi, (%eax)
+; X86-32-NEXT:    testl %ecx, %ecx
+; X86-32-NEXT:    jne .LBB10_2
+; X86-32-NEXT:  .LBB10_3: # %if.else6.i
+; X86-32-NEXT:    # =>This Inner Loop Header: Depth=1
+; X86-32-NEXT:    vucomisd %xmm1, %xmm0
+; X86-32-NEXT:    setp %bl
+; X86-32-NEXT:    setne %bh
+; X86-32-NEXT:    orb %bl, %bh
+; X86-32-NEXT:    movl $8, %edi
+; X86-32-NEXT:    cmovnel %edx, %edi
+; X86-32-NEXT:    movl %edi, (%eax)
+; X86-32-NEXT:    testl %ecx, %ecx
+; X86-32-NEXT:    jne .LBB10_2
+; X86-32-NEXT:    jmp .LBB10_3
+entry:
+  %0 = icmp eq i32 %in, 0
+  br label %for.cond
+
+for.cond:
+  %1 = phi i32 [0, %entry], [%7, %exit]
+  br i1 %0, label %if.else6.i, label %if.then.i
+
+if.then.i:
+  %2 = fcmp une double %d1, 0.000000e+00
+  %3 = select i1 %2, i32 1, i32 4
+  br label %exit
+
+if.else6.i:
+  %4 = fcmp une double %d2, 0.000000e+00
+  %5 = select i1 %4, i32 2, i32 8
+  br label %exit
+
+exit:
+  %6 = phi i32 [%3, %if.then.i], [%5, %if.else6.i]
+  store i32 %6, i32* %ptr
+  %7 = add i32 %1, 1
+  br label %for.cond
+  ret void
+}