Index: include/llvm/CodeGen/MachineBasicBlock.h =================================================================== --- include/llvm/CodeGen/MachineBasicBlock.h +++ include/llvm/CodeGen/MachineBasicBlock.h @@ -25,6 +25,7 @@ #include "llvm/MC/LaneBitmask.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/Support/BranchProbability.h" +#include "llvm/Support/Printable.h" #include #include #include @@ -771,6 +772,15 @@ raw_ostream& operator<<(raw_ostream &OS, const MachineBasicBlock &MBB); +/// Prints a machine basic block reference. +/// +/// The format is: +/// %bb.5 - a machine basic block without a named IR basic block. +/// %bb.5.name - a machine basic block with a named IR basic block. +/// +/// Usage: OS << printMBBReference(MBB) << '\n'; +Printable printMBBReference(const MachineBasicBlock &MBB); + // This is useful when building IndexedMaps keyed on basic block pointers. struct MBB2NumberFunctor { using argument_type = const MachineBasicBlock *; Index: lib/CodeGen/AsmPrinter/AsmPrinter.cpp =================================================================== --- lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -2682,7 +2682,7 @@ (isBlockOnlyReachableByFallthrough(&MBB) && !MBB.isEHFuncletEntry())) { if (isVerbose()) { // NOTE: Want this comment at start of line, don't emit with AddComment. - OutStreamer->emitRawComment(" BB#" + Twine(MBB.getNumber()) + ":", false); + OutStreamer->emitRawComment(" %bb." + Twine(MBB.getNumber()) + ":", false); } } else { OutStreamer->EmitLabel(MBB.getSymbol()); Index: lib/CodeGen/BranchFolding.cpp =================================================================== --- lib/CodeGen/BranchFolding.cpp +++ lib/CodeGen/BranchFolding.cpp @@ -613,8 +613,8 @@ CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2); if (CommonTailLen == 0) return false; - DEBUG(dbgs() << "Common tail length of BB#" << MBB1->getNumber() - << " and BB#" << MBB2->getNumber() << " is " << CommonTailLen + DEBUG(dbgs() << "Common tail length of %bb." << MBB1->getNumber() + << " and %bb." << MBB2->getNumber() << " is " << CommonTailLen << '\n'); // It's almost always profitable to merge any number of non-terminator @@ -770,7 +770,7 @@ SameTails[commonTailIndex].getTailStartPos(); MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock(); - DEBUG(dbgs() << "\nSplitting BB#" << MBB->getNumber() << ", size " + DEBUG(dbgs() << "\nSplitting %bb." << MBB->getNumber() << ", size " << maxCommonTailLength); // If the split block unconditionally falls-thru to SuccBB, it will be @@ -921,13 +921,13 @@ DEBUG(dbgs() << "\nTryTailMergeBlocks: "; for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i) - dbgs() << "BB#" << MergePotentials[i].getBlock()->getNumber() + dbgs() << "%bb." << MergePotentials[i].getBlock()->getNumber() << (i == e-1 ? "" : ", "); dbgs() << "\n"; if (SuccBB) { - dbgs() << " with successor BB#" << SuccBB->getNumber() << '\n'; + dbgs() << " with successor %bb." << SuccBB->getNumber() << '\n'; if (PredBB) - dbgs() << " which has fall-through from BB#" + dbgs() << " which has fall-through from %bb." << PredBB->getNumber() << "\n"; } dbgs() << "Looking for common tails of at least " @@ -1013,12 +1013,12 @@ // MBB is common tail. Adjust all other BB's to jump to this one. // Traversal must be forwards so erases work. - DEBUG(dbgs() << "\nUsing common tail in BB#" << MBB->getNumber() + DEBUG(dbgs() << "\nUsing common tail in %bb." << MBB->getNumber() << " for "); for (unsigned int i=0, e = SameTails.size(); i != e; ++i) { if (commonTailIndex == i) continue; - DEBUG(dbgs() << "BB#" << SameTails[i].getBlock()->getNumber() + DEBUG(dbgs() << "%bb." << SameTails[i].getBlock()->getNumber() << (i == e-1 ? "" : ", ")); // Hack the end off BB i, making it jump to BB commonTailIndex instead. replaceTailWithBranchTo(SameTails[i].getTailStartPos(), *MBB); Index: lib/CodeGen/BranchRelaxation.cpp =================================================================== --- lib/CodeGen/BranchRelaxation.cpp +++ lib/CodeGen/BranchRelaxation.cpp @@ -143,7 +143,7 @@ LLVM_DUMP_METHOD void BranchRelaxation::dumpBBs() { for (auto &MBB : *MF) { const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()]; - dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset) + dbgs() << format("%bb.%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset) << format("size=%#x\n", BBI.Size); } } @@ -288,8 +288,8 @@ return true; DEBUG( - dbgs() << "Out of range branch to destination BB#" << DestBB.getNumber() - << " from BB#" << MI.getParent()->getNumber() + dbgs() << "Out of range branch to destination %bb." << DestBB.getNumber() + << " from %bb." << MI.getParent()->getNumber() << " to " << DestOffset << " offset " << DestOffset - BrOffset << '\t' << MI @@ -366,8 +366,8 @@ // just created), so we can invert the condition. MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB)); - DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber() - << ", invert condition and change dest. to BB#" + DEBUG(dbgs() << " Insert B to %bb." << TBB->getNumber() + << ", invert condition and change dest. to %bb." << NextBB.getNumber() << '\n'); unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size; Index: lib/CodeGen/EarlyIfConversion.cpp =================================================================== --- lib/CodeGen/EarlyIfConversion.cpp +++ lib/CodeGen/EarlyIfConversion.cpp @@ -185,7 +185,7 @@ // Reject any live-in physregs. It's probably CPSR/EFLAGS, and very hard to // get right. if (!MBB->livein_empty()) { - DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has live-ins.\n"); + DEBUG(dbgs() << "%bb." << MBB->getNumber() << " has live-ins.\n"); return false; } @@ -199,7 +199,7 @@ continue; if (++InstrCount > BlockInstrLimit && !Stress) { - DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has more than " + DEBUG(dbgs() << "%bb." << MBB->getNumber() << " has more than " << BlockInstrLimit << " instructions.\n"); return false; } @@ -246,7 +246,7 @@ if (!DefMI || DefMI->getParent() != Head) continue; if (InsertAfter.insert(DefMI).second) - DEBUG(dbgs() << "BB#" << MBB->getNumber() << " depends on " << *DefMI); + DEBUG(dbgs() << "%bb." << MBB->getNumber() << " depends on " << *DefMI); if (DefMI->isTerminator()) { DEBUG(dbgs() << "Can't insert instructions below terminator.\n"); return false; @@ -361,10 +361,10 @@ if (Succ1->pred_size() != 1 || Succ1->succ_size() != 1 || Succ1->succ_begin()[0] != Tail) return false; - DEBUG(dbgs() << "\nDiamond: BB#" << Head->getNumber() - << " -> BB#" << Succ0->getNumber() - << "/BB#" << Succ1->getNumber() - << " -> BB#" << Tail->getNumber() << '\n'); + DEBUG(dbgs() << "\nDiamond: %bb." << Head->getNumber() + << " -> %bb." << Succ0->getNumber() + << "/%bb." << Succ1->getNumber() + << " -> %bb." << Tail->getNumber() << '\n'); // Live-in physregs are tricky to get right when speculating code. if (!Tail->livein_empty()) { @@ -372,9 +372,9 @@ return false; } } else { - DEBUG(dbgs() << "\nTriangle: BB#" << Head->getNumber() - << " -> BB#" << Succ0->getNumber() - << " -> BB#" << Tail->getNumber() << '\n'); + DEBUG(dbgs() << "\nTriangle: %bb." << Head->getNumber() + << " -> %bb." << Succ0->getNumber() + << " -> %bb." << Tail->getNumber() << '\n'); } // This is a triangle or a diamond. @@ -563,8 +563,8 @@ assert(Head->succ_empty() && "Additional head successors?"); if (!ExtraPreds && Head->isLayoutSuccessor(Tail)) { // Splice Tail onto the end of Head. - DEBUG(dbgs() << "Joining tail BB#" << Tail->getNumber() - << " into head BB#" << Head->getNumber() << '\n'); + DEBUG(dbgs() << "Joining tail %bb." << Tail->getNumber() + << " into head %bb." << Head->getNumber() << '\n'); Head->splice(Head->end(), Tail, Tail->begin(), Tail->end()); Head->transferSuccessorsAndUpdatePHIs(Tail); Index: lib/CodeGen/EdgeBundles.cpp =================================================================== --- lib/CodeGen/EdgeBundles.cpp +++ lib/CodeGen/EdgeBundles.cpp @@ -80,12 +80,12 @@ O << "digraph {\n"; for (const auto &MBB : *MF) { unsigned BB = MBB.getNumber(); - O << "\t\"BB#" << BB << "\" [ shape=box ]\n" - << '\t' << G.getBundle(BB, false) << " -> \"BB#" << BB << "\"\n" - << "\t\"BB#" << BB << "\" -> " << G.getBundle(BB, true) << '\n'; + O << "\t\"%bb." << BB << "\" [ shape=box ]\n" + << '\t' << G.getBundle(BB, false) << " -> \"%bb." << BB << "\"\n" + << "\t\"%bb." << BB << "\" -> " << G.getBundle(BB, true) << '\n'; for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(), SE = MBB.succ_end(); SI != SE; ++SI) - O << "\t\"BB#" << BB << "\" -> \"BB#" << (*SI)->getNumber() + O << "\t\"%bb." << BB << "\" -> \"%bb." << (*SI)->getNumber() << "\" [ color=lightgray ]\n"; } O << "}\n"; Index: lib/CodeGen/ExecutionDepsFix.cpp =================================================================== --- lib/CodeGen/ExecutionDepsFix.cpp +++ lib/CodeGen/ExecutionDepsFix.cpp @@ -200,7 +200,7 @@ LiveRegs[rx].Def = -1; } } - DEBUG(dbgs() << "BB#" << MBB->getNumber() << ": entry\n"); + DEBUG(dbgs() << "%bb." << MBB->getNumber() << ": entry\n"); return; } @@ -246,7 +246,7 @@ } } DEBUG( - dbgs() << "BB#" << MBB->getNumber() + dbgs() << "%bb." << MBB->getNumber() << (!isBlockDone(MBB) ? ": incomplete\n" : ": all preds known\n")); } Index: lib/CodeGen/IfConversion.cpp =================================================================== --- lib/CodeGen/IfConversion.cpp +++ lib/CodeGen/IfConversion.cpp @@ -408,7 +408,7 @@ if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break; DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ? " false" : "") - << "): BB#" << BBI.BB->getNumber() << " (" + << "): %bb." << BBI.BB->getNumber() << " (" << ((Kind == ICSimpleFalse) ? BBI.FalseBB->getNumber() : BBI.TrueBB->getNumber()) << ") "); @@ -435,7 +435,7 @@ DEBUG(dbgs() << " false"); if (isRev) DEBUG(dbgs() << " rev"); - DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:" + DEBUG(dbgs() << "): %bb." << BBI.BB->getNumber() << " (T:" << BBI.TrueBB->getNumber() << ",F:" << BBI.FalseBB->getNumber() << ") "); RetVal = IfConvertTriangle(BBI, Kind); @@ -453,7 +453,7 @@ } case ICDiamond: if (DisableDiamond) break; - DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:" + DEBUG(dbgs() << "Ifcvt (Diamond): %bb." << BBI.BB->getNumber() << " (T:" << BBI.TrueBB->getNumber() << ",F:" << BBI.FalseBB->getNumber() << ") "); RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2, @@ -464,7 +464,7 @@ break; case ICForkedDiamond: if (DisableForkedDiamond) break; - DEBUG(dbgs() << "Ifcvt (Forked Diamond): BB#" + DEBUG(dbgs() << "Ifcvt (Forked Diamond): %bb." << BBI.BB->getNumber() << " (T:" << BBI.TrueBB->getNumber() << ",F:" << BBI.FalseBB->getNumber() << ") "); Index: lib/CodeGen/LiveDebugVariables.cpp =================================================================== --- lib/CodeGen/LiveDebugVariables.cpp +++ lib/CodeGen/LiveDebugVariables.cpp @@ -1175,7 +1175,7 @@ MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator(); SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB); - DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd); + DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd); insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, LIS, TII, TRI); // This interval may span multiple basic blocks. // Insert a DBG_VALUE into each one. @@ -1185,7 +1185,7 @@ if (++MBB == MFEnd) break; MBBEnd = LIS.getMBBEndIdx(&*MBB); - DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd); + DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd); insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, LIS, TII, TRI); } DEBUG(dbgs() << '\n'); Index: lib/CodeGen/LiveIntervalAnalysis.cpp =================================================================== --- lib/CodeGen/LiveIntervalAnalysis.cpp +++ lib/CodeGen/LiveIntervalAnalysis.cpp @@ -323,7 +323,7 @@ // Create phi-defs at Begin for all live-in registers. SlotIndex Begin = Indexes->getMBBStartIdx(&MBB); - DEBUG(dbgs() << Begin << "\tBB#" << MBB.getNumber()); + DEBUG(dbgs() << Begin << "\t%bb." << MBB.getNumber()); for (const auto &LI : MBB.liveins()) { for (MCRegUnitIterator Units(LI.PhysReg, TRI); Units.isValid(); ++Units) { unsigned Unit = *Units; Index: lib/CodeGen/LiveRangeCalc.cpp =================================================================== --- lib/CodeGen/LiveRangeCalc.cpp +++ lib/CodeGen/LiveRangeCalc.cpp @@ -377,7 +377,7 @@ MBB->getParent()->verify(); const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo(); errs() << "The register " << printReg(PhysReg, TRI) - << " needs to be live in to BB#" << MBB->getNumber() + << " needs to be live in to " << printMBBReference(*MBB) << ", but is missing from the live-in list.\n"; report_fatal_error("Invalid global physical register"); } Index: lib/CodeGen/MIRPrinter.cpp =================================================================== --- lib/CodeGen/MIRPrinter.cpp +++ lib/CodeGen/MIRPrinter.cpp @@ -156,7 +156,6 @@ void print(const MachineBasicBlock &MBB); void print(const MachineInstr &MI); - void printMBBReference(const MachineBasicBlock &MBB); void printIRBlockReference(const BasicBlock &BB); void printIRValueReference(const Value &V); void printStackObjectReference(int FrameIndex); @@ -337,13 +336,11 @@ YamlMFI.HasMustTailInVarArgFunc = MFI.hasMustTailInVarArgFunc(); if (MFI.getSavePoint()) { raw_string_ostream StrOS(YamlMFI.SavePoint.Value); - MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping) - .printMBBReference(*MFI.getSavePoint()); + MFI.getSavePoint()->printAsOperand(StrOS, /*PrintType=*/false); } if (MFI.getRestorePoint()) { raw_string_ostream StrOS(YamlMFI.RestorePoint.Value); - MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping) - .printMBBReference(*MFI.getRestorePoint()); + MFI.getRestorePoint()->printAsOperand(StrOS, /*PrintType=*/false); } } @@ -492,8 +489,7 @@ Entry.ID = ID++; for (const auto *MBB : Table.MBBs) { raw_string_ostream StrOS(Str); - MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping) - .printMBBReference(*MBB); + MBB->printAsOperand(StrOS, /*PrintType=*/false); Entry.Blocks.push_back(StrOS.str()); Str.clear(); } @@ -615,7 +611,7 @@ for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) { if (I != MBB.succ_begin()) OS << ", "; - printMBBReference(**I); + (*I)->printAsOperand(OS, /*PrintType=*/false); if (!SimplifyMIR || !canPredictProbs) OS << '(' << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator()) @@ -763,14 +759,6 @@ } } -void MIPrinter::printMBBReference(const MachineBasicBlock &MBB) { - OS << "%bb." << MBB.getNumber(); - if (const auto *BB = MBB.getBasicBlock()) { - if (BB->hasName()) - OS << '.' << BB->getName(); - } -} - static void printIRSlotNumber(raw_ostream &OS, int Slot) { if (Slot == -1) OS << ""; @@ -966,7 +954,7 @@ Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST); break; case MachineOperand::MO_MachineBasicBlock: - printMBBReference(*Op.getMBB()); + Op.getMBB()->printAsOperand(OS, /*PrintType=*/false); break; case MachineOperand::MO_FrameIndex: printStackObjectReference(Op.getIndex()); Index: lib/CodeGen/MachineBasicBlock.cpp =================================================================== --- lib/CodeGen/MachineBasicBlock.cpp +++ lib/CodeGen/MachineBasicBlock.cpp @@ -70,6 +70,10 @@ return OS; } +Printable llvm::printMBBReference(const MachineBasicBlock &MBB) { + return Printable([&MBB](raw_ostream &OS) { return MBB.printAsOperand(OS); }); +} + /// When an MBB is added to an MF, we need to update the parent pointer of the /// MBB, the MBB numbering, and any instructions in the MBB to be on the right /// operand list for registers. @@ -281,7 +285,7 @@ if (Indexes) OS << Indexes->getMBBStartIdx(this) << '\t'; - OS << "BB#" << getNumber() << ": "; + OS << "%bb." << getNumber() << ": "; const char *Comma = ""; if (const BasicBlock *LBB = getBasicBlock()) { @@ -313,7 +317,7 @@ if (Indexes) OS << '\t'; OS << " Predecessors according to CFG:"; for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) - OS << " BB#" << (*PI)->getNumber(); + OS << " %bb." << (*PI)->getNumber(); OS << '\n'; } @@ -334,7 +338,7 @@ if (Indexes) OS << '\t'; OS << " Successors according to CFG:"; for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) { - OS << " BB#" << (*SI)->getNumber(); + OS << " %bb." << (*SI)->getNumber(); if (!Probs.empty()) OS << '(' << *getProbabilityIterator(SI) << ')'; } @@ -350,7 +354,11 @@ void MachineBasicBlock::printAsOperand(raw_ostream &OS, bool /*PrintType*/) const { - OS << "BB#" << getNumber(); + OS << "%bb." << getNumber(); + if (const auto *BB = getBasicBlock()) { + if (BB->hasName()) + OS << '.' << BB->getName(); + } } void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { @@ -768,9 +776,9 @@ MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); MF->insert(std::next(MachineFunction::iterator(this)), NMBB); DEBUG(dbgs() << "Splitting critical edge:" - " BB#" << getNumber() - << " -- BB#" << NMBB->getNumber() - << " -- BB#" << Succ->getNumber() << '\n'); + " %bb." << getNumber() + << " -- %bb." << NMBB->getNumber() + << " -- %bb." << Succ->getNumber() << '\n'); LiveIntervals *LIS = P.getAnalysisIfAvailable(); SlotIndexes *Indexes = P.getAnalysisIfAvailable(); @@ -1023,7 +1031,7 @@ // case that we can't handle. Since this never happens in properly optimized // code, just skip those edges. if (TBB && TBB == FBB) { - DEBUG(dbgs() << "Won't split critical edge after degenerate BB#" + DEBUG(dbgs() << "Won't split critical edge after degenerate %bb." << getNumber() << '\n'); return false; } Index: lib/CodeGen/MachineBlockPlacement.cpp =================================================================== --- lib/CodeGen/MachineBlockPlacement.cpp +++ lib/CodeGen/MachineBlockPlacement.cpp @@ -546,7 +546,7 @@ static std::string getBlockName(const MachineBasicBlock *BB) { std::string Result; raw_string_ostream OS(Result); - OS << "BB#" << BB->getNumber(); + OS << "%bb." << BB->getNumber(); OS << " ('" << BB->getName() << "')"; OS.flush(); return Result; Index: lib/CodeGen/MachineBranchProbabilityInfo.cpp =================================================================== --- lib/CodeGen/MachineBranchProbabilityInfo.cpp +++ lib/CodeGen/MachineBranchProbabilityInfo.cpp @@ -84,7 +84,7 @@ const MachineBasicBlock *Dst) const { const BranchProbability Prob = getEdgeProbability(Src, Dst); - OS << "edge MBB#" << Src->getNumber() << " -> MBB#" << Dst->getNumber() + OS << "edge %bb." << Src->getNumber() << " -> %bb." << Dst->getNumber() << " probability is " << Prob << (isEdgeHot(Src, Dst) ? " [HOT edge]\n" : "\n"); Index: lib/CodeGen/MachineFunction.cpp =================================================================== --- lib/CodeGen/MachineFunction.cpp +++ lib/CodeGen/MachineFunction.cpp @@ -546,7 +546,7 @@ raw_string_ostream OSS(OutStr); if (isSimple()) { - OSS << "BB#" << Node->getNumber(); + OSS << "%bb." << Node->getNumber(); if (const BasicBlock *BB = Node->getBasicBlock()) OSS << ": " << BB->getName(); } else @@ -908,7 +908,7 @@ for (unsigned i = 0, e = JumpTables.size(); i != e; ++i) { OS << " jt#" << i << ": "; for (unsigned j = 0, f = JumpTables[i].MBBs.size(); j != f; ++j) - OS << " BB#" << JumpTables[i].MBBs[j]->getNumber(); + OS << " %bb." << JumpTables[i].MBBs[j]->getNumber(); } OS << '\n'; Index: lib/CodeGen/MachineLICM.cpp =================================================================== --- lib/CodeGen/MachineLICM.cpp +++ lib/CodeGen/MachineLICM.cpp @@ -563,7 +563,7 @@ // Now move the instructions to the predecessor, inserting it before any // terminator instructions. - DEBUG(dbgs() << "Hoisting to BB#" << Preheader->getNumber() << " from BB#" + DEBUG(dbgs() << "Hoisting to %bb." << Preheader->getNumber() << " from %bb." << MI->getParent()->getNumber() << ": " << *MI); // Splice the instruction to the preheader. @@ -601,14 +601,14 @@ } void MachineLICM::EnterScope(MachineBasicBlock *MBB) { - DEBUG(dbgs() << "Entering BB#" << MBB->getNumber() << '\n'); + DEBUG(dbgs() << "Entering %bb." << MBB->getNumber() << '\n'); // Remember livein register pressure. BackTrace.push_back(RegPressure); } void MachineLICM::ExitScope(MachineBasicBlock *MBB) { - DEBUG(dbgs() << "Exiting BB#" << MBB->getNumber() << '\n'); + DEBUG(dbgs() << "Exiting %bb." << MBB->getNumber() << '\n'); BackTrace.pop_back(); } @@ -1336,9 +1336,9 @@ DEBUG({ dbgs() << "Hoisting " << *MI; if (MI->getParent()->getBasicBlock()) - dbgs() << " from BB#" << MI->getParent()->getNumber(); + dbgs() << " from %bb." << MI->getParent()->getNumber(); if (Preheader->getBasicBlock()) - dbgs() << " to BB#" << Preheader->getNumber(); + dbgs() << " to %bb." << Preheader->getNumber(); dbgs() << "\n"; }); Index: lib/CodeGen/MachineOperand.cpp =================================================================== --- lib/CodeGen/MachineOperand.cpp +++ lib/CodeGen/MachineOperand.cpp @@ -432,7 +432,7 @@ } break; case MachineOperand::MO_MachineBasicBlock: - OS << "getNumber() << ">"; + OS << printMBBReference(*getMBB()); break; case MachineOperand::MO_FrameIndex: OS << "'; Index: lib/CodeGen/MachineScheduler.cpp =================================================================== --- lib/CodeGen/MachineScheduler.cpp +++ lib/CodeGen/MachineScheduler.cpp @@ -98,7 +98,7 @@ static cl::opt SchedOnlyFunc("misched-only-func", cl::Hidden, cl::desc("Only schedule this function")); static cl::opt SchedOnlyBlock("misched-only-block", cl::Hidden, - cl::desc("Only schedule this MBB#")); + cl::desc("Only schedule this %bb.")); #else static bool ViewMISchedDAGs = false; #endif // NDEBUG @@ -549,14 +549,14 @@ } DEBUG(dbgs() << "********** MI Scheduling **********\n"); DEBUG(dbgs() << MF->getName() - << ":BB#" << MBB->getNumber() << " " << MBB->getName() + << ":%bb." << MBB->getNumber() << " " << MBB->getName() << "\n From: " << *I << " To: "; if (RegionEnd != MBB->end()) dbgs() << *RegionEnd; else dbgs() << "End"; dbgs() << " RegionInstrs: " << NumRegionInstrs << '\n'); if (DumpCriticalPathLength) { errs() << MF->getName(); - errs() << ":BB# " << MBB->getNumber(); + errs() << ":%bb. " << MBB->getNumber(); errs() << " " << MBB->getName() << " \n"; } @@ -824,7 +824,7 @@ DEBUG({ unsigned BBNum = begin()->getParent()->getNumber(); - dbgs() << "*** Final schedule for BB#" << BBNum << " ***\n"; + dbgs() << "*** Final schedule for %bb." << BBNum << " ***\n"; dumpSchedule(); dbgs() << '\n'; }); @@ -1262,7 +1262,7 @@ DEBUG({ unsigned BBNum = begin()->getParent()->getNumber(); - dbgs() << "*** Final schedule for BB#" << BBNum << " ***\n"; + dbgs() << "*** Final schedule for %bb." << BBNum << " ***\n"; dumpSchedule(); dbgs() << '\n'; }); Index: lib/CodeGen/MachineSink.cpp =================================================================== --- lib/CodeGen/MachineSink.cpp +++ lib/CodeGen/MachineSink.cpp @@ -243,17 +243,17 @@ // into and they are all PHI nodes. In this case, machine-sink must break // the critical edge first. e.g. // - // BB#1: derived from LLVM BB %bb4.preheader - // Predecessors according to CFG: BB#0 + // %bb.1: derived from LLVM BB %bb4.preheader + // Predecessors according to CFG: %bb.0 // ... // %reg16385 = DEC64_32r %reg16437, %EFLAGS // ... - // JE_4 , %EFLAGS - // Successors according to CFG: BB#37 BB#2 + // JE_4 %bb.37, %EFLAGS + // Successors according to CFG: %bb.37 %bb.2 // - // BB#2: derived from LLVM BB %bb.nph - // Predecessors according to CFG: BB#0 BB#1 - // %reg16386 = PHI %reg16434, , %reg16385, + // %bb.2: derived from LLVM BB %bb.nph + // Predecessors according to CFG: %bb.0 %bb.1 + // %reg16386 = PHI %reg16434, %bb.0, %reg16385, %bb.1 BreakPHIEdge = true; for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { MachineInstr *UseInst = MO.getParent(); @@ -322,9 +322,9 @@ auto NewSucc = Pair.first->SplitCriticalEdge(Pair.second, *this); if (NewSucc != nullptr) { DEBUG(dbgs() << " *** Splitting critical edge:" - " BB#" << Pair.first->getNumber() - << " -- BB#" << NewSucc->getNumber() - << " -- BB#" << Pair.second->getNumber() << '\n'); + " %bb." << Pair.first->getNumber() + << " -- %bb." << NewSucc->getNumber() + << " -- %bb." << Pair.second->getNumber() << '\n'); MadeChange = true; ++NumSplit; } else @@ -460,33 +460,33 @@ // It's not always legal to break critical edges and sink the computation // to the edge. // - // BB#1: + // %bb.1: // v1024 - // Beq BB#3 + // Beq %bb.3 // - // BB#2: + // %bb.2: // ... no uses of v1024 // - // BB#3: + // %bb.3: // ... // = v1024 // - // If BB#1 -> BB#3 edge is broken and computation of v1024 is inserted: + // If %bb.1 -> %bb.3 edge is broken and computation of v1024 is inserted: // - // BB#1: + // %bb.1: // ... - // Bne BB#2 - // BB#4: + // Bne %bb.2 + // %bb.4: // v1024 = - // B BB#3 - // BB#2: + // B %bb.3 + // %bb.2: // ... no uses of v1024 // - // BB#3: + // %bb.3: // ... // = v1024 // - // This is incorrect since v1024 is not computed along the BB#1->BB#2->BB#3 + // This is incorrect since v1024 is not computed along the %bb.1->%bb.2->%bb.3 // flow. We need to ensure the new basic block where the computation is // sunk to dominates all the uses. // It's only legal to break critical edge and sink the computation to the Index: lib/CodeGen/MachineTraceMetrics.cpp =================================================================== --- lib/CodeGen/MachineTraceMetrics.cpp +++ lib/CodeGen/MachineTraceMetrics.cpp @@ -396,7 +396,7 @@ } void MachineTraceMetrics::invalidate(const MachineBasicBlock *MBB) { - DEBUG(dbgs() << "Invalidate traces through BB#" << MBB->getNumber() << '\n'); + DEBUG(dbgs() << "Invalidate traces through %bb." << MBB->getNumber() << '\n'); BlockInfo[MBB->getNumber()].invalidate(); for (unsigned i = 0; i != TS_NumStrategies; ++i) if (Ensembles[i]) @@ -476,7 +476,7 @@ /// Compute the trace through MBB. void MachineTraceMetrics::Ensemble::computeTrace(const MachineBasicBlock *MBB) { - DEBUG(dbgs() << "Computing " << getName() << " trace through BB#" + DEBUG(dbgs() << "Computing " << getName() << " trace through %bb." << MBB->getNumber() << '\n'); // Set up loop bounds for the backwards post-order traversal. LoopBounds Bounds(BlockInfo, MTM.Loops); @@ -485,13 +485,13 @@ Bounds.Downward = false; Bounds.Visited.clear(); for (auto I : inverse_post_order_ext(MBB, Bounds)) { - DEBUG(dbgs() << " pred for BB#" << I->getNumber() << ": "); + DEBUG(dbgs() << " pred for %bb." << I->getNumber() << ": "); TraceBlockInfo &TBI = BlockInfo[I->getNumber()]; // All the predecessors have been visited, pick the preferred one. TBI.Pred = pickTracePred(I); DEBUG({ if (TBI.Pred) - dbgs() << "BB#" << TBI.Pred->getNumber() << '\n'; + dbgs() << "%bb." << TBI.Pred->getNumber() << '\n'; else dbgs() << "null\n"; }); @@ -503,13 +503,13 @@ Bounds.Downward = true; Bounds.Visited.clear(); for (auto I : post_order_ext(MBB, Bounds)) { - DEBUG(dbgs() << " succ for BB#" << I->getNumber() << ": "); + DEBUG(dbgs() << " succ for %bb." << I->getNumber() << ": "); TraceBlockInfo &TBI = BlockInfo[I->getNumber()]; // All the successors have been visited, pick the preferred one. TBI.Succ = pickTraceSucc(I); DEBUG({ if (TBI.Succ) - dbgs() << "BB#" << TBI.Succ->getNumber() << '\n'; + dbgs() << "%bb." << TBI.Succ->getNumber() << '\n'; else dbgs() << "null\n"; }); @@ -530,7 +530,7 @@ WorkList.push_back(BadMBB); do { const MachineBasicBlock *MBB = WorkList.pop_back_val(); - DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName() + DEBUG(dbgs() << "Invalidate %bb." << MBB->getNumber() << ' ' << getName() << " height.\n"); // Find any MBB predecessors that have MBB as their preferred successor. // They are the only ones that need to be invalidated. @@ -555,7 +555,7 @@ WorkList.push_back(BadMBB); do { const MachineBasicBlock *MBB = WorkList.pop_back_val(); - DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName() + DEBUG(dbgs() << "Invalidate %bb." << MBB->getNumber() << ' ' << getName() << " depth.\n"); // Find any MBB successors that have MBB as their preferred predecessor. // They are the only ones that need to be invalidated. @@ -859,7 +859,7 @@ // Go through trace blocks in top-down order, stopping after the center block. while (!Stack.empty()) { MBB = Stack.pop_back_val(); - DEBUG(dbgs() << "\nDepths for BB#" << MBB->getNumber() << ":\n"); + DEBUG(dbgs() << "\nDepths for %bb." << MBB->getNumber() << ":\n"); TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; TBI.HasValidInstrDepths = true; TBI.CriticalPath = 0; @@ -1044,7 +1044,7 @@ SmallVector Deps; for (;!Stack.empty(); Stack.pop_back()) { MBB = Stack.back(); - DEBUG(dbgs() << "Heights for BB#" << MBB->getNumber() << ":\n"); + DEBUG(dbgs() << "Heights for %bb." << MBB->getNumber() << ":\n"); TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; TBI.HasValidInstrHeights = true; TBI.CriticalPath = 0; @@ -1131,7 +1131,7 @@ // Update virtual live-in heights. They were added by addLiveIns() with a 0 // height because the final height isn't known until now. - DEBUG(dbgs() << "BB#" << MBB->getNumber() << " Live-ins:"); + DEBUG(dbgs() << "%bb." << MBB->getNumber() << " Live-ins:"); for (LiveInReg &LIR : TBI.LiveIns) { const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); LIR.Height = Heights.lookup(DefMI); @@ -1289,7 +1289,7 @@ void MachineTraceMetrics::Ensemble::print(raw_ostream &OS) const { OS << getName() << " ensemble:\n"; for (unsigned i = 0, e = BlockInfo.size(); i != e; ++i) { - OS << " BB#" << i << '\t'; + OS << " %bb." << i << '\t'; BlockInfo[i].print(OS); OS << '\n'; } @@ -1299,10 +1299,10 @@ if (hasValidDepth()) { OS << "depth=" << InstrDepth; if (Pred) - OS << " pred=BB#" << Pred->getNumber(); + OS << " pred=%bb." << Pred->getNumber(); else OS << " pred=null"; - OS << " head=BB#" << Head; + OS << " head=%bb." << Head; if (HasValidInstrDepths) OS << " +instrs"; } else @@ -1311,10 +1311,10 @@ if (hasValidHeight()) { OS << "height=" << InstrHeight; if (Succ) - OS << " succ=BB#" << Succ->getNumber(); + OS << " succ=%bb." << Succ->getNumber(); else OS << " succ=null"; - OS << " tail=BB#" << Tail; + OS << " tail=%bb." << Tail; if (HasValidInstrHeights) OS << " +instrs"; } else @@ -1326,18 +1326,18 @@ void MachineTraceMetrics::Trace::print(raw_ostream &OS) const { unsigned MBBNum = &TBI - &TE.BlockInfo[0]; - OS << TE.getName() << " trace BB#" << TBI.Head << " --> BB#" << MBBNum - << " --> BB#" << TBI.Tail << ':'; + OS << TE.getName() << " trace %bb." << TBI.Head << " --> %bb." << MBBNum + << " --> %bb." << TBI.Tail << ':'; if (TBI.hasValidHeight() && TBI.hasValidDepth()) OS << ' ' << getInstrCount() << " instrs."; if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights) OS << ' ' << TBI.CriticalPath << " cycles."; const MachineTraceMetrics::TraceBlockInfo *Block = &TBI; - OS << "\nBB#" << MBBNum; + OS << "\n%bb." << MBBNum; while (Block->hasValidDepth() && Block->Pred) { unsigned Num = Block->Pred->getNumber(); - OS << " <- BB#" << Num; + OS << " <- %bb." << Num; Block = &TE.BlockInfo[Num]; } @@ -1345,7 +1345,7 @@ OS << "\n "; while (Block->hasValidHeight() && Block->Succ) { unsigned Num = Block->Succ->getNumber(); - OS << " -> BB#" << Num; + OS << " -> %bb." << Num; Block = &TE.BlockInfo[Num]; } OS << '\n'; Index: lib/CodeGen/MachineVerifier.cpp =================================================================== --- lib/CodeGen/MachineVerifier.cpp +++ lib/CodeGen/MachineVerifier.cpp @@ -471,7 +471,7 @@ void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB) { assert(MBB); report(msg, MBB->getParent()); - errs() << "- basic block: BB#" << MBB->getNumber() + errs() << "- basic block: %bb." << MBB->getNumber() << ' ' << MBB->getName() << " (" << (const void*)MBB << ')'; if (Indexes) @@ -619,7 +619,7 @@ report("MBB has successor that isn't part of the function.", MBB); if (!MBBInfoMap[*I].Preds.count(MBB)) { report("Inconsistent CFG", MBB); - errs() << "MBB is not in the predecessor list of the successor BB#" + errs() << "MBB is not in the predecessor list of the successor %bb." << (*I)->getNumber() << ".\n"; } } @@ -631,7 +631,7 @@ report("MBB has predecessor that isn't part of the function.", MBB); if (!MBBInfoMap[*I].Succs.count(MBB)) { report("Inconsistent CFG", MBB); - errs() << "MBB is not in the successor list of the predecessor BB#" + errs() << "MBB is not in the successor list of the predecessor %bb." << (*I)->getNumber() << ".\n"; } } @@ -1628,7 +1628,7 @@ PrE = MBB->pred_end(); PrI != PrE; ++PrI) { if (!seen.count(*PrI)) { report("Missing PHI operand", &BBI); - errs() << "BB#" << (*PrI)->getNumber() + errs() << "%bb." << (*PrI)->getNumber() << " is a predecessor according to the CFG.\n"; } } @@ -2009,7 +2009,7 @@ report("Register not marked live out of predecessor", *PI); report_context(LR, Reg, LaneMask); report_context(*VNI); - errs() << " live into BB#" << MFI->getNumber() + errs() << " live into %bb." << MFI->getNumber() << '@' << LiveInts->getMBBStartIdx(&*MFI) << ", not live before " << PEnd << '\n'; continue; @@ -2019,9 +2019,9 @@ if (!IsPHI && PVNI != VNI) { report("Different value live out of predecessor", *PI); report_context(LR, Reg, LaneMask); - errs() << "Valno #" << PVNI->id << " live out of BB#" + errs() << "Valno #" << PVNI->id << " live out of %bb." << (*PI)->getNumber() << '@' << PEnd << "\nValno #" << VNI->id - << " live into BB#" << MFI->getNumber() << '@' + << " live into %bb." << MFI->getNumber() << '@' << LiveInts->getMBBStartIdx(&*MFI) << '\n'; } } @@ -2172,10 +2172,10 @@ (SPState[(*I)->getNumber()].ExitValue != BBState.EntryValue || SPState[(*I)->getNumber()].ExitIsSetup != BBState.EntryIsSetup)) { report("The exit stack state of a predecessor is inconsistent.", MBB); - errs() << "Predecessor BB#" << (*I)->getNumber() << " has exit state (" + errs() << "Predecessor %bb." << (*I)->getNumber() << " has exit state (" << SPState[(*I)->getNumber()].ExitValue << ", " << SPState[(*I)->getNumber()].ExitIsSetup - << "), while BB#" << MBB->getNumber() << " has entry state (" + << "), while %bb." << MBB->getNumber() << " has entry state (" << BBState.EntryValue << ", " << BBState.EntryIsSetup << ").\n"; } } @@ -2188,10 +2188,10 @@ (SPState[(*I)->getNumber()].EntryValue != BBState.ExitValue || SPState[(*I)->getNumber()].EntryIsSetup != BBState.ExitIsSetup)) { report("The entry stack state of a successor is inconsistent.", MBB); - errs() << "Successor BB#" << (*I)->getNumber() << " has entry state (" + errs() << "Successor %bb." << (*I)->getNumber() << " has entry state (" << SPState[(*I)->getNumber()].EntryValue << ", " << SPState[(*I)->getNumber()].EntryIsSetup - << "), while BB#" << MBB->getNumber() << " has exit state (" + << "), while %bb." << MBB->getNumber() << " has exit state (" << BBState.ExitValue << ", " << BBState.ExitIsSetup << ").\n"; } } Index: lib/CodeGen/PHIElimination.cpp =================================================================== --- lib/CodeGen/PHIElimination.cpp +++ lib/CodeGen/PHIElimination.cpp @@ -593,8 +593,8 @@ if (!ShouldSplit && !NoPhiElimLiveOutEarlyExit) continue; if (ShouldSplit) { - DEBUG(dbgs() << printReg(Reg) << " live-out before critical edge BB#" - << PreMBB->getNumber() << " -> BB#" << MBB.getNumber() + DEBUG(dbgs() << printReg(Reg) << " live-out before critical edge %bb." + << PreMBB->getNumber() << " -> %bb." << MBB.getNumber() << ": " << *BBI); } Index: lib/CodeGen/PostRASchedulerList.cpp =================================================================== --- lib/CodeGen/PostRASchedulerList.cpp +++ lib/CodeGen/PostRASchedulerList.cpp @@ -323,7 +323,7 @@ if (bbcnt++ % DebugDiv != DebugMod) continue; dbgs() << "*** DEBUG scheduling " << Fn.getName() - << ":BB#" << MBB.getNumber() << " ***\n"; + << ":%bb." << MBB.getNumber() << " ***\n"; } #endif Index: lib/CodeGen/ProcessImplicitDefs.cpp =================================================================== --- lib/CodeGen/ProcessImplicitDefs.cpp +++ lib/CodeGen/ProcessImplicitDefs.cpp @@ -154,7 +154,7 @@ if (WorkList.empty()) continue; - DEBUG(dbgs() << "BB#" << MFI->getNumber() << " has " << WorkList.size() + DEBUG(dbgs() << "%bb." << MFI->getNumber() << " has " << WorkList.size() << " implicit defs.\n"); Changed = true; Index: lib/CodeGen/RegAllocGreedy.cpp =================================================================== --- lib/CodeGen/RegAllocGreedy.cpp +++ lib/CodeGen/RegAllocGreedy.cpp @@ -1611,7 +1611,7 @@ // Create separate intervals for isolated blocks with multiple uses. if (!IntvIn && !IntvOut) { - DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " isolated.\n"); + DEBUG(dbgs() << "%bb." << BI.MBB->getNumber() << " isolated.\n"); if (SA->shouldSplitSingleBlock(BI, SingleInstrs)) SE->splitSingleBlock(BI); continue; Index: lib/CodeGen/RegisterCoalescer.cpp =================================================================== --- lib/CodeGen/RegisterCoalescer.cpp +++ lib/CodeGen/RegisterCoalescer.cpp @@ -992,7 +992,7 @@ // Now ok to move copy. if (CopyLeftBB) { - DEBUG(dbgs() << "\tremovePartialRedundancy: Move the copy to BB#" + DEBUG(dbgs() << "\tremovePartialRedundancy: Move the copy to %bb." << CopyLeftBB->getNumber() << '\t' << CopyMI); // Insert new copy to CopyLeftBB. @@ -1011,7 +1011,7 @@ // the deleted list. ErasedInstrs.erase(NewCopyMI); } else { - DEBUG(dbgs() << "\tremovePartialRedundancy: Remove the copy from BB#" + DEBUG(dbgs() << "\tremovePartialRedundancy: Remove the copy from %bb." << MBB.getNumber() << '\t' << CopyMI); } @@ -2377,7 +2377,7 @@ if (OtherV.ErasableImplicitDef && DefMI && DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) { DEBUG(dbgs() << "IMPLICIT_DEF defined at " << V.OtherVNI->def - << " extends into BB#" << DefMI->getParent()->getNumber() + << " extends into %bb." << DefMI->getParent()->getNumber() << ", keeping it.\n"); OtherV.ErasableImplicitDef = false; } Index: lib/CodeGen/ScheduleDAGInstrs.cpp =================================================================== --- lib/CodeGen/ScheduleDAGInstrs.cpp +++ lib/CodeGen/ScheduleDAGInstrs.cpp @@ -1043,7 +1043,7 @@ } void ScheduleDAGInstrs::fixupKills(MachineBasicBlock &MBB) { - DEBUG(dbgs() << "Fixup kills for BB#" << MBB.getNumber() << '\n'); + DEBUG(dbgs() << "Fixup kills for %bb." << MBB.getNumber() << '\n'); LiveRegs.init(*TRI); LiveRegs.addLiveOuts(MBB); Index: lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp =================================================================== --- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -347,7 +347,7 @@ /// Schedule - Schedule the DAG using list scheduling. void ScheduleDAGRRList::Schedule() { DEBUG(dbgs() - << "********** List Scheduling BB#" << BB->getNumber() + << "********** List Scheduling %bb." << BB->getNumber() << " '" << BB->getName() << "' **********\n"); CurCycle = 0; Index: lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp =================================================================== --- lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp +++ lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp @@ -94,7 +94,7 @@ /// Schedule - Schedule the DAG using list scheduling. void ScheduleDAGVLIW::Schedule() { DEBUG(dbgs() - << "********** List Scheduling BB#" << BB->getNumber() + << "********** List Scheduling %bb." << BB->getNumber() << " '" << BB->getName() << "' **********\n"); // Build the scheduling graph. Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -730,7 +730,7 @@ BlockName = (MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str(); } - DEBUG(dbgs() << "Initial selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Initial selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); if (ViewDAGCombine1 && MatchFilterBB) @@ -743,7 +743,7 @@ CurDAG->Combine(BeforeLegalizeTypes, AA, OptLevel); } - DEBUG(dbgs() << "Optimized lowered selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Optimized lowered selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); // Second step, hack on the DAG until it only uses operations and types that @@ -758,7 +758,7 @@ Changed = CurDAG->LegalizeTypes(); } - DEBUG(dbgs() << "Type-legalized selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Type-legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); // Only allow creation of legal node types. @@ -775,7 +775,7 @@ CurDAG->Combine(AfterLegalizeTypes, AA, OptLevel); } - DEBUG(dbgs() << "Optimized type-legalized selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Optimized type-legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); } @@ -786,7 +786,7 @@ } if (Changed) { - DEBUG(dbgs() << "Vector-legalized selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Vector-legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); { @@ -795,7 +795,7 @@ CurDAG->LegalizeTypes(); } - DEBUG(dbgs() << "Vector/type-legalized selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Vector/type-legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); if (ViewDAGCombineLT && MatchFilterBB) @@ -808,7 +808,7 @@ CurDAG->Combine(AfterLegalizeVectorOps, AA, OptLevel); } - DEBUG(dbgs() << "Optimized vector-legalized selection DAG: BB#" + DEBUG(dbgs() << "Optimized vector-legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); } @@ -821,7 +821,7 @@ CurDAG->Legalize(); } - DEBUG(dbgs() << "Legalized selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); if (ViewDAGCombine2 && MatchFilterBB) @@ -834,7 +834,7 @@ CurDAG->Combine(AfterLegalizeDAG, AA, OptLevel); } - DEBUG(dbgs() << "Optimized legalized selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Optimized legalized selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); if (OptLevel != CodeGenOpt::None) @@ -851,7 +851,7 @@ DoInstructionSelection(); } - DEBUG(dbgs() << "Selected selection DAG: BB#" << BlockNumber + DEBUG(dbgs() << "Selected selection DAG: %bb." << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump()); if (ViewSchedDAGs && MatchFilterBB) @@ -919,7 +919,7 @@ } // end anonymous namespace void SelectionDAGISel::DoInstructionSelection() { - DEBUG(dbgs() << "===== Instruction selection begins: BB#" + DEBUG(dbgs() << "===== Instruction selection begins: %bb." << FuncInfo->MBB->getNumber() << " '" << FuncInfo->MBB->getName() << "'\n"); Index: lib/CodeGen/SlotIndexes.cpp =================================================================== --- lib/CodeGen/SlotIndexes.cpp +++ lib/CodeGen/SlotIndexes.cpp @@ -264,7 +264,7 @@ } for (unsigned i = 0, e = MBBRanges.size(); i != e; ++i) - dbgs() << "BB#" << i << "\t[" << MBBRanges[i].first << ';' + dbgs() << "%bb." << i << "\t[" << MBBRanges[i].first << ';' << MBBRanges[i].second << ")\n"; } #endif Index: lib/CodeGen/SplitKit.cpp =================================================================== --- lib/CodeGen/SplitKit.cpp +++ lib/CodeGen/SplitKit.cpp @@ -729,7 +729,7 @@ assert(OpenIdx && "openIntv not called before enterIntvAtEnd"); SlotIndex End = LIS.getMBBEndIdx(&MBB); SlotIndex Last = End.getPrevSlot(); - DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last); + DEBUG(dbgs() << " enterIntvAtEnd %bb." << MBB.getNumber() << ", " << Last); VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last); if (!ParentVNI) { DEBUG(dbgs() << ": not live\n"); @@ -808,7 +808,7 @@ SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) { assert(OpenIdx && "openIntv not called before leaveIntvAtTop"); SlotIndex Start = LIS.getMBBStartIdx(&MBB); - DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start); + DEBUG(dbgs() << " leaveIntvAtTop %bb." << MBB.getNumber() << ", " << Start); VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start); if (!ParentVNI) { @@ -906,14 +906,14 @@ // MBB isn't in a loop, it doesn't get any better. All dominators have a // higher frequency by definition. if (!Loop) { - DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#" + DEBUG(dbgs() << "Def in %bb." << DefMBB->getNumber() << " dominates %bb." << MBB->getNumber() << " at depth 0\n"); return MBB; } // We'll never be able to exit the DefLoop. if (Loop == DefLoop) { - DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#" + DEBUG(dbgs() << "Def in %bb." << DefMBB->getNumber() << " dominates %bb." << MBB->getNumber() << " in the same loop\n"); return MBB; } @@ -923,7 +923,7 @@ if (Depth < BestDepth) { BestMBB = MBB; BestDepth = Depth; - DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#" + DEBUG(dbgs() << "Def in %bb." << DefMBB->getNumber() << " dominates %bb." << MBB->getNumber() << " at depth " << Depth << '\n'); } @@ -1063,7 +1063,7 @@ DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def << " for parent " << ParentVNI->id << '@' << ParentVNI->def - << " hoist to BB#" << Dom.first->getNumber() << ' ' + << " hoist to %bb." << Dom.first->getNumber() << ' ' << Dom.second << '\n'); } @@ -1173,7 +1173,7 @@ if (Start != BlockStart) { VNInfo *VNI = LI.extendInBlock(BlockStart, std::min(BlockEnd, End)); assert(VNI && "Missing def for complex mapped value"); - DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber()); + DEBUG(dbgs() << ':' << VNI->id << "*%bb." << MBB->getNumber()); // MBB has its own def. Is it also live-out? if (BlockEnd <= End) LRC.setLiveOutValue(&*MBB, VNI); @@ -1186,7 +1186,7 @@ // Handle the live-in blocks covered by [Start;End). assert(Start <= BlockStart && "Expected live-in block"); while (BlockStart < End) { - DEBUG(dbgs() << ">BB#" << MBB->getNumber()); + DEBUG(dbgs() << ">%bb." << MBB->getNumber()); BlockEnd = LIS.getMBBEndIdx(&*MBB); if (BlockStart == ParentVNI->def) { // This block has the def of a parent PHI, so it isn't live-in. @@ -1329,7 +1329,7 @@ unsigned RegIdx = RegAssign.lookup(Idx); LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx)); MO.setReg(LI.reg); - DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t' + DEBUG(dbgs() << " rewr %bb." << MI->getParent()->getNumber() << '\t' << Idx << ':' << RegIdx << '\t' << *MI); // Extend liveness to Idx if the instruction reads reg. @@ -1563,7 +1563,7 @@ SlotIndex Start, Stop; std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum); - DEBUG(dbgs() << "BB#" << MBBNum << " [" << Start << ';' << Stop + DEBUG(dbgs() << "%bb." << MBBNum << " [" << Start << ';' << Stop << ") intf " << LeaveBefore << '-' << EnterAfter << ", live-through " << IntvIn << " -> " << IntvOut); @@ -1665,7 +1665,7 @@ SlotIndex Start, Stop; std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); - DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop + DEBUG(dbgs() << "%bb." << BI.MBB->getNumber() << " [" << Start << ';' << Stop << "), uses " << BI.FirstInstr << '-' << BI.LastInstr << ", reg-in " << IntvIn << ", leave before " << LeaveBefore << (BI.LiveOut ? ", stack-out" : ", killed in block")); @@ -1757,7 +1757,7 @@ SlotIndex Start, Stop; std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); - DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop + DEBUG(dbgs() << "%bb." << BI.MBB->getNumber() << " [" << Start << ';' << Stop << "), uses " << BI.FirstInstr << '-' << BI.LastInstr << ", reg-out " << IntvOut << ", enter after " << EnterAfter << (BI.LiveIn ? ", stack-in" : ", defined in block")); Index: lib/CodeGen/StackColoring.cpp =================================================================== --- lib/CodeGen/StackColoring.cpp +++ lib/CodeGen/StackColoring.cpp @@ -739,7 +739,7 @@ } else { for (auto Slot : slots) { DEBUG(dbgs() << "Found a use of slot #" << Slot); - DEBUG(dbgs() << " at BB#" << MBB->getNumber() << " index "); + DEBUG(dbgs() << " at %bb." << MBB->getNumber() << " index "); DEBUG(Indexes->getInstructionIndex(MI).print(dbgs())); const AllocaInst *Allocation = MFI->getObjectAllocation(Slot); if (Allocation) { Index: lib/CodeGen/TailDuplicator.cpp =================================================================== --- lib/CodeGen/TailDuplicator.cpp +++ lib/CodeGen/TailDuplicator.cpp @@ -111,8 +111,8 @@ } } if (!Found) { - dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI; - dbgs() << " missing input from predecessor BB#" + dbgs() << "Malformed PHI in %bb." << MBB->getNumber() << ": " << *MI; + dbgs() << " missing input from predecessor %bb." << PredBB->getNumber() << '\n'; llvm_unreachable(nullptr); } @@ -121,15 +121,15 @@ for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) { MachineBasicBlock *PHIBB = MI->getOperand(i + 1).getMBB(); if (CheckExtra && !Preds.count(PHIBB)) { - dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber() << ": " + dbgs() << "Warning: malformed PHI in %bb." << MBB->getNumber() << ": " << *MI; - dbgs() << " extra input from predecessor BB#" << PHIBB->getNumber() + dbgs() << " extra input from predecessor %bb." << PHIBB->getNumber() << '\n'; llvm_unreachable(nullptr); } if (PHIBB->getNumber() < 0) { - dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI; - dbgs() << " non-existing BB#" << PHIBB->getNumber() << '\n'; + dbgs() << "Malformed PHI in %bb." << MBB->getNumber() << ": " << *MI; + dbgs() << " non-existing %bb." << PHIBB->getNumber() << '\n'; llvm_unreachable(nullptr); } } @@ -783,7 +783,7 @@ MachineBasicBlock *ForcedLayoutPred, SmallVectorImpl &TDBBs, SmallVectorImpl &Copies) { - DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n'); + DEBUG(dbgs() << "\n*** Tail-duplicating %bb." << TailBB->getNumber() << '\n'); DenseSet UsedByPhi; getRegsUsedByPHIs(*TailBB, &UsedByPhi); Index: lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp =================================================================== --- lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp +++ lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp @@ -1850,8 +1850,8 @@ if (!CodeBBEnd->isSuccessor(MergeBB)) CodeBBEnd->addSuccessor(MergeBB); - DEBUG(dbgs() << "Moved MBB#" << CodeBBStart->getNumber() << " through MBB#" - << CodeBBEnd->getNumber() << "\n"); + DEBUG(dbgs() << "Moved " << printMBBReference(*CodeBBStart) << " through " + << printMBBReference(*CodeBBEnd) << "\n"); // If we have a single predecessor we can find a reasonable debug location MachineBasicBlock *SinglePred = Index: lib/Target/SystemZ/SystemZMachineScheduler.cpp =================================================================== --- lib/Target/SystemZ/SystemZMachineScheduler.cpp +++ lib/Target/SystemZ/SystemZMachineScheduler.cpp @@ -74,7 +74,7 @@ void SystemZPostRASchedStrategy::enterMBB(MachineBasicBlock *NextMBB) { assert ((SchedStates.find(NextMBB) == SchedStates.end()) && "Entering MBB twice?"); - DEBUG (dbgs() << "+++ Entering MBB#" << NextMBB->getNumber()); + DEBUG(dbgs() << "+++ Entering " << printMBBReference(*NextMBB)); MBB = NextMBB; /// Create a HazardRec for MBB, save it in SchedStates and set HazardRec to @@ -93,8 +93,8 @@ SchedStates.find(SinglePredMBB) == SchedStates.end()) return; - DEBUG (dbgs() << "+++ Continued scheduling from MBB#" - << SinglePredMBB->getNumber() << "\n";); + DEBUG(dbgs() << "+++ Continued scheduling from " + << printMBBReference(*SinglePredMBB) << "\n";); HazardRec->copyState(SchedStates[SinglePredMBB]); @@ -113,7 +113,7 @@ } void SystemZPostRASchedStrategy::leaveMBB() { - DEBUG (dbgs() << "+++ Leaving MBB#" << MBB->getNumber() << "\n";); + DEBUG(dbgs() << "+++ Leaving " << printMBBReference(*MBB) << "\n";); // Advance to first terminator. The successor block will handle terminators // dependent on CFG layout (T/NT branch etc). Index: lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp =================================================================== --- lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp +++ lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp @@ -205,8 +205,7 @@ continue; unsigned Index = MIB.getInstr()->getNumExplicitOperands() - 1; - DEBUG(dbgs() << "MBB#" << MBB->getNumber() << " has index " << Index - << "\n"); + DEBUG(dbgs() << printMBBReference(*MBB) << " has index " << Index << "\n"); Pair.first->second = Index; for (auto Pred : MBB->predecessors())