Index: include/llvm/CodeGen/ExecutionDepsFix.h =================================================================== --- include/llvm/CodeGen/ExecutionDepsFix.h +++ include/llvm/CodeGen/ExecutionDepsFix.h @@ -82,14 +82,10 @@ } // Mark domain as available. - void addDomain(unsigned domain) { - AvailableDomains |= 1u << domain; - } + void addDomain(unsigned domain) { AvailableDomains |= 1u << domain; } // Restrict to a single domain available. - void setSingleDomain(unsigned domain) { - AvailableDomains = 1u << domain; - } + void setSingleDomain(unsigned domain) { AvailableDomains = 1u << domain; } // Return bitmask of domains that are available and in mask. unsigned getCommonDomains(unsigned mask) const { @@ -144,7 +140,6 @@ bool traverse(MachineFunction &mf); }; - class ExecutionDomainFix : public MachineFunctionPass, LoopTraversal { SpecificBumpPtrAllocator Allocator; SmallVector Avail; @@ -186,11 +181,12 @@ // DomainValue allocation. DomainValue *alloc(int domain = -1); DomainValue *retain(DomainValue *DV) { - if (DV) ++DV->Refs; + if (DV) + ++DV->Refs; return DV; } - void release(DomainValue*); - DomainValue *resolve(DomainValue*&); + void release(DomainValue *); + DomainValue *resolve(DomainValue *&); // LiveRegs manipulations. void setLiveReg(int rx, DomainValue *DV); @@ -207,8 +203,8 @@ // Instruction processing bool visitInstr(MachineInstr *); void processDefs(MachineInstr *, bool Kill); - void visitSoftInstr(MachineInstr*, unsigned mask); - void visitHardInstr(MachineInstr*, unsigned domain); + void visitSoftInstr(MachineInstr *, unsigned mask); + void visitHardInstr(MachineInstr *, unsigned domain); }; class BreakFalseDeps : public MachineFunctionPass, LoopTraversal { @@ -260,8 +256,8 @@ // Dependency breaking. bool pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx, unsigned Pref); - bool shouldBreakDependence(MachineInstr*, unsigned OpIdx, unsigned Pref); - void processUndefReads(MachineBasicBlock*); + bool shouldBreakDependence(MachineInstr *, unsigned OpIdx, unsigned Pref); + void processUndefReads(MachineBasicBlock *); // LoopTraversal overrides. void enterBasicBlock(MachineBasicBlock *) override; @@ -272,6 +268,6 @@ void processDefs(MachineInstr *, bool breakDependency); }; -} // end namepsace llvm +} // namespace llvm #endif // LLVM_CODEGEN_EXECUTIONDEPSFIX_H Index: lib/CodeGen/ExecutionDepsFix.cpp =================================================================== --- lib/CodeGen/ExecutionDepsFix.cpp +++ lib/CodeGen/ExecutionDepsFix.cpp @@ -26,9 +26,8 @@ } DomainValue *ExecutionDomainFix::alloc(int domain) { - DomainValue *dv = Avail.empty() ? - new(Allocator.Allocate()) DomainValue : - Avail.pop_back_val(); + DomainValue *dv = Avail.empty() ? new (Allocator.Allocate()) DomainValue + : Avail.pop_back_val(); if (domain >= 0) dv->addDomain(domain); assert(dv->Refs == 0 && "Reference count wasn't cleared"); @@ -64,7 +63,8 @@ return DV; // DV has a chain. Find the end. - do DV = DV->Next; + do + DV = DV->Next; while (DV->Next); // Update DVRef to point to DV. @@ -205,7 +205,8 @@ // Try to coalesce live-out register units from predecessors. for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(), - pe = MBB->pred_end(); pi != pe; ++pi) { + pe = MBB->pred_end(); + pi != pe; ++pi) { const RegDefInfo &IncomingDefs = OutDefs[(*pi)->getNumber()]; // Incoming is empty if this is a backedge from a BB // we haven't processed yet @@ -241,7 +242,8 @@ // Try to coalesce live-out registers from predecessors. for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(), - pe = MBB->pred_end(); pi != pe; ++pi) { + pe = MBB->pred_end(); + pi != pe; ++pi) { RegsDVInfo &Incoming = OutRegs[(*pi)->getNumber()]; // Incoming is empty if this is a backedge from a BB // we haven't processed yet @@ -323,8 +325,8 @@ /// is truly dependent on, or use a register with clearance higher than Pref. /// Returns true if it was able to find a true dependency, thus not requiring /// a dependency breaking instruction regardless of clearance. -bool BreakFalseDeps::pickBestRegisterForUndef(MachineInstr *MI, - unsigned OpIdx, unsigned Pref) { +bool BreakFalseDeps::pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx, + unsigned Pref) { MachineOperand &MO = MI->getOperand(OpIdx); assert(MO.isUndef() && "Expected undef machine operand"); @@ -410,8 +412,8 @@ assert(!MI->isDebugValue() && "Won't process debug values"); const MCInstrDesc &MCID = MI->getDesc(); for (unsigned i = 0, - e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); - i != e; ++i) { + e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); + i != e; ++i) { MachineOperand &MO = MI->getOperand(i); if (!MO.isReg()) continue; @@ -448,8 +450,8 @@ } const MCInstrDesc &MCID = MI->getDesc(); for (unsigned i = 0, - e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); - i != e; ++i) { + e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); + i != e; ++i) { MachineOperand &MO = MI->getOperand(i); if (!MO.isReg() || !MO.getReg()) continue; @@ -517,9 +519,11 @@ void ExecutionDomainFix::visitHardInstr(MachineInstr *mi, unsigned domain) { // Collapse all uses. for (unsigned i = mi->getDesc().getNumDefs(), - e = mi->getDesc().getNumOperands(); i != e; ++i) { + e = mi->getDesc().getNumOperands(); + i != e; ++i) { MachineOperand &mo = mi->getOperand(i); - if (!mo.isReg()) continue; + if (!mo.isReg()) + continue; for (int rx : regIndices(mo.getReg())) { force(rx, domain); } @@ -528,7 +532,8 @@ // Kill all defs and force them. for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { MachineOperand &mo = mi->getOperand(i); - if (!mo.isReg()) continue; + if (!mo.isReg()) + continue; for (int rx : regIndices(mo.getReg())) { kill(rx); force(rx, domain); @@ -546,9 +551,11 @@ SmallVector used; if (!LiveRegs.empty()) for (unsigned i = mi->getDesc().getNumDefs(), - e = mi->getDesc().getNumOperands(); i != e; ++i) { + e = mi->getDesc().getNumOperands(); + i != e; ++i) { MachineOperand &mo = mi->getOperand(i); - if (!mo.isReg()) continue; + if (!mo.isReg()) + continue; for (int rx : regIndices(mo.getReg())) { DomainValue *dv = LiveRegs[rx]; if (dv == nullptr) @@ -560,7 +567,8 @@ // Restrict available domains to the ones in common with the operand. // If there are no common domains, we must pay the cross-domain // penalty for this operand. - if (common) available = common; + if (common) + available = common; } else if (common) // Open DomainValue is compatible, save it for merging. used.push_back(rx); @@ -631,9 +639,10 @@ // all the operators, including imp-def ones. for (MachineInstr::mop_iterator ii = mi->operands_begin(), ee = mi->operands_end(); - ii != ee; ++ii) { + ii != ee; ++ii) { MachineOperand &mo = *ii; - if (!mo.isReg()) continue; + if (!mo.isReg()) + continue; for (int rx : regIndices(mo.getReg())) { if (!LiveRegs[rx] || (mo.isDef() && LiveRegs[rx] != dv)) { kill(rx); @@ -644,30 +653,30 @@ } void ExecutionDomainFix::processBasicBlock(MachineBasicBlock *MBB, - bool PrimaryPass) { + bool PrimaryPass) { // Go over the instructions. // Kill domain values only in the primary traversal pass. for (MachineInstr &MI : *MBB) { - if (!MI.isDebugValue()) { - bool Kill = false; - if (PrimaryPass) - Kill = visitInstr(&MI); - processDefs(&MI, Kill); - } + if (MI.isDebugValue()) + continue; + bool Kill = false; + if (PrimaryPass) + Kill = visitInstr(&MI); + processDefs(&MI, Kill); } } void BreakFalseDeps::processBasicBlock(MachineBasicBlock *MBB, - bool PrimaryPass) { + bool PrimaryPass) { // If this block is not done, it makes little sense to make any decisions // based on clearance information. We need to make a second pass anyway, // and by then we'll have better information, so we can avoid doing the work // to try and break dependencies now. bool breakDependency = isBlockDone(MBB); for (MachineInstr &MI : *MBB) { - if (!MI.isDebugValue()) { - processDefs(&MI, breakDependency); - } + if (MI.isDebugValue()) + continue; + processDefs(&MI, breakDependency); } if (breakDependency) processUndefReads(MBB); @@ -725,10 +734,12 @@ */ MachineBasicBlock *Entry = &*mf.begin(); - ReversePostOrderTraversal RPOT(Entry); + ReversePostOrderTraversal RPOT(Entry); SmallVector Workqueue; - for (ReversePostOrderTraversal::rpo_iterator - MBBI = RPOT.begin(), MBBE = RPOT.end(); MBBI != MBBE; ++MBBI) { + for (ReversePostOrderTraversal::rpo_iterator + MBBI = RPOT.begin(), + MBBE = RPOT.end(); + MBBI != MBBE; ++MBBI) { MachineBasicBlock *MBB = *MBBI; // N.B: IncomingProcessed and IncomingCompleted were already updated while // processing this block's predecessors.