Index: lib/Target/AMDGPU/AMDGPU.td
===================================================================
--- lib/Target/AMDGPU/AMDGPU.td
+++ lib/Target/AMDGPU/AMDGPU.td
@@ -518,7 +518,8 @@
 
 def FeatureISAVersion7_0_0 : SubtargetFeatureISAVersion <7,0,0,
   [FeatureSeaIslands,
-   FeatureLDSBankCount32]>;
+   FeatureLDSBankCount32,
+   FeatureXNACK]>;
 
 def FeatureISAVersion7_0_1 : SubtargetFeatureISAVersion <7,0,1,
   [FeatureSeaIslands,
Index: test/CodeGen/AMDGPU/flat-scratch-reg.ll
===================================================================
--- test/CodeGen/AMDGPU/flat-scratch-reg.ll
+++ test/CodeGen/AMDGPU/flat-scratch-reg.ll
@@ -12,7 +12,7 @@
 ; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-VI-XNACK -check-prefix=GCN %s
 
 ; GCN-LABEL: {{^}}no_vcc_no_flat:
-; HSA-CI: is_xnack_enabled = 0
+; HSA-CI: is_xnack_enabled = 1
 ; HSA-VI-NOXNACK: is_xnack_enabled = 0
 ; HSA-VI-XNACK: is_xnack_enabled = 1
 
@@ -26,7 +26,7 @@
 }
 
 ; GCN-LABEL: {{^}}vcc_no_flat:
-; HSA-CI: is_xnack_enabled = 0
+; HSA-CI: is_xnack_enabled = 1
 ; HSA-VI-NOXNACK: is_xnack_enabled = 0
 ; HSA-VI-XNACK: is_xnack_enabled = 1
 
@@ -40,7 +40,7 @@
 }
 
 ; GCN-LABEL: {{^}}no_vcc_flat:
-; HSA-CI: is_xnack_enabled = 0
+; HSA-CI: is_xnack_enabled = 1
 ; HSA-VI-NOXNACK: is_xnack_enabled = 0
 ; HSA-VI-XNACK: is_xnack_enabled = 1
 
Index: test/CodeGen/AMDGPU/frame-index-amdgiz.ll
===================================================================
--- test/CodeGen/AMDGPU/frame-index-amdgiz.ll
+++ test/CodeGen/AMDGPU/frame-index-amdgiz.ll
@@ -14,8 +14,8 @@
 entry:
 ; CHECK: s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; CHECK: s_load_dword s2, s[0:1], 0xb
-; CHECK: s_load_dword s0, s[0:1], 0xc
 ; CHECK: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
+; CHECK: s_load_dword s0, s[0:1], 0xc
 ; CHECK: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
 ; CHECK: s_mov_b32 s10, -1
 ; CHECK: s_waitcnt lgkmcnt(0)