Index: include/llvm/CodeGen/GlobalISel/LegalizerCombiner.h
===================================================================
--- include/llvm/CodeGen/GlobalISel/LegalizerCombiner.h
+++ include/llvm/CodeGen/GlobalISel/LegalizerCombiner.h
@@ -201,6 +201,12 @@
       return tryCombineSExt(MI, DeadInsts);
     case TargetOpcode::G_UNMERGE_VALUES:
       return tryCombineMerges(MI, DeadInsts);
+    case TargetOpcode::G_TRUNC: {
+      bool Changed = false;
+      for (auto &Use : MRI.use_instructions(MI.getOperand(0).getReg()))
+        Changed |= tryCombineInstruction(Use, DeadInsts);
+      return Changed;
+    }
     }
   }
 
Index: lib/CodeGen/GlobalISel/Legalizer.cpp
===================================================================
--- lib/CodeGen/GlobalISel/Legalizer.cpp
+++ lib/CodeGen/GlobalISel/Legalizer.cpp
@@ -14,6 +14,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
+#include "llvm/ADT/PostOrderIterator.h"
 #include "llvm/ADT/SetVector.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerCombiner.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
@@ -63,29 +64,46 @@
   MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
   LegalizerHelper Helper(MF);
 
+  // FIXME: We could introduce new blocks and will need to fix the outer loop.
+  // Until then, keep track of the number of blocks to assert that we don't.
+  const size_t NumBlocks = MF.size();
+  MachineRegisterInfo &MRI = MF.getRegInfo();
+
   // FIXME: an instruction may need more than one pass before it is legal. For
   // example on most architectures <3 x i3> is doubly-illegal. It would
   // typically proceed along a path like: <3 x i3> -> <3 x i8> -> <8 x i8>. We
   // probably want a worklist of instructions rather than naive iterate until
   // convergence for performance reasons.
   bool Changed = false;
-  MachineBasicBlock::iterator NextMI;
   using VecType = SmallSetVector<MachineInstr *, 8>;
   VecType WorkList;
-  VecType CombineList;
-  for (auto &MBB : MF) {
-    for (auto MI = MBB.begin(); MI != MBB.end(); MI = NextMI) {
-      // Get the next Instruction before we try to legalize, because there's a
-      // good chance MI will be deleted.
-      NextMI = std::next(MI);
+  for (auto *MBB : post_order(&MF)) {
+    if (MBB->empty())
+      continue;
+    bool ReachedBegin = false;
+    for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
+         !ReachedBegin;) {
+
+      MachineInstr &MI = *MII;
+
+      // And have our iterator point to the prev instruction, if there is one.
+      if (MII == Begin)
+        ReachedBegin = true;
+      else
+        --MII;
+
+      if (isTriviallyDead(MI, MRI)) {
+        DEBUG(dbgs() << MI << "Is dead; erasing.\n");
+        MI.eraseFromParentAndMarkDBGValuesForRemoval();
+        continue;
+      }
 
       // Only legalize pre-isel generic instructions: others don't have types
       // and are assumed to be legal.
-      if (!isPreISelGenericOpcode(MI->getOpcode()))
+      if (!isPreISelGenericOpcode(MI.getOpcode()))
         continue;
       unsigned NumNewInsns = 0;
       WorkList.clear();
-      CombineList.clear();
       Helper.MIRBuilder.recordInsertions([&](MachineInstr *MI) {
         // Only legalize pre-isel generic instructions.
         // Legalization process could generate Target specific pseudo
@@ -93,73 +111,53 @@
         if (isPreISelGenericOpcode(MI->getOpcode())) {
           ++NumNewInsns;
           WorkList.insert(MI);
-          CombineList.insert(MI);
         }
+        DEBUG(dbgs() << ".. .. New MI: " << *MI;);
       });
-      WorkList.insert(&*MI);
+      WorkList.insert(&MI);
       LegalizerCombiner C(Helper.MIRBuilder, MF.getRegInfo(),
                           Helper.getLegalizerInfo());
       bool Changed = false;
       LegalizerHelper::LegalizeResult Res;
-      do {
-        assert(!WorkList.empty() && "Expecting illegal ops");
-        while (!WorkList.empty()) {
-          NumNewInsns = 0;
-          MachineInstr *CurrInst = WorkList.pop_back_val();
-          Res = Helper.legalizeInstrStep(*CurrInst);
-          // Error out if we couldn't legalize this instruction. We may want to
-          // fall back to DAG ISel instead in the future.
-          if (Res == LegalizerHelper::UnableToLegalize) {
-            Helper.MIRBuilder.stopRecordingInsertions();
-            if (Res == LegalizerHelper::UnableToLegalize) {
-              reportGISelFailure(MF, TPC, MORE, "gisel-legalize",
-                                 "unable to legalize instruction", *CurrInst);
-              return false;
-            }
-          }
-          Changed |= Res == LegalizerHelper::Legalized;
-          // If CurrInst was legalized, there's a good chance that it might have
-          // been erased. So remove it from the Combine List.
-          if (Res == LegalizerHelper::Legalized)
-            CombineList.remove(CurrInst);
-
-#ifndef NDEBUG
-          if (NumNewInsns)
-            for (unsigned I = WorkList.size() - NumNewInsns,
-                          E = WorkList.size();
-                 I != E; ++I)
-              DEBUG(dbgs() << ".. .. New MI: " << *WorkList[I];);
-#endif
-        }
-        // Do the combines.
-        while (!CombineList.empty()) {
-          NumNewInsns = 0;
-          MachineInstr *CurrInst = CombineList.pop_back_val();
-          SmallVector<MachineInstr *, 4> DeadInstructions;
-          Changed |= C.tryCombineInstruction(*CurrInst, DeadInstructions);
+      while (!WorkList.empty()) {
+        NumNewInsns = 0;
+        MachineInstr *CurrInst = WorkList.pop_back_val();
+        SmallVector<MachineInstr *, 4> DeadInstructions;
+        if (C.tryCombineInstruction(*CurrInst, DeadInstructions)) {
           for (auto *DeadMI : DeadInstructions) {
             DEBUG(dbgs() << ".. Erasing Dead Instruction " << *DeadMI);
-            CombineList.remove(DeadMI);
             WorkList.remove(DeadMI);
+            // Actually mark the instruction for deletion.
+            MachineInstr *PrevMI = &*MII;
+            if (PrevMI == DeadMI)
+              --MII;
             DeadMI->eraseFromParent();
           }
-#ifndef NDEBUG
-          if (NumNewInsns)
-            for (unsigned I = CombineList.size() - NumNewInsns,
-                          E = CombineList.size();
-                 I != E; ++I)
-              DEBUG(dbgs() << ".. .. Combine New MI: " << *CombineList[I];);
-#endif
+          Changed = true;
+          continue;
+        }
+        Res = Helper.legalizeInstrStep(*CurrInst);
+        // Error out if we couldn't legalize this instruction. We may want to
+        // fall back to DAG ISel instead in the future.
+        if (Res == LegalizerHelper::UnableToLegalize) {
+          Helper.MIRBuilder.stopRecordingInsertions();
+          if (Res == LegalizerHelper::UnableToLegalize) {
+            reportGISelFailure(MF, TPC, MORE, "gisel-legalize",
+                               "unable to legalize instruction", *CurrInst);
+            return false;
+          }
         }
-      } while (!WorkList.empty());
+        Changed |= Res == LegalizerHelper::Legalized;
+
+      }
 
       Helper.MIRBuilder.stopRecordingInsertions();
     }
   }
 
-  MachineRegisterInfo &MRI = MF.getRegInfo();
   MachineIRBuilder MIRBuilder(MF);
   LegalizerCombiner C(MIRBuilder, MRI, Helper.getLegalizerInfo());
+  MachineBasicBlock::iterator NextMI;
   for (auto &MBB : MF) {
     for (auto MI = MBB.begin(); MI != MBB.end(); MI = NextMI) {
       // Get the next Instruction before we try to legalize, because there's a
@@ -172,6 +170,16 @@
         DeadMI->eraseFromParent();
     }
   }
+  // For now don't support if new blocks are inserted - we would need to fix the
+  // outerloop for that.
+  if (MF.size() != NumBlocks) {
+    MachineOptimizationRemarkMissed R("gisel-legalize", "GISelFailure",
+                                      MF.getFunction()->getSubprogram(),
+                                      /*MBB=*/nullptr);
+    R << "inserting blocks is not supported yet";
+    reportGISelFailure(MF, TPC, MORE, R);
+    return false;
+  }
 
   return Changed;
 }
Index: test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -63,19 +63,21 @@
 }
 
   ; General legalizer inability to handle types whose size wasn't a power of 2.
-; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %vreg1<def>(s42) = G_LOAD %vreg0; mem:LD6[%addr](align=8) (in function: odd_type)
+; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %vreg1, %vreg0; mem:ST6[%addr](align=8) (in function: odd_type)
 ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_type
 ; FALLBACK-WITH-REPORT-OUT-LABEL: odd_type:
 define void @odd_type(i42* %addr) {
   %val42 = load i42, i42* %addr
+  store i42 %val42, i42* %addr
   ret void
 }
 
-; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %vreg1<def>(<7 x s32>) = G_LOAD %vreg0; mem:LD28[%addr](align=32) (in function: odd_vector)
+; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %vreg1, %vreg0; mem:ST28[%addr](align=32) (in function: odd_vector)
 ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_vector
 ; FALLBACK-WITH-REPORT-OUT-LABEL: odd_vector:
 define void @odd_vector(<7 x i32>* %addr) {
   %vec = load <7 x i32>, <7 x i32>* %addr
+  store <7 x i32> %vec, <7 x i32>* %addr
   ret void
 }
 
@@ -146,6 +148,7 @@
 
 block:
   %dummy = extractelement <2 x i16*> %vec, i32 0
+  store i16* %dummy, i16** undef
   ret void
 
 end:
@@ -153,7 +156,7 @@
   br label %block
 }
 
-; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %vreg0<def>(<2 x p0>) = G_INSERT_VECTOR_ELT %vreg1, %vreg2, %vreg3; (in function: vector_of_pointers_insertelement
+; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %vreg0, %vreg4; mem:ST16[undef] (in function: vector_of_pointers_insertelement)
 ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for vector_of_pointers_insertelement
 ; FALLBACK-WITH-REPORT-OUT-LABEL: vector_of_pointers_insertelement:
 define void @vector_of_pointers_insertelement() {
@@ -161,6 +164,7 @@
 
 block:
   %dummy = insertelement <2 x i16*> %vec, i16* null, i32 0
+  store <2 x i16*> %dummy, <2 x i16*>* undef
   ret void
 
 end:
Index: test/CodeGen/AArch64/GlobalISel/legalize-add.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-add.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-add.mir
@@ -1,4 +1,4 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -20,16 +20,6 @@
 
 ---
 name:            test_scalar_add_big
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-  - { id: 2, class: _ }
-  - { id: 3, class: _ }
-  - { id: 4, class: _ }
-  - { id: 5, class: _ }
-  - { id: 6, class: _ }
-  - { id: 7, class: _ }
-  - { id: 8, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
@@ -45,27 +35,20 @@
     ; CHECK: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[COPY1]], [[COPY3]], [[UADDE1]]
     ; CHECK: %x0 = COPY [[UADDE]](s64)
     ; CHECK: %x1 = COPY [[UADDE2]](s64)
-    %0(s64) = COPY %x0
-    %1(s64) = COPY %x1
-    %2(s64) = COPY %x2
-    %3(s64) = COPY %x3
-    %4(s128) = G_MERGE_VALUES %0, %1
-    %5(s128) = G_MERGE_VALUES %2, %3
-    %6(s128) = G_ADD %4, %5
-    %7(s64), %8(s64) = G_UNMERGE_VALUES %6
+    %0:_(s64) = COPY %x0
+    %1:_(s64) = COPY %x1
+    %2:_(s64) = COPY %x2
+    %3:_(s64) = COPY %x3
+    %4:_(s128) = G_MERGE_VALUES %0, %1
+    %5:_(s128) = G_MERGE_VALUES %2, %3
+    %6:_(s128) = G_ADD %4, %5
+    %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %6
     %x0 = COPY %7
     %x1 = COPY %8
 ...
 
 ---
 name:            test_scalar_add_small
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-  - { id: 2, class: _ }
-  - { id: 3, class: _ }
-  - { id: 4, class: _ }
-  - { id: 5, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
@@ -76,30 +59,19 @@
     ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
     ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
     ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[ADD]](s32)
-    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s8)
+    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
     ; CHECK: %x0 = COPY [[ANYEXT]](s64)
-    %0(s64) = COPY %x0
-    %1(s64) = COPY %x1
-    %2(s8) = G_TRUNC %0
-    %3(s8) = G_TRUNC %1
-    %4(s8) = G_ADD %2, %3
-    %5(s64) = G_ANYEXT %4
+    %0:_(s64) = COPY %x0
+    %1:_(s64) = COPY %x1
+    %2:_(s8) = G_TRUNC %0
+    %3:_(s8) = G_TRUNC %1
+    %4:_(s8) = G_ADD %2, %3
+    %5:_(s64) = G_ANYEXT %4
     %x0 = COPY %5
 ...
 
 ---
 name:            test_vector_add
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-  - { id: 2, class: _ }
-  - { id: 3, class: _ }
-  - { id: 4, class: _ }
-  - { id: 5, class: _ }
-  - { id: 6, class: _ }
-  - { id: 7, class: _ }
-  - { id: 8, class: _ }
 body: |
   bb.0.entry:
     liveins: %q0, %q1, %q2, %q3
@@ -113,14 +85,14 @@
     ; CHECK: [[ADD1:%[0-9]+]]:_(<2 x s64>) = G_ADD [[COPY1]], [[COPY3]]
     ; CHECK: %q0 = COPY [[ADD]](<2 x s64>)
     ; CHECK: %q1 = COPY [[ADD1]](<2 x s64>)
-    %0(<2 x s64>) = COPY %q0
-    %1(<2 x s64>) = COPY %q1
-    %2(<2 x s64>) = COPY %q2
-    %3(<2 x s64>) = COPY %q3
-    %4(<4 x s64>) = G_MERGE_VALUES %0, %1
-    %5(<4 x s64>) = G_MERGE_VALUES %2, %3
-    %6(<4 x s64>) = G_ADD %4, %5
-    %7(<2 x s64>), %8(<2 x s64>) = G_UNMERGE_VALUES %6
+    %0:_(<2 x s64>) = COPY %q0
+    %1:_(<2 x s64>) = COPY %q1
+    %2:_(<2 x s64>) = COPY %q2
+    %3:_(<2 x s64>) = COPY %q3
+    %4:_(<4 x s64>) = G_MERGE_VALUES %0, %1
+    %5:_(<4 x s64>) = G_MERGE_VALUES %2, %3
+    %6:_(<4 x s64>) = G_ADD %4, %5
+    %7:_(<2 x s64>), %8:_(<2 x s64>) = G_UNMERGE_VALUES %6
     %q0 = COPY %7
     %q1 = COPY %8
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-and.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-and.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-and.mir
@@ -19,6 +19,7 @@
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
+  - { id: 6, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
@@ -26,18 +27,20 @@
     ; CHECK-LABEL: name: test_scalar_and_small
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)
-    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
-    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[TRUNC2]]
-    ; CHECK: [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[AND]](s32)
-    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s8)
-    ; CHECK: %x0 = COPY [[ANYEXT]](s64)
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+    ; CHECK: %w0 = COPY [[COPY2]](s32)
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+    ; CHECK: %x0 = COPY [[COPY3]](s64)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %2(s8) = G_TRUNC %0
     %3(s8) = G_TRUNC %1
     %4(s8) = G_AND %2, %3
+    %6(s32) = G_ANYEXT %4
+    %w0 = COPY %6
     %5(s64) = G_ANYEXT %2
     %x0 = COPY %5
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -23,29 +24,48 @@
   - { id: 8, class: _ }
   - { id: 9, class: _ }
   - { id: 10, class: _ }
+  - { id: 11, class: _ }
+  - { id: 12, class: _ }
+  - { id: 13, class: _ }
+  - { id: 14, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_icmp
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[COPY]](s64), [[COPY1]]
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
+    ; CHECK: %w0 = COPY [[COPY2]](s32)
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C1]]
+    ; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[AND1]]
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
+    ; CHECK: %w0 = COPY [[COPY3]](s32)
+    ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
+    ; CHECK: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[INTTOPTR]](p0), [[INTTOPTR]]
+    ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
+    ; CHECK: %w0 = COPY [[COPY4]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x0
 
     %2(s8) = G_TRUNC %0
     %3(s8) = G_TRUNC %1
 
-    ; CHECK: [[CMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), %0(s64), %1
-    ; CHECK: [[CMP_T1:%[0-9]+]]:_(s1) = G_TRUNC [[CMP1]]
     %4(s1) = G_ICMP intpred(sge), %0, %1
+    %11(s32) = G_ANYEXT %4
+    %w0 = COPY %11
 
-    ; CHECK: [[CSTMASK1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
-    ; CHECK: [[T1:%[0-9]+]]:_(s32) = G_TRUNC %0(s64)
-    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[T1]], [[CSTMASK1]]
-    ; CHECK: [[CSTMASK2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
-    ; CHECK: [[T2:%[0-9]+]]:_(s32) = G_TRUNC %1(s64)
-    ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[T2]], [[CSTMASK2]]
-    ; CHECK: [[CMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND1]](s32), [[AND2]]
-    ; CHECK: [[CMP_T2:%[0-9]+]]:_(s1) = G_TRUNC [[CMP2]]
     %8(s1) = G_ICMP intpred(ult), %2, %3
+    %12(s32) = G_ANYEXT %8
+    %w0 = COPY %12
 
     %9(p0) = G_INTTOPTR %0(s64)
     %10(s1) = G_ICMP intpred(eq), %9(p0), %9(p0)
+    %14(s32) = G_ANYEXT %10
+    %w0 = COPY %14
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
@@ -29,7 +29,10 @@
     %1:_(s32) = G_ADD %0, %0
     %2:_(s64) = G_MERGE_VALUES %0, %1
     %3:_(s1) = G_EXTRACT %2, 0
+    %5:_(s32) = G_ANYEXT %3
+    %w0 = COPY %5
     %4:_(s64) = G_EXTRACT %2, 0
+    %x0 = COPY %4
 ...
 
 ---
@@ -48,6 +51,7 @@
     %2:_(s64) = G_MERGE_VALUES %0, %1
     %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %2
     %5:_(s32) = G_ADD %3, %4
+    %w0 = COPY %5
 ...
 
 ---
@@ -65,6 +69,7 @@
     %1:_(s128) = G_MERGE_VALUES %0, %0
     %2:_(s64) = G_EXTRACT %1, 0
     %3:_(s64) = G_ADD %2, %2
+    %w0 = COPY %3
 ...
 
 ---
@@ -83,6 +88,7 @@
     %2:_(s64) = G_MERGE_VALUES %0, %1
     %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %2
     %5:_(s32) = G_ADD %3, %4
+    %w0 = COPY %5
 ...
 
 ---
@@ -102,4 +108,5 @@
     %2:_(s32) = G_UNMERGE_VALUES %1
     %3:_(s32) = G_MUL %2, %2
     %4:_(s32) = G_ADD %2, %3
+    %w0 = COPY %4
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
@@ -30,20 +30,35 @@
 
     ; CHECK-LABEL: name: test_constant
     ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+    ; CHECK: %w0 = COPY [[COPY]](s32)
     ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
-    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[C1]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[C2]](s32)
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
+    ; CHECK: %w0 = COPY [[COPY2]](s32)
     ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
+    ; CHECK: %w0 = COPY [[C3]](s32)
     ; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+    ; CHECK: %x0 = COPY [[C4]](s64)
     ; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+    ; CHECK: %x0 = COPY [[C5]](s64)
     %0(s1) = G_CONSTANT i1 0
+    %6:_(s32) = G_ANYEXT %0
+    %w0 = COPY %6
     %1(s8) = G_CONSTANT i8 42
+    %7:_(s32) = G_ANYEXT %1
+    %w0 = COPY %7
     %2(s16) = G_CONSTANT i16 65535
+    %8:_(s32) = G_ANYEXT %2
+    %w0 = COPY %8
     %3(s32) = G_CONSTANT i32 -1
+    %w0 = COPY %3
     %4(s64) = G_CONSTANT i64 1
+    %x0 = COPY %4
     %5(s64) = G_CONSTANT i64 0
+    %x0 = COPY %5
 ...
 
 ---
@@ -57,12 +72,20 @@
 
     ; CHECK-LABEL: name: test_fconstant
     ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
+    ; CHECK: %w0 = COPY [[C]](s32)
     ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00
+    ; CHECK: %x0 = COPY [[C1]](s64)
     ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT half 0xH0000
     ; CHECK: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[C2]](s32)
+    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
+    ; CHECK: %w0 = COPY [[ANYEXT]](s32)
     %0(s32) = G_FCONSTANT float 1.0
+    %w0 = COPY %0
     %1(s64) = G_FCONSTANT double 2.0
+    %x0 = COPY %1
     %2(s16) = G_FCONSTANT half 0.0
+    %3:_(s32) = G_ANYEXT %2
+    %w0 = COPY %3
 ...
 
 ---
@@ -74,5 +97,9 @@
 
     ; CHECK-LABEL: name: test_global
     ; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
+    ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
+    ; CHECK: %x0 = COPY [[PTRTOINT]](s64)
     %0(p0) = G_GLOBAL_VALUE @var
+    %1:_(s64) = G_PTRTOINT %0
+    %x0 = COPY %1
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-div.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-div.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-div.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -21,35 +22,42 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_div
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]]
+    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]]
+    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]]
+    ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]]
+    ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SDIV]](s32)
+    ; CHECK: %w0 = COPY [[COPY2]](s32)
+    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC2]], [[C2]]
+    ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC3]], [[C3]]
+    ; CHECK: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]]
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UDIV]](s32)
+    ; CHECK: %w0 = COPY [[COPY3]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %2(s8) = G_TRUNC %0
     %3(s8) = G_TRUNC %1
 
-    ; CHECK: [[A:%.*]]:_(s64) = COPY %x0
-    ; CHECK: [[B:%.*]]:_(s64) = COPY %x1
-    ; CHECK: [[C1:%.*]]:_(s32) = G_CONSTANT i32 24
-    ; CHECK: [[S1:%.*]]:_(s32) = G_TRUNC [[A]]
-    ; CHECK: [[SHL1:%.*]]:_(s32) = G_SHL [[S1]], [[C1]]
-    ; CHECK: [[SEXT1:%.*]]:_(s32) = G_ASHR [[SHL1]], [[C1]]
-    ; CHECK: [[C2:%.*]]:_(s32) = G_CONSTANT i32 24
-    ; CHECK: [[S2:%.*]]:_(s32) = G_TRUNC [[B]]
-    ; CHECK: [[SHL2:%.*]]:_(s32) = G_SHL [[S2]], [[C2]]
-    ; CHECK: [[SEXT2:%.*]]:_(s32) = G_ASHR [[SHL2]], [[C2]]
-    ; CHECK: [[DIV:%.*]]:_(s32) = G_SDIV [[SEXT1]], [[SEXT2]]
-    ; CHECK: [[RES:%.*]]:_(s8) = G_TRUNC [[DIV]]
 
     %4(s8) = G_SDIV %2, %3
+    %6:_(s32) = G_ANYEXT %4
+    %w0 = COPY %6
 
 
-    ; CHECK: [[CMASK1:%.*]]:_(s32) = G_CONSTANT i32 255
-    ; CHECK: [[T1:%.*]]:_(s32) = G_TRUNC [[A]]
-    ; CHECK: [[LHS32:%.*]]:_(s32) = G_AND [[T1]], [[CMASK1]]
-    ; CHECK: [[CMASK2:%.*]]:_(s32) = G_CONSTANT i32 255
-    ; CHECK: [[T2:%.*]]:_(s32) = G_TRUNC [[B]]
-    ; CHECK: [[RHS32:%.*]]:_(s32) = G_AND [[T2]], [[CMASK2]]
-    ; CHECK: [[QUOT32:%[0-9]+]]:_(s32) = G_UDIV [[LHS32]], [[RHS32]]
-    ; CHECK: [[RES:%[0-9]+]]:_(s8) = G_TRUNC [[QUOT32]]
     %5(s8) = G_UDIV %2, %3
+    %7:_(s32) = G_ANYEXT %5
+    %w0 = COPY %7
 
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -34,46 +35,109 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_ext
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC]](s32)
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC1]](s32)
+    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC2]](s32)
+    ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC3]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+    ; CHECK: %x0 = COPY [[COPY1]](s64)
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C]]
+    ; CHECK: %x0 = COPY [[AND]](s64)
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+    ; CHECK: %x0 = COPY [[COPY3]](s64)
+    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+    ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+    ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY4]], [[C1]]
+    ; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[TRUNC3]]2, [[C1]]
+    ; CHECK: %x0 = COPY [[ASHR]](s64)
+    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
+    ; CHECK: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC4]], [[C2]]
+    ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C2]]
+    ; CHECK: %w0 = COPY [[ASHR1]](s32)
+    ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC5]], [[C3]]
+    ; CHECK: %w0 = COPY [[AND1]](s32)
+    ; CHECK: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC6]](s32)
+    ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK: [[TRUNC7:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[TRUNC7]], [[C4]]
+    ; CHECK: %w0 = COPY [[AND2]](s32)
+    ; CHECK: [[TRUNC8:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC8]](s32)
+    ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+    ; CHECK: [[TRUNC9:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[TRUNC9]], [[C5]]
+    ; CHECK: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C5]]
+    ; CHECK: %w0 = COPY [[ASHR2]](s32)
+    ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK: [[TRUNC10:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C6]](s32)
+    ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[TRUNC10]], [[COPY5]]
+    ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND3]](s32)
+    ; CHECK: %w0 = COPY [[COPY6]](s32)
+    ; CHECK: [[TRUNC11:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC11]](s32)
+    ; CHECK: [[TRUNC12:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[TRUNC12]](s32)
+    ; CHECK: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[TRUNC12]](s32)
+    ; CHECK: %x0 = COPY [[FPEXT]](s64)
     %0(s64) = COPY %x0
 
-    ; CHECK: %1:_(s1) = G_TRUNC %0
-    ; CHECK: %2:_(s8) = G_TRUNC %0
-    ; CHECK: %3:_(s16) = G_TRUNC %0
-    ; CHECK: %4:_(s32) = G_TRUNC %0
     %1(s1) = G_TRUNC %0
+    %19:_(s32) = G_ANYEXT %1
+    %w0 = COPY %19
     %2(s8) = G_TRUNC %0
+    %20:_(s32) = G_ANYEXT %2
+    %w0 = COPY %20
     %3(s16) = G_TRUNC %0
+    %21:_(s32) = G_ANYEXT %3
+    %w0 = COPY %21
     %4(s32) = G_TRUNC %0
+    %w0 = COPY %4
 
-    ; CHECK: %5:_(s64) = G_ANYEXT %1
-    ; CHECK: %6:_(s64) = G_ZEXT %2
-    ; CHECK: %7:_(s64) = G_ANYEXT %3
-    ; CHECK: %8:_(s64) = G_SEXT %4
     %5(s64) = G_ANYEXT %1
+    %x0 = COPY %5
     %6(s64) = G_ZEXT %2
+    %x0 = COPY %6
     %7(s64) = G_ANYEXT %3
+    %x0 = COPY %7
     %8(s64) = G_SEXT %4
+    %x0 = COPY %8
 
-    ; CHECK: %9:_(s32) = G_SEXT %1
-    ; CHECK: %10:_(s32) = G_ZEXT %2
-    ; CHECK: %11:_(s32) = G_ANYEXT %3
     %9(s32) = G_SEXT %1
+    %w0 = COPY %9
     %10(s32) = G_ZEXT %2
+    %w0 = COPY %10
     %11(s32) = G_ANYEXT %3
+    %w0 = COPY %11
 
-    ; CHECK: %12:_(s32) = G_ZEXT %1
-    ; CHECK: %13:_(s32) = G_ANYEXT %2
-    ; CHECK: %14:_(s32) = G_SEXT %3
     %12(s32) = G_ZEXT %1
+    %w0 = COPY %12
     %13(s32) = G_ANYEXT %2
+    %w0 = COPY %13
     %14(s32) = G_SEXT %3
+    %w0 = COPY %14
 
-    ; CHECK: %15:_(s8) = G_ZEXT %1
-    ; CHECK: %16:_(s16) = G_ANYEXT %2
     %15(s8) = G_ZEXT %1
+    %22:_(s32) = G_ANYEXT %15
+    %w0 = COPY %22
     %16(s16) = G_ANYEXT %2
+    %23:_(s32) = G_ANYEXT %16
+    %w0 = COPY %23
 
-    ; CHECK: %18:_(s64) = G_FPEXT %17
     %17(s32) = G_TRUNC  %0
+    %w0 = COPY %17
     %18(s64) = G_FPEXT %17
+    %x0 = COPY %18
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
@@ -11,15 +11,13 @@
     ; value stored is forwarded directly from first load.
 
     ; CHECK-LABEL: name: test_extracts_1
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
-    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY %w1
-    ; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY %x2
-    ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY2]](p0) :: (load 16)
+    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY %x2
+    ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 16)
     ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
-    ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY2]], [[C]](s64)
+    ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64)
     ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 16)
-    ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64)
-    ; CHECK: G_STORE [[COPY3]](s64), [[COPY2]](p0) :: (store 8)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64)
+    ; CHECK: G_STORE [[COPY1]](s64), [[COPY]](p0) :: (store 8)
     ; CHECK: RET_ReallyLR
     %0:_(s64) = COPY %x0
     %1:_(s32) = COPY %w1
@@ -38,18 +36,16 @@
 
       ; Low extraction wipes takes whole low register. High extraction is real.
     ; CHECK-LABEL: name: test_extracts_2
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
-    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY %w1
-    ; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY %x2
-    ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY2]](p0) :: (load 16)
+    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY %x2
+    ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 16)
     ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
-    ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY2]], [[C]](s64)
+    ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64)
     ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 16)
-    ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64)
     ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[LOAD1]](s64), 0
-    ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[EXTRACT]](s32)
-    ; CHECK: G_STORE [[COPY3]](s64), [[COPY2]](p0) :: (store 8)
-    ; CHECK: G_STORE [[COPY4]](s32), [[COPY2]](p0) :: (store 4)
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[EXTRACT]](s32)
+    ; CHECK: G_STORE [[COPY1]](s64), [[COPY]](p0) :: (store 8)
+    ; CHECK: G_STORE [[COPY2]](s32), [[COPY]](p0) :: (store 4)
     ; CHECK: RET_ReallyLR
     %0:_(s64) = COPY %x0
     %1:_(s32) = COPY %w1
@@ -75,11 +71,13 @@
     ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s64), 32
     ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY1]](s64), 0
     ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[EXTRACT]](s32), [[EXTRACT1]](s32)
+    ; CHECK: %x0 = COPY [[MV]](s64)
     ; CHECK: RET_ReallyLR
     %0:_(s64) = COPY %x0
     %1:_(s64) = COPY %x1
     %2:_(s128) = G_MERGE_VALUES %0, %1
     %3:_(s64) = G_EXTRACT %2, 32
+    %x0 = COPY %3
     RET_ReallyLR
 ...
 
@@ -92,13 +90,14 @@
 
     ; CHECK-LABEL: name: test_extracts_4
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
-    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
     ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s64), 32
-    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[EXTRACT]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[EXTRACT]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     ; CHECK: RET_ReallyLR
     %0:_(s64) = COPY %x0
     %1:_(s64) = COPY %x1
     %2:_(s128) = G_MERGE_VALUES %0, %1
     %3:_(s32) = G_EXTRACT %2, 32
+    %w0 = COPY %3
     RET_ReallyLR
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -23,19 +24,24 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_icmp
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(oge), [[COPY]](s64), [[COPY1]]
+    ; CHECK: %w0 = COPY [[FCMP]](s32)
+    ; CHECK: [[FCMP1:%[0-9]+]]:_(s32) = G_FCMP floatpred(uno), [[TRUNC]](s32), [[TRUNC1]]
+    ; CHECK: %w0 = COPY [[FCMP1]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x0
 
     %2(s32) = G_TRUNC %0
     %3(s32) = G_TRUNC %1
 
-    ; CHECK: [[CMP1:%[0-9]+]]:_(s32) = G_FCMP floatpred(oge), %0(s64), %1
-    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[CMP1]]
     %4(s32) = G_FCMP floatpred(oge), %0, %1
-    %6(s1) = G_TRUNC %4(s32)
+    %w0 = COPY %4
 
-    ; CHECK: [[CMP2:%[0-9]+]]:_(s32) = G_FCMP floatpred(uno), %2(s32), %3
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[CMP2]]
     %5(s32) = G_FCMP floatpred(uno), %2, %3
-    %7(s1) = G_TRUNC %5(s32)
+    %w0 = COPY %5
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
@@ -31,10 +31,12 @@
   bb.0:
     liveins: %w0
     ; CHECK-LABEL: name: test_fptosi_s32_s32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
-    ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
-    %0:_(s32) = COPY %w0
+    ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+    ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[DEF]](s32)
+    ; CHECK: %w0 = COPY [[FPTOSI]](s32)
+    %0:_(s32) = G_IMPLICIT_DEF
     %1:_(s32) = G_FPTOSI %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -43,10 +45,12 @@
   bb.0:
     liveins: %w0
     ; CHECK-LABEL: name: test_fptoui_s32_s32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
-    ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s32)
-    %0:_(s32) = COPY %w0
+    ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+    ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[DEF]](s32)
+    ; CHECK: %w0 = COPY [[FPTOUI]](s32)
+    %0:_(s32) = G_IMPLICIT_DEF
     %1:_(s32) = G_FPTOUI %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -55,10 +59,12 @@
   bb.0:
     liveins: %x0
     ; CHECK-LABEL: name: test_fptosi_s32_s64
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
-    ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
-    %0:_(s64) = COPY %x0
+    ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+    ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[DEF]](s32)
+    ; CHECK: %w0 = COPY [[FPTOSI]](s32)
+    %0:_(s32) = G_IMPLICIT_DEF
     %1:_(s32) = G_FPTOSI %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -69,8 +75,10 @@
     ; CHECK-LABEL: name: test_fptoui_s32_s64
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s64)
+    ; CHECK: %w0 = COPY [[FPTOUI]](s32)
     %0:_(s64) = COPY %x0
     %1:_(s32) = G_FPTOUI %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -81,8 +89,10 @@
     ; CHECK-LABEL: name: test_fptosi_s64_s32
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[FPTOSI:%[0-9]+]]:_(s64) = G_FPTOSI [[COPY]](s32)
+    ; CHECK: %x0 = COPY [[FPTOSI]](s64)
     %0:_(s32) = COPY %w0
     %1:_(s64) = G_FPTOSI %0
+    %x0 = COPY %1
 ...
 
 ---
@@ -93,8 +103,10 @@
     ; CHECK-LABEL: name: test_fptoui_s64_s32
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[FPTOUI:%[0-9]+]]:_(s64) = G_FPTOUI [[COPY]](s32)
+    ; CHECK: %x0 = COPY [[FPTOUI]](s64)
     %0:_(s32) = COPY %w0
     %1:_(s64) = G_FPTOUI %0
+    %x0 = COPY %1
 ...
 
 ---
@@ -105,8 +117,10 @@
     ; CHECK-LABEL: name: test_fptosi_s64_s64
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[FPTOSI:%[0-9]+]]:_(s64) = G_FPTOSI [[COPY]](s64)
+    ; CHECK: %x0 = COPY [[FPTOSI]](s64)
     %0:_(s64) = COPY %x0
     %1:_(s64) = G_FPTOSI %0
+    %x0 = COPY %1
 ...
 
 ---
@@ -117,8 +131,10 @@
     ; CHECK-LABEL: name: test_fptoui_s64_s64
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[FPTOUI:%[0-9]+]]:_(s64) = G_FPTOUI [[COPY]](s64)
+    ; CHECK: %x0 = COPY [[FPTOUI]](s64)
     %0:_(s64) = COPY %x0
     %1:_(s64) = G_FPTOUI %0
+    %x0 = COPY %1
 ...
 
 
@@ -132,8 +148,10 @@
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
     ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[FPTOSI]](s32)
+    ; CHECK: %x0 = COPY [[TRUNC]](s1)
     %0:_(s32) = COPY %w0
     %1:_(s1) = G_FPTOSI %0
+    %x0 = COPY %1
 ...
 
 ---
@@ -144,9 +162,12 @@
     ; CHECK-LABEL: name: test_fptoui_s1_s32
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s32)
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[FPTOUI]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOUI]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s1) = G_FPTOUI %0
+    %2:_(s32) = G_ANYEXT %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -157,9 +178,12 @@
     ; CHECK-LABEL: name: test_fptosi_s8_s64
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[FPTOSI]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     %0:_(s64) = COPY %x0
     %1:_(s8) = G_FPTOSI %0
+    %2:_(s32) = G_ANYEXT %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -170,9 +194,12 @@
     ; CHECK-LABEL: name: test_fptoui_s8_s64
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s64)
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[FPTOUI]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOUI]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     %0:_(s64) = COPY %x0
     %1:_(s8) = G_FPTOUI %0
+    %2:_(s32) = G_ANYEXT %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -183,9 +210,12 @@
     ; CHECK-LABEL: name: test_fptosi_s16_s32
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[FPTOSI]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s16) = G_FPTOSI %0
+    %2:_(s32) = G_ANYEXT %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -196,7 +226,10 @@
     ; CHECK-LABEL: name: test_fptoui_s16_s32
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s32)
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[FPTOUI]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOUI]](s32)
+    ; CHECK: %w0 = COPY [[COPY1]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s16) = G_FPTOUI %0
+    %2:_(s32) = G_ANYEXT %1
+    %w0 = COPY %2
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
@@ -121,6 +121,8 @@
     %2:_(s64) = COPY %x2
     %3:_(s128) = G_MERGE_VALUES %0, %1
     %4:_(s128) = G_INSERT %3, %2, 32
+    %5:_(s64) = G_TRUNC %4
+    %x0 = COPY %5
     RET_ReallyLR
 ...
 
@@ -139,5 +141,7 @@
     %2:_(s32) = COPY %w2
     %3:_(s128) = G_MERGE_VALUES %0, %1
     %4:_(s128) = G_INSERT %3, %2, 32
+    %5:_(s64) = G_TRUNC %4
+    %x0 = COPY %5
     RET_ReallyLR
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
@@ -35,6 +35,7 @@
     ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s32) = G_SITOFP %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -47,6 +48,7 @@
     ; CHECK: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[COPY]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s32) = G_UITOFP %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -59,6 +61,7 @@
     ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s64)
     %0:_(s64) = COPY %x0
     %1:_(s32) = G_SITOFP %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -71,6 +74,7 @@
     ; CHECK: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[COPY]](s64)
     %0:_(s64) = COPY %x0
     %1:_(s32) = G_UITOFP %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -83,6 +87,7 @@
     ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s64) = G_SITOFP %0
+    %w0 = COPY %1
 ...
 
 ---
@@ -95,6 +100,7 @@
     ; CHECK: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[COPY]](s32)
     %0:_(s32) = COPY %w0
     %1:_(s64) = G_UITOFP %0
+    %x0 = COPY %1
 ...
 
 ---
@@ -107,6 +113,7 @@
     ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s64)
     %0:_(s64) = COPY %x0
     %1:_(s64) = G_SITOFP %0
+    %x0 = COPY %1
 ...
 
 ---
@@ -119,6 +126,7 @@
     ; CHECK: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[COPY]](s64)
     %0:_(s64) = COPY %x0
     %1:_(s64) = G_UITOFP %0
+    %x0 = COPY %1
 ...
 
 
@@ -137,6 +145,7 @@
     %0:_(s32) = COPY %w0
     %1:_(s1) = G_TRUNC %0
     %2:_(s32) = G_SITOFP %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -153,6 +162,7 @@
     %0:_(s32) = COPY %w0
     %1:_(s1) = G_TRUNC %0
     %2:_(s32) = G_UITOFP %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -170,6 +180,7 @@
     %0:_(s32) = COPY %w0
     %1:_(s8) = G_TRUNC %0
     %2:_(s64) = G_SITOFP %1
+    %x0 = COPY %2
 ...
 
 ---
@@ -186,6 +197,7 @@
     %0:_(s32) = COPY %w0
     %1:_(s8) = G_TRUNC %0
     %2:_(s64) = G_UITOFP %1
+    %x0 = COPY %2
 ...
 
 ---
@@ -203,6 +215,7 @@
     %0:_(s32) = COPY %w0
     %1:_(s16) = G_TRUNC %0
     %2:_(s32) = G_SITOFP %1
+    %w0 = COPY %2
 ...
 
 ---
@@ -219,4 +232,5 @@
     %0:_(s32) = COPY %w0
     %1:_(s16) = G_TRUNC %0
     %2:_(s32) = G_UITOFP %1
+    %w0 = COPY %2
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
@@ -31,27 +31,36 @@
     ; CHECK-LABEL: name: test_load
     %0(p0) = COPY %x0
 
-    ; CHECK: [[BIT8:%[0-9]+]]:_(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
-    ; CHECK: %1:_(s1) = G_TRUNC [[BIT8]]
     %1(s1) = G_LOAD %0 :: (load 1 from %ir.addr)
+    %9:_(s32) = G_ANYEXT %1
+    %w0 = COPY %9
 
     ; CHECK: %2:_(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
     %2(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
+    %10:_(s32) = G_ANYEXT %2
+    %w0 = COPY %10
 
     ; CHECK: %3:_(s16) = G_LOAD %0(p0) :: (load 2 from %ir.addr)
     %3(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
+    %11:_(s32) = G_ANYEXT %3
+    %w0 = COPY %11
 
     ; CHECK: %4:_(s32) = G_LOAD %0(p0) :: (load 4 from %ir.addr)
     %4(s32) = G_LOAD %0 :: (load 4 from %ir.addr)
+    %w0 = COPY %4
 
     ; CHECK: %5:_(s64) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
     %5(s64) = G_LOAD %0 :: (load 8 from %ir.addr)
+    %x0 = COPY %5
 
-    ; CHECK: %6:_(p0) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
     %6(p0) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
+    %12:_(s64) = G_PTRTOINT %6
+    %x0 = COPY %12
 
     ; CHECK: %7:_(<2 x s32>) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
     %7(<2 x s32>) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
+    %13:_(s64) = G_BITCAST %7
+    %x0 = COPY %13
 
     ; CHECK: [[LOAD0:%[0-9]+]]:_(s64) = G_LOAD %0(p0) :: (load 16 from %ir.addr)
     ; CHECK: [[OFFSET1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
@@ -59,6 +68,8 @@
     ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP1]](p0) :: (load 16 from %ir.addr)
     ; CHECK: %8:_(s128) = G_MERGE_VALUES [[LOAD0]](s64), [[LOAD1]](s64)
     %8(s128) = G_LOAD %0(p0) :: (load 16 from %ir.addr)
+    %14:_(s64) = G_TRUNC %8
+    %x0 = COPY %14
 ...
 
 ---
Index: test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
@@ -30,8 +30,7 @@
     ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
     ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
     ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[TRUNC]], [[TRUNC1]]
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[MUL]](s32)
-    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s8)
+    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[MUL]](s32)
     ; CHECK: %x0 = COPY [[ANYEXT]](s64)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
@@ -56,9 +55,14 @@
     ; CHECK: [[SMULH:%[0-9]+]]:_(s64) = G_SMULH [[COPY]], [[COPY1]]
     ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
     ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[SMULH]](s64), [[C]]
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+    ; CHECK: %x0 = COPY [[MUL]](s64)
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
+    ; CHECK: %w0 = COPY [[COPY2]](s32)
     %0:_(s64) = COPY %x0
     %1:_(s64) = COPY %x1
     %2:_(s64), %3:_(s1) = G_SMULO %0, %1
+    %x0 = COPY %2
+    %4:_(s32) = G_ANYEXT %3
+    %w0 = COPY %4
 
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir
@@ -22,9 +22,15 @@
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %w0
     ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY %w1
     ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY %w2
-    ; CHECK: [[MV:%[0-9]+]]:_(<3 x s32>) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
+    ; CHECK: %w0 = COPY [[COPY]](s32)
+    ; CHECK: %w1 = COPY [[COPY1]](s32)
+    ; CHECK: %w2 = COPY [[COPY2]](s32)
     %0(s32) = COPY %w0
     %1(s32) = COPY %w1
     %2(s32) = COPY %w2
     %3(<3 x s32>) = G_MERGE_VALUES %0(s32), %1(s32), %2(s32)
+    %4:_(s32), %5:_(s32), %6:_(s32) = G_UNMERGE_VALUES %3
+    %w0 = COPY %4
+    %w1 = COPY %5
+    %w2 = COPY %6
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-or.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-or.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-or.mir
@@ -3,17 +3,9 @@
 
 ---
 name:            test_scalar_or_small
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-  - { id: 2, class: _ }
-  - { id: 3, class: _ }
-  - { id: 4, class: _ }
-  - { id: 5, class: _ }
 body: |
   bb.0:
     liveins: %x0, %x1, %x2, %x3
-
     ; CHECK-LABEL: name: test_scalar_or_small
     ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
     ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
@@ -21,29 +13,17 @@
     ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
     ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[TRUNC]], [[TRUNC1]]
     ; CHECK: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[OR]](s32)
-    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s8)
-    ; CHECK: %x0 = COPY [[ANYEXT]](s64)
-    %0(s64) = COPY %x0
-    %1(s64) = COPY %x1
-    %2(s8) = G_TRUNC %0
-    %3(s8) = G_TRUNC %1
-    %4(s8) = G_OR %2, %3
-    %5(s64) = G_ANYEXT %4
-    %x0 = COPY %5
+    ; CHECK: %x0 = COPY [[TRUNC2]](s8)
+    %0:_(s64) = COPY %x0
+    %1:_(s64) = COPY %x1
+    %2:_(s8) = G_TRUNC %0
+    %3:_(s8) = G_TRUNC %1
+    %4:_(s8) = G_OR %2, %3
+    %x0 = COPY %4
 ...
 
 ---
 name:            test_big_scalar_power_of_2
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-  - { id: 2, class: _ }
-  - { id: 3, class: _ }
-  - { id: 4, class: _ }
-  - { id: 5, class: _ }
-  - { id: 6, class: _ }
-  - { id: 7, class: _ }
-  - { id: 8, class: _ }
 body: |
   bb.0:
     liveins: %x0, %x1, %x2, %x3
@@ -61,14 +41,14 @@
     ; CHECK: %x0 = COPY [[OR]](s64)
     ; CHECK: %x1 = COPY [[OR1]](s64)
     ; CHECK: RET_ReallyLR implicit %x0, implicit %x1
-    %0(s64) = COPY %x0
-    %1(s64) = COPY %x1
-    %2(s64) = COPY %x2
-    %3(s64) = COPY %x3
-    %4(s128) = G_MERGE_VALUES %0, %1
-    %5(s128) = G_MERGE_VALUES %2, %3
-    %6(s128) = G_OR %4, %5
-    %7(s64), %8(s64) = G_UNMERGE_VALUES %6
+    %0:_(s64) = COPY %x0
+    %1:_(s64) = COPY %x1
+    %2:_(s64) = COPY %x2
+    %3:_(s64) = COPY %x3
+    %4:_(s128) = G_MERGE_VALUES %0, %1
+    %5:_(s128) = G_MERGE_VALUES %2, %3
+    %6:_(s128) = G_OR %4, %5
+    %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %6
     %x0 = COPY %7
     %x1 = COPY %8
     RET_ReallyLR implicit %x0, implicit %x1
Index: test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=aarch64-unknown-unknown -global-isel -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s
 --- |
   ; ModuleID = '/tmp/test.ll'
@@ -62,21 +63,39 @@
   - { id: 10, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   liveins: %w0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY %w0
+  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+  ; CHECK:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[C]]
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
+  ; CHECK:   G_BR %bb.2
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.3(0x80000000)
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]]
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[ADD]](s32)
+  ; CHECK:   G_BR %bb.3
+  ; CHECK: bb.2:
+  ; CHECK:   successors: %bb.3(0x80000000)
+  ; CHECK:   [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]]
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[ADD1]](s32)
+  ; CHECK: bb.3:
+  ; CHECK:   [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC1]](s16), %bb.1, [[TRUNC2]](s16), %bb.2
+  ; CHECK:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
+  ; CHECK:   [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C3]]
+  ; CHECK:   %w0 = COPY [[AND]](s32)
+  ; CHECK:   RET_ReallyLR implicit %w0
   bb.0:
    ; Test that we insert legalization artifacts(Truncs here) into the correct BBs
    ; while legalizing the G_PHI to s16.
-   ; CHECK-LABEL: name: legalize_phi
-   ; CHECK-LABEL: bb.1:
-   ; CHECK: [[ADD_BB1:%.*]]:_(s32) = G_ADD
-   ; CHECK: [[RES_BB1:%.*]]:_(s16) = G_TRUNC [[ADD_BB1]]
-
-   ; CHECK-LABEL: bb.2:
-   ; CHECK: [[ADD_BB2:%.*]]:_(s32) = G_ADD
-   ; CHECK: [[RES_BB2:%.*]]:_(s16) = G_TRUNC [[ADD_BB2]]
-
-   ; CHECK-LABEL: bb.3:
-   ; CHECK: [[RES_PHI:%.*]]:_(s16) = G_PHI [[RES_BB1]](s16), %bb.1, [[RES_BB2]](s16), %bb.2
-   ; CHECK: [[RES:%.*]]:_(s1) = G_TRUNC [[RES_PHI]]
+
+
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
     liveins: %w0
 
@@ -125,18 +144,24 @@
   - { id: 5, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi_ptr
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   liveins: %w2, %x0, %x1
+  ; CHECK:   [[COPY:%[0-9]+]]:_(p0) = COPY %x0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(p0) = COPY %x1
+  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY %w2
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY2]](s32)
+  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
+  ; CHECK:   G_BR %bb.2
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.2(0x80000000)
+  ; CHECK: bb.2:
+  ; CHECK:   [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY]](p0), %bb.0, [[COPY1]](p0), %bb.1
+  ; CHECK:   %x0 = COPY [[PHI]](p0)
+  ; CHECK:   RET_ReallyLR implicit %x0
   bb.1:
-   ; CHECK-LABEL: name: legalize_phi_ptr
-   ; CHECK-LABEL: bb.0:
-   ; CHECK: [[A:%[0-9]+]]:_(p0) = COPY %x0
-   ; CHECK: [[B:%[0-9]+]]:_(p0) = COPY %x1
-   ; CHECK: [[CE:%[0-9]+]]:_(s32) = COPY %w2
-   ; CHECK: [[C:%[0-9]+]]:_(s1) = G_TRUNC [[CE]]
-
-   ; CHECK-LABEL: bb.1:
-   ; CHECK-LABEL: bb.2:
-   ; CHECK: %3:_(p0) = G_PHI [[A]](p0), %bb.0, [[B]](p0), %bb.1
-   ; CHECK: %x0 = COPY %3(p0)
+
     successors: %bb.2, %bb.3
     liveins: %w2, %x0, %x1
 
@@ -178,23 +203,41 @@
   - { id: 10, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi_empty
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   liveins: %w0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY %w0
+  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[C]]
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]]
+  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
+  ; CHECK:   G_BR %bb.2
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.3(0x80000000)
+  ; CHECK:   [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]]
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[ADD1]](s32)
+  ; CHECK:   G_BR %bb.3
+  ; CHECK: bb.2:
+  ; CHECK:   successors: %bb.3(0x80000000)
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[ADD]](s32)
+  ; CHECK: bb.3:
+  ; CHECK:   [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC1]](s16), %bb.1, [[TRUNC2]](s16), %bb.2
+  ; CHECK:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
+  ; CHECK:   [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C3]]
+  ; CHECK:   %w0 = COPY [[AND]](s32)
+  ; CHECK:   RET_ReallyLR implicit %w0
   bb.0:
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
     liveins: %w0
    ; Test that we properly legalize a phi with a predecessor that's empty
-   ; CHECK-LABEL: name: legalize_phi_empty
-   ; CHECK-LABEL: bb.0:
-   ; CHECK: [[ENTRY_ADD:%.*]]:_(s32) = G_ADD
 
-   ; CHECK-LABEL: bb.1:
-   ; CHECK: [[ADD_BB1:%.*]]:_(s32) = G_ADD
-   ; CHECK: [[RES_BB1:%.*]]:_(s16) = G_TRUNC [[ADD_BB1]]
 
-   ; CHECK-LABEL: bb.2:
-   ; CHECK: [[RES_BB2:%.*]]:_(s16) = G_TRUNC [[ENTRY_ADD]]
 
-   ; CHECK: [[RES_PHI:%.*]]:_(s16) = G_PHI [[RES_BB1]](s16), %bb.1, [[RES_BB2]](s16), %bb.2
-   ; CHECK: [[RES:%.*]]:_(s1) = G_TRUNC [[RES_PHI]]
 
     %0(s32) = COPY %w0
     %1(s32) = G_CONSTANT i32 0
@@ -243,19 +286,39 @@
   - { id: 7, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi_loop
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x80000000)
+  ; CHECK:   liveins: %w0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY %w0
+  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, %18(s16), %bb.1
+  ; CHECK:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ANYEXT]], [[COPY1]]
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[ADD]](s32)
+  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
+  ; CHECK:   [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
+  ; CHECK:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[AND]](s32), [[COPY]]
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[ADD]](s32)
+  ; CHECK:   G_BRCOND [[TRUNC2]](s1), %bb.1
+  ; CHECK: bb.2:
+  ; CHECK:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
+  ; CHECK:   [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]]
+  ; CHECK:   %w0 = COPY [[AND1]](s32)
+  ; CHECK:   RET_ReallyLR implicit %w0
   bb.0:
     successors: %bb.1(0x80000000)
     liveins: %w0
    ; Test that we properly legalize a phi that uses a value from the same BB
-   ; CHECK-LABEL: name: legalize_phi_loop
-   ; CHECK-LABEL: bb.0:
-   ; CHECK: [[C0:%.*]]:_(s32) = G_CONSTANT i32 0
-   ; CHECK: [[RES_BB1:%.*]]:_(s16) = G_TRUNC [[C0]]
-
-   ; CHECK-LABEL: bb.1:
-   ; CHECK: [[RES_PHI:%.*]]:_(s16) = G_PHI [[RES_BB1]](s16), %bb.0, [[RES_BB2:%.*]](s16), %bb.1
-   ; CHECK-NEXT: G_ANYEXT [[RES_PHI]]
-   ; CHECK: [[RES_BB2]]:_(s16) = G_ANYEXT
+
     %0(s32) = COPY %w0
     %2(s8) = G_CONSTANT i8 1
     %7(s8) = G_CONSTANT i8 0
@@ -291,19 +354,32 @@
   - { id: 4, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi_cycle
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x80000000)
+  ; CHECK:   liveins: %w0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY %w0
+  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, %8(s16), %bb.1
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[PHI]](s16)
+  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
+  ; CHECK:   [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C1]]
+  ; CHECK:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[AND]](s32), [[COPY]]
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s16) = COPY [[PHI]](s16)
+  ; CHECK:   G_BRCOND [[TRUNC2]](s1), %bb.1
+  ; CHECK: bb.2:
+  ; CHECK:   %w0 = COPY [[AND]](s32)
+  ; CHECK:   RET_ReallyLR implicit %w0
   bb.0:
     successors: %bb.1(0x80000000)
     liveins: %w0
    ; Test that we properly legalize a phi that uses itself
-   ; CHECK-LABEL: name: legalize_phi_cycle
-   ; CHECK-LABEL: bb.0:
-   ; CHECK: [[C0:%.*]]:_(s32) = G_CONSTANT i32 0
-   ; CHECK: [[RES_BB1:%.*]]:_(s16) = G_TRUNC [[C0]]
 
-   ; CHECK-LABEL: bb.1:
-   ; CHECK: [[RES_PHI:%.*]]:_(s16) = G_PHI [[RES_BB1]](s16), %bb.0, [[RES_BB2:%.*]](s16), %bb.1
-   ; CHECK-NEXT: G_TRUNC
-   ; CHECK: [[RES_BB2]]:_(s16) = COPY
 
     %0(s32) = COPY %w0
     %4(s8) = G_CONSTANT i8 0
@@ -347,30 +423,50 @@
   - { id: 14, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi_same_bb
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   liveins: %w0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY %w0
+  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
+  ; CHECK:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[C]]
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]]
+  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
+  ; CHECK:   G_BR %bb.2
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.3(0x80000000)
+  ; CHECK:   [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]]
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[ADD1]](s32)
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[ADD1]](s32)
+  ; CHECK:   G_BR %bb.3
+  ; CHECK: bb.2:
+  ; CHECK:   successors: %bb.3(0x80000000)
+  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[C3]](s32)
+  ; CHECK:   [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[ADD]](s32)
+  ; CHECK: bb.3:
+  ; CHECK:   [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC2]](s16), %bb.1, [[TRUNC4]](s16), %bb.2
+  ; CHECK:   [[PHI1:%[0-9]+]]:_(s16) = G_PHI [[TRUNC1]](s16), %bb.1, [[TRUNC3]](s16), %bb.2
+  ; CHECK:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
+  ; CHECK:   [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C4]]
+  ; CHECK:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI1]](s16)
+  ; CHECK:   [[AND1:%[0-9]+]]:_(s32) = G_AND [[ANYEXT1]], [[C5]]
+  ; CHECK:   [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[C]]1, [[C]]2
+  ; CHECK:   %w0 = COPY [[C]]3(s32)
+  ; CHECK:   RET_ReallyLR implicit %w0
   bb.0:
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
     liveins: %w0
    ; Make sure that we correctly insert the new legalized G_PHI at the
    ; correct location (ie make sure G_PHIs are the first insts in the BB).
-   ; CHECK-LABEL: name: legalize_phi_same_bb
-   ; CHECK-LABEL: bb.0:
-   ; CHECK: [[C42:%.*]]:_(s32) = G_CONSTANT i32 42
-   ; CHECK: [[ENTRY_ADD:%.*]]:_(s32) = G_ADD
-
-   ; CHECK-LABEL: bb.1:
-   ; CHECK: [[BB1_ADD:%.*]]:_(s32) = G_ADD
-   ; CHECK: [[RES1_BB1:%.*]]:_(s16) = G_TRUNC [[BB1_ADD]]
-   ; CHECK: [[RES2_BB1:%.*]]:_(s16) = G_TRUNC [[BB1_ADD]]
-
-   ; CHECK-LABEL: bb.2:
-   ; CHECK: [[RES1_BB2:%.*]]:_(s16) = G_TRUNC [[ENTRY_ADD]]
-   ; CHECK: [[RES2_BB2:%.*]]:_(s16) = G_TRUNC [[C42]]
-
-   ; CHECK-LABEL: bb.3:
-   ; CHECK: [[RES1_PHI:%.*]]:_(s16) = G_PHI [[RES1_BB1]](s16), %bb.1, [[RES1_BB2]](s16), %bb.2
-   ; CHECK-NEXT: [[RES_PHI:%.*]]:_(s16) = G_PHI [[RES2_BB1]](s16), %bb.1, [[RES2_BB2]](s16), %bb.2
-   ; CHECK-NEXT: G_TRUNC
-   ; CHECK-NEXT: G_TRUNC
+
+
+
 
     %0(s32) = COPY %w0
     %1(s32) = G_CONSTANT i32 0
@@ -431,27 +527,51 @@
   - { id: 15, class: _, preferred-register: '' }
 liveins:
 body:             |
+  ; CHECK-LABEL: name: legalize_phi_diff_bb
+  ; CHECK: bb.0:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   liveins: %w0, %w1
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY %w0
+  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 44
+  ; CHECK:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 43
+  ; CHECK:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[C]]
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]]
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[ADD]](s32)
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[ADD]](s32)
+  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
+  ; CHECK:   G_BR %bb.2
+  ; CHECK: bb.1:
+  ; CHECK:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK:   [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC2]](s16), %bb.0, [[C]]4(s16), %bb.1
+  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[PHI]](s16)
+  ; CHECK:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
+  ; CHECK:   [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C5]]
+  ; CHECK:   [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[AND]], [[C2]]
+  ; CHECK:   [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[ADD1]](s32), [[C3]]
+  ; CHECK:   [[TRUNC4:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32)
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s16) = COPY [[PHI]](s16)
+  ; CHECK:   [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[C4]](s32)
+  ; CHECK:   G_BRCOND [[TRUNC4]](s1), %bb.2
+  ; CHECK:   G_BR %bb.1
+  ; CHECK: bb.2:
+  ; CHECK:   [[PHI1:%[0-9]+]]:_(s16) = G_PHI [[COPY1]](s16), %bb.1, [[TRUNC1]](s16), %bb.0
+  ; CHECK:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+  ; CHECK:   [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI1]](s16)
+  ; CHECK:   [[AND1:%[0-9]+]]:_(s32) = G_AND [[C]]0, [[C6]]
+  ; CHECK:   %w0 = COPY [[AND1]](s32)
+  ; CHECK:   RET_ReallyLR implicit %w0
   bb.0:
     successors: %bb.1(0x40000000), %bb.3(0x40000000)
     liveins: %w0, %w1
    ; Make sure that we correctly legalize PHIs sharing common defs
    ; in different BBs.
-   ; CHECK-LABEL: name: legalize_phi_diff_bb
-   ; CHECK-LABEL: bb.0:
-   ; CHECK: [[C44:%.*]]:_(s32) = G_CONSTANT i32 44
-   ; CHECK: [[C43:%.*]]:_(s32) = G_CONSTANT i32 43
-   ; CHECK: [[ENTRY_ADD:%.*]]:_(s32) = G_ADD
-   ; CHECK: [[RES_ENTRY:%.*]]:_(s16) = G_TRUNC [[ENTRY_ADD]]
-   ; CHECK: [[RES_ENTRY1:%.*]]:_(s16) = G_TRUNC [[ENTRY_ADD]]
-
-   ; CHECK-LABEL: bb.1:
-   ; CHECK: [[RES1_PHI:%.*]]:_(s16) = G_PHI [[RES_ENTRY]](s16), %bb.0, [[RES_BB1:%.*]](s16), %bb.1
-   ; CHECK: [[RES_BB1:%.*]]:_(s16) = G_TRUNC
-   ; CHECK: [[RES_FOR_BB2:%.*]]:_(s16) = COPY [[RES1_PHI]]
-
-   ; CHECK-LABEL: bb.2:
-   ; CHECK: [[RES2_PHI:%.*]]:_(s16) = G_PHI [[RES_FOR_BB2]](s16), %bb.1, [[RES_ENTRY1:%.*]](s16), %bb.0
-   ; CHECK-NEXT: G_TRUNC
+
+
 
     %0(s32) = COPY %w0
     %1(s32) = COPY %w1
Index: test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
@@ -28,11 +28,13 @@
     ; CHECK: BL $pow, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0
     ; CHECK: %4:_(s64) = COPY %d0
     %4:_(s64) = G_FPOW %0, %1
+    %x0 = COPY %4
 
     ; CHECK: %s0 = COPY %2
     ; CHECK: %s1 = COPY %3
     ; CHECK: BL $powf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0
     ; CHECK: %5:_(s32) = COPY %s0
     %5:_(s32) = G_FPOW %2, %3
+    %w0 = COPY %5
 
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -32,12 +33,16 @@
     liveins: %x0, %x1, %x2, %x3
 
     ; CHECK-LABEL: name: test_urem_64
-    ; CHECK: [[QUOT:%[0-9]+]]:_(s64) = G_UDIV %0, %1
-    ; CHECK: [[PROD:%[0-9]+]]:_(s64) = G_MUL [[QUOT]], %1
-    ; CHECK: [[RES:%[0-9]+]]:_(s64) = G_SUB %0, [[PROD]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[COPY]], [[COPY1]]
+    ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[UDIV]], [[COPY1]]
+    ; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[MUL]]
+    ; CHECK: %x0 = COPY [[SUB]](s64)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %2(s64) = G_UREM %0, %1
+    %x0 = COPY %2
 
 
 ...
@@ -52,18 +57,22 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
-    ; CHECK-LABEL: name: test_srem_32
-    ; CHECK: [[T1:%.*]]:_(s32) = G_TRUNC %0(s64)
-    ; CHECK: [[T2:%.*]]:_(s32) = G_TRUNC %1(s64)
-    ; CHECK: [[DIV:%.*]]:_(s32) = G_SDIV [[T1]], [[T2]]
-    ; CHECK: [[MUL:%.*]]:_(s32) = G_MUL [[DIV]], [[T2]]
-    ; CHECK: [[RES:%.*]]:_(s32) = G_SUB [[T1]], [[MUL]]
 
+    ; CHECK-LABEL: name: test_srem_32
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[TRUNC]], [[TRUNC1]]
+    ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[SDIV]], [[TRUNC1]]
+    ; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[MUL]]
+    ; CHECK: %w0 = COPY [[SUB]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %3(s32) = G_TRUNC %0
     %4(s32) = G_TRUNC %1
     %5(s32) = G_SREM %3, %4
+    %w0 = COPY %5
 
 ...
 ---
@@ -77,30 +86,35 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
-    ; CHECK-LABEL: name: test_srem_8
 
-    ; CHECK: [[C1:%.*]]:_(s32) = G_CONSTANT i32 24
-    ; CHECK: [[SRC1:%.*]]:_(s32) = G_TRUNC %0(s64)
-    ; CHECK: [[SHL1:%.*]]:_(s32) = G_SHL [[SRC1]], [[C1]]
-    ; CHECK: [[LHS_SEXT:%.*]]:_(s32) = G_ASHR [[SHL1]], [[C1]]
-    ; CHECK: [[C2:%.*]]:_(s32) = G_CONSTANT i32 24
-    ; CHECK: [[SRC2:%.*]]:_(s32) = G_TRUNC %1(s64)
-    ; CHECK: [[SHL2:%.*]]:_(s32) = G_SHL [[SRC2]], [[C2]]
-    ; CHECK: [[RHS_SEXT:%.*]]:_(s32) = G_ASHR [[SHL2]], [[C2]]
-    ; CHECK: [[SDIV:%.*]]:_(s32) = G_SDIV [[LHS_SEXT]], [[RHS_SEXT]]
-    ; CHECK: [[A:%.*]]:_(s32) = COPY [[SDIV]]
-    ; CHECK: [[SRC3:%.*]]:_(s32) = G_TRUNC %1(s64)
-    ; CHECK: [[MUL:%.*]]:_(s32) = G_MUL [[A]], [[SRC3]]
-    ; CHECK: [[SRC4:%.*]]:_(s32) = G_TRUNC %0(s64)
-    ; CHECK: [[SRC5:%.*]]:_(s32) = COPY [[MUL]]
-    ; CHECK: [[SUB:%.*]]:_(s32) = G_SUB [[SRC4]], [[SRC5]]
-    ; CHECK: [[RES:%.*]]:_(s8) = G_TRUNC [[SUB]]
 
+    ; CHECK-LABEL: name: test_srem_8
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]]
+    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]]
+    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]]
+    ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]]
+    ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SDIV]](s32)
+    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[TRUNC2]]
+    ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
+    ; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC3]], [[COPY3]]
+    ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SUB]](s32)
+    ; CHECK: %w0 = COPY [[COPY4]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %6(s8) = G_TRUNC %0
     %7(s8) = G_TRUNC %1
     %8(s8) = G_SREM %6, %7
+    %9:_(s32) = G_ANYEXT %8
+    %w0 = COPY %9
 ...
 ---
 name:            test_frem
@@ -114,20 +128,32 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
-    ; CHECK-LABEL: name: test_frem
 
-    ; CHECK: %d0 = COPY %0
-    ; CHECK: %d1 = COPY %1
+    ; CHECK-LABEL: name: test_frem
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def %sp, implicit %sp
+    ; CHECK: %d0 = COPY [[COPY]](s64)
+    ; CHECK: %d1 = COPY [[COPY1]](s64)
     ; CHECK: BL $fmod, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0
-    ; CHECK: [[RES:%.*]]:_(s64) = COPY %d0
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY %d0
+    ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def %sp, implicit %sp
+    ; CHECK: %x0 = COPY [[COPY2]](s64)
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def %sp, implicit %sp
+    ; CHECK: %s0 = COPY [[TRUNC]](s32)
+    ; CHECK: %s1 = COPY [[TRUNC1]](s32)
+    ; CHECK: BL $fmodf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY %s0
+    ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def %sp, implicit %sp
+    ; CHECK: %w0 = COPY [[COPY3]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %2(s64) = G_FREM %0, %1
+    %x0 = COPY %2
 
-    ; CHECK: %s0 = COPY %3
-    ; CHECK: %s1 = COPY %4
-    ; CHECK: BL $fmodf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0
-    ; CHECK: [[RES:%.*]]:_(s32) = COPY %s0
     %3(s32) = G_TRUNC %0
     %4(s32) = G_TRUNC %1
     %5(s32) = G_FREM %3, %4
+    %w0 = COPY %5
Index: test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -22,37 +23,49 @@
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_shift
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]]
+    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]]
+    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]]
+    ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]]
+    ; CHECK: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[ASHR1]]
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ASHR2]](s32)
+    ; CHECK: %w0 = COPY [[COPY2]](s32)
+    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC2]], [[C2]]
+    ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC3]], [[C3]]
+    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[AND1]]
+    ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+    ; CHECK: %w0 = COPY [[COPY3]](s32)
+    ; CHECK: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+    ; CHECK: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
+    ; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY1]]0, [[COPY1]]1
+    ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]]2(s32)
+    ; CHECK: %w0 = COPY [[COPY4]](s32)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %2(s8) = G_TRUNC %0
     %3(s8) = G_TRUNC %1
 
-    ; CHECK: [[C1:%.*]]:_(s32) = G_CONSTANT i32 24
-    ; CHECK: [[SRC:%.*]]:_(s32) = G_TRUNC %0(s64)
-    ; CHECK: [[SHL1:%.*]]:_(s32) = G_SHL [[SRC]], [[C1]]
-    ; CHECK: [[SEXT1:%.*]]:_(s32) = G_ASHR [[SHL1]], [[C1]]
-    ; CHECK: [[C2:%.*]]:_(s32) = G_CONSTANT i32 24
-    ; CHECK: [[SRC2:%.*]]:_(s32) = G_TRUNC %1(s64)
-    ; CHECK: [[SHL2:%.*]]:_(s32) = G_SHL [[SRC2]], [[C2]]
-    ; CHECK: [[SEXT2:%.*]]:_(s32) = G_ASHR [[SHL2]], [[C2]]
-    ; CHECK: [[RES32:%[0-9]+]]:_(s32) = G_ASHR [[SEXT1]], [[SEXT2]]
-    ; CHECK: %4:_(s8) = G_TRUNC [[RES32]]
     %4(s8) = G_ASHR %2, %3
+    %7:_(s32) = G_ANYEXT %4
+    %w0 = COPY %7
 
 
-    ; CHECK: [[C1:%.*]]:_(s32) = G_CONSTANT i32 255
-    ; CHECK: [[SRC:%.*]]:_(s32) = G_TRUNC %0(s64)
-    ; CHECK: [[ZEXT:%.*]]:_(s32) = G_AND [[SRC]], [[C1]]
-    ; CHECK: [[C2:%.*]]:_(s32) = G_CONSTANT i32 255
-    ; CHECK: [[SRC2:%.*]]:_(s32) = G_TRUNC %1(s64)
-    ; CHECK: [[ZEXT2:%.*]]:_(s32) = G_AND [[SRC2]], [[C2]]
-    ; CHECK: [[RES32:%[0-9]+]]:_(s32) = G_LSHR [[ZEXT]], [[ZEXT2]]
-    ; CHECK: %5:_(s8) = G_TRUNC [[RES32]]
     %5(s8) = G_LSHR %2, %3
+    %8:_(s32) = G_ANYEXT %5
+    %w0 = COPY %8
 
-    ; CHECK: [[OP0:%.*]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[OP1:%.*]]:_(s32) = G_TRUNC %1
-    ; CHECK: [[RES32:%.*]]:_(s32) = G_SHL [[OP0]], [[OP1]]
-    ; CHECK: [[RES:%.*]]:_(s8) = G_TRUNC [[RES32]](s32)
     %6(s8) = G_SHL %2, %3
+    %9:_(s32) = G_ANYEXT %6
+    %w0 = COPY %9
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -35,6 +36,46 @@
   - { id: 15, class: _ }
   - { id: 16, class: _ }
 body: |
+  ; CHECK-LABEL: name: test_simple
+  ; CHECK: bb.0.entry:
+  ; CHECK:   successors: %bb.1.next(0x80000000)
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
+  ; CHECK:   [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[INTTOPTR]](p0)
+  ; CHECK:   %x0 = COPY [[PTRTOINT]](s64)
+  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1.next
+  ; CHECK: bb.1.next:
+  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[TRUNC2]], [[TRUNC3]]
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
+  ; CHECK:   %w0 = COPY [[COPY1]](s32)
+  ; CHECK:   [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[TRUNC4]], [[TRUNC5]]
+  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT1]](s32)
+  ; CHECK:   %w0 = COPY [[COPY2]](s32)
+  ; CHECK:   [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[TRUNC7:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+  ; CHECK:   [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[TRUNC6]], [[TRUNC7]]
+  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT2]](s32)
+  ; CHECK:   %w0 = COPY [[COPY3]](s32)
+  ; CHECK:   [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[TRUNC1]], [[TRUNC1]]
+  ; CHECK:   [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[COPY]], [[COPY]]
+  ; CHECK:   %x0 = COPY [[SELECT4]](s64)
+  ; CHECK:   [[BITCAST:%[0-9]+]]:_(<2 x s32>) = G_BITCAST [[COPY]](s64)
+  ; CHECK:   [[BITCAST1:%[0-9]+]]:_(s64) = G_BITCAST [[TRUNC]]2(<2 x s32>)
+  ; CHECK:   %x0 = COPY [[BITCAST1]](s64)
+  ; CHECK:   [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[TRUNC]]0(s32)
+  ; CHECK:   %w0 = COPY [[TRUNC]]4(s32)
+  ; CHECK:   [[BITCAST3:%[0-9]+]]:_(<4 x s8>) = G_BITCAST [[COPY]](s64)
+  ; CHECK:   [[BITCAST4:%[0-9]+]]:_(s32) = G_BITCAST [[TRUNC]]5(<4 x s8>)
+  ; CHECK:   %w0 = COPY [[BITCAST4]](s32)
+  ; CHECK:   [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY]](s64)
+  ; CHECK:   [[BITCAST6:%[0-9]+]]:_(s32) = G_BITCAST [[TRUNC]]6(<2 x s16>)
+  ; CHECK:   %w0 = COPY [[BITCAST6]](s32)
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
     %0(s64) = COPY %x0
@@ -44,48 +85,41 @@
     %3(s16) = G_TRUNC %0
     %4(s32) = G_TRUNC %0
 
-    ; CHECK-LABEL: name: test_simple
-    ; CHECK: %5:_(p0) = G_INTTOPTR %0
-    ; CHECK: %6:_(s64) = G_PTRTOINT %5
     %5(p0) = G_INTTOPTR %0
     %6(s64) = G_PTRTOINT %5
+    %x0 = COPY %6
 
-    ; CHECK: G_BRCOND %1(s1), %bb.1.next
     G_BRCOND %1, %bb.1.next
 
   bb.1.next:
 
-    ; CHECK: [[LHS:%[0-9]+]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[RHS:%[0-9]+]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[RES:%[0-9]+]]:_(s32) = G_SELECT %1(s1), [[LHS]], [[RHS]]
-    ; CHECK: %7:_(s1) = G_TRUNC [[RES]](s32)
     %7(s1) = G_SELECT %1, %1, %1
+    %21:_(s32) = G_ANYEXT %7
+    %w0 = COPY %21
 
-    ; CHECK: [[LHS:%[0-9]+]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[RHS:%[0-9]+]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[RES:%[0-9]+]]:_(s32) = G_SELECT %1(s1), [[LHS]], [[RHS]]
-    ; CHECK: %8:_(s8) = G_TRUNC [[RES]](s32)
     %8(s8) = G_SELECT %1, %2, %2
+    %20:_(s32) = G_ANYEXT %8
+    %w0 = COPY %20
 
-    ; CHECK: [[LHS:%[0-9]+]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[RHS:%[0-9]+]]:_(s32) = G_TRUNC %0
-    ; CHECK: [[RES:%[0-9]+]]:_(s32) = G_SELECT %1(s1), [[LHS]], [[RHS]]
-    ; CHECK: %9:_(s16) = G_TRUNC [[RES]](s32)
     %9(s16) = G_SELECT %1, %3, %3
+    %19:_(s32) = G_ANYEXT %9
+    %w0 = COPY %19
 
     %10(s32) = G_SELECT %1, %4, %4
     %11(s64) = G_SELECT %1, %0, %0
+    %x0 = COPY %11
 
-    ; CHECK: %12:_(<2 x s32>) = G_BITCAST %0
-    ; CHECK: %13:_(s64) = G_BITCAST %12
-    ; CHECK: %14:_(s32) = G_BITCAST %10
-    ; CHECK: %15:_(<4 x s8>) = G_BITCAST %0
-    ; CHECK: %16:_(<2 x s16>) = G_BITCAST %0
     %12(<2 x s32>) = G_BITCAST %0
     %13(s64) = G_BITCAST %12
+    %x0 = COPY %13
     %14(s32) = G_BITCAST %10
+    %w0 = COPY %14
     %15(<4 x s8>) = G_BITCAST %0
+    %17:_(s32) = G_BITCAST %15
+    %w0 = COPY %17
     %16(<2 x s16>) = G_BITCAST %0
+    %18:_(s32) = G_BITCAST %16
+    %w0 = COPY %18
 ...
 
 ---
@@ -99,9 +133,15 @@
 body:             |
   bb.1:
     liveins: %x0, %x1
-    ; CHECK-LABEL: bitcast128
     ; This is legal and shouldn't be changed.
-    ; CHECK: %2:_(<2 x s64>) = G_BITCAST %3(s128)
+    ; CHECK-LABEL: name: bitcast128
+    ; CHECK: liveins: %x0, %x1
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %x1
+    ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)
+    ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s64>) = G_BITCAST [[MV]](s128)
+    ; CHECK: %q0 = COPY [[BITCAST]](<2 x s64>)
+    ; CHECK: RET_ReallyLR implicit %q0
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
     %3(s128) = G_MERGE_VALUES %0(s64), %1(s64)
Index: test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
@@ -29,8 +29,7 @@
     ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
     ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
     ; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[TRUNC1]]
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[SUB]](s32)
-    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s8)
+    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SUB]](s32)
     ; CHECK: %x0 = COPY [[ANYEXT]](s64)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1
Index: test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
@@ -13,4 +13,6 @@
     ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
     ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[DEF]](s64), [[DEF1]](s64)
     %0:_(s128) = G_IMPLICIT_DEF
+    %1:_(s64) = G_TRUNC %0
+    %x0 = COPY %1
 ...
Index: test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
@@ -29,8 +29,7 @@
     ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
     ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
     ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[TRUNC]], [[TRUNC1]]
-    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[XOR]](s32)
-    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s8)
+    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[XOR]](s32)
     ; CHECK: %x0 = COPY [[ANYEXT]](s64)
     %0(s64) = COPY %x0
     %1(s64) = COPY %x1