Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp =================================================================== --- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -96,7 +96,7 @@ TargetTriple(TT), Gen(TT.getArch() == Triple::amdgcn ? SOUTHERN_ISLANDS : R600), IsaVersion(ISAVersion0_0_0), - WavefrontSize(64), + WavefrontSize(0), LocalMemorySize(0), LDSBankCount(0), MaxPrivateElementSize(0), Index: llvm/trunk/lib/Target/AMDGPU/Processors.td =================================================================== --- llvm/trunk/lib/Target/AMDGPU/Processors.td +++ llvm/trunk/lib/Target/AMDGPU/Processors.td @@ -13,7 +13,7 @@ // The code produced for "generic" is only useful for tests and cannot // reasonably be expected to execute on any particular target. def : ProcessorModel<"generic", NoSchedModel, [ - FeatureGCN + FeatureGCN, FeatureWavefrontSize64 ]>; //===----------------------------------------------------------------------===//