Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8274,10 +8274,13 @@ } // fold (sext_inreg (extload x)) -> (sextload x) + // If sextload is not supported by target, we can only do the combine when + // load has one use. if (ISD::isEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) && EVT == cast(N0)->getMemoryVT() && - ((!LegalOperations && !cast(N0)->isVolatile()) || + ((!LegalOperations && !cast(N0)->isVolatile() && + N0.hasOneUse()) || TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, EVT))) { LoadSDNode *LN0 = cast(N0); SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT, Index: test/CodeGen/PowerPC/selectiondag-sextload.ll =================================================================== --- test/CodeGen/PowerPC/selectiondag-sextload.ll +++ test/CodeGen/PowerPC/selectiondag-sextload.ll @@ -0,0 +1,23 @@ +; RUN: llc --mtriple=powerpc64le-linux-gnu < %s | FileCheck %s + +; It tests in function DAGCombiner::visitSIGN_EXTEND_INREG +; signext will not be combined with extload, and causes extra zext. + +declare void @g(i32 signext) + +; CHECK-NOT: rlwinm +define void @foo(i8* %p) { +entry: + br label %while.body + +while.body: + %0 = load i8, i8* %p, align 1 + %conv = zext i8 %0 to i32 + %cmp = icmp sgt i8 %0, 0 + br i1 %cmp, label %if.then, label %while.body + +if.then: + tail call void @g(i32 signext %conv) + br label %while.body +} +