Index: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td =================================================================== --- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td +++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td @@ -335,6 +335,7 @@ } include "AArch64InstrFormats.td" +include "SVEInstrFormats.td" //===----------------------------------------------------------------------===// @@ -6275,3 +6276,4 @@ (TCRETURNdi texternalsym:$dst, imm:$FPDiff)>; include "AArch64InstrAtomics.td" +include "AArch64SVEInstrInfo.td" Index: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td =================================================================== --- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -0,0 +1,17 @@ +//=- AArch64SVEInstrInfo.td - AArch64 SVE Instructions -*- tablegen -*-----=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// AArch64 Scalable Vector Extension (SVE) Instruction definitions. +// +//===----------------------------------------------------------------------===// + +let Predicates = [HasSVE] in { + defm ADD_ZZZ : sve_int_bin_cons_arit_0<0b000, "add">; + defm SUB_ZZZ : sve_int_bin_cons_arit_0<0b001, "sub">; +} Index: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td =================================================================== --- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td +++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td @@ -0,0 +1,41 @@ +//=-- SVEInstrFormats.td - AArch64 SVE Instruction classes -*- tablegen -*--=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// AArch64 Scalable Vector Extension (SVE) Instruction Class Definitions. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// SVE Integer Arithmetic - Unpredicated Group +//===----------------------------------------------------------------------===// + +class sve_int_bin_cons_arit_0 sz8_64, bits<3> opc, string asm, + ZPRRegOp zprty> +: I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm), + asm, "\t$Zd, $Zn, $Zm", + "", []>, Sched<[]> { + bits<5> Zd; + bits<5> Zm; + bits<5> Zn; + let Inst{31-24} = 0b00000100; + let Inst{23-22} = sz8_64; + let Inst{21} = 0b1; + let Inst{20-16} = Zm; + let Inst{15-13} = 0b000; + let Inst{12-10} = opc; + let Inst{9-5} = Zn; + let Inst{4-0} = Zd; +} + +multiclass sve_int_bin_cons_arit_0 opc, string asm> { + def _B : sve_int_bin_cons_arit_0<0b00, opc, asm, ZPR8>; + def _H : sve_int_bin_cons_arit_0<0b01, opc, asm, ZPR16>; + def _S : sve_int_bin_cons_arit_0<0b10, opc, asm, ZPR32>; + def _D : sve_int_bin_cons_arit_0<0b11, opc, asm, ZPR64>; +} Index: llvm/trunk/test/MC/AArch64/SVE/assembler_tests/add.s =================================================================== --- llvm/trunk/test/MC/AArch64/SVE/assembler_tests/add.s +++ llvm/trunk/test/MC/AArch64/SVE/assembler_tests/add.s @@ -0,0 +1,66 @@ +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s +add z31.s, z31.s, z31.s // 00000100-10111111-00000011-11111111 +// CHECK: add z31.s, z31.s, z31.s // encoding: [0xff,0x03,0xbf,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10111111-00000011-11111111 +add z23.d, z13.d, z8.d // 00000100-11101000-00000001-10110111 +// CHECK: add z23.d, z13.d, z8.d // encoding: [0xb7,0x01,0xe8,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11101000-00000001-10110111 +add z0.s, z0.s, z0.s // 00000100-10100000-00000000-00000000 +// CHECK: add z0.s, z0.s, z0.s // encoding: [0x00,0x00,0xa0,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10100000-00000000-00000000 +add z31.d, z31.d, z31.d // 00000100-11111111-00000011-11111111 +// CHECK: add z31.d, z31.d, z31.d // encoding: [0xff,0x03,0xff,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11111111-00000011-11111111 +add z21.b, z10.b, z21.b // 00000100-00110101-00000001-01010101 +// CHECK: add z21.b, z10.b, z21.b // encoding: [0x55,0x01,0x35,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00110101-00000001-01010101 +add z31.b, z31.b, z31.b // 00000100-00111111-00000011-11111111 +// CHECK: add z31.b, z31.b, z31.b // encoding: [0xff,0x03,0x3f,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00111111-00000011-11111111 +add z0.h, z0.h, z0.h // 00000100-01100000-00000000-00000000 +// CHECK: add z0.h, z0.h, z0.h // encoding: [0x00,0x00,0x60,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01100000-00000000-00000000 +add z23.b, z13.b, z8.b // 00000100-00101000-00000001-10110111 +// CHECK: add z23.b, z13.b, z8.b // encoding: [0xb7,0x01,0x28,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00101000-00000001-10110111 +add z0.d, z0.d, z0.d // 00000100-11100000-00000000-00000000 +// CHECK: add z0.d, z0.d, z0.d // encoding: [0x00,0x00,0xe0,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11100000-00000000-00000000 +add z31.h, z31.h, z31.h // 00000100-01111111-00000011-11111111 +// CHECK: add z31.h, z31.h, z31.h // encoding: [0xff,0x03,0x7f,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01111111-00000011-11111111 +add z0.b, z0.b, z0.b // 00000100-00100000-00000000-00000000 +// CHECK: add z0.b, z0.b, z0.b // encoding: [0x00,0x00,0x20,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00100000-00000000-00000000 +add z21.d, z10.d, z21.d // 00000100-11110101-00000001-01010101 +// CHECK: add z21.d, z10.d, z21.d // encoding: [0x55,0x01,0xf5,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11110101-00000001-01010101 +add z21.h, z10.h, z21.h // 00000100-01110101-00000001-01010101 +// CHECK: add z21.h, z10.h, z21.h // encoding: [0x55,0x01,0x75,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01110101-00000001-01010101 +add z21.s, z10.s, z21.s // 00000100-10110101-00000001-01010101 +// CHECK: add z21.s, z10.s, z21.s // encoding: [0x55,0x01,0xb5,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10110101-00000001-01010101 +add z23.h, z13.h, z8.h // 00000100-01101000-00000001-10110111 +// CHECK: add z23.h, z13.h, z8.h // encoding: [0xb7,0x01,0x68,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01101000-00000001-10110111 +add z23.s, z13.s, z8.s // 00000100-10101000-00000001-10110111 +// CHECK: add z23.s, z13.s, z8.s // encoding: [0xb7,0x01,0xa8,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10101000-00000001-10110111 Index: llvm/trunk/test/MC/AArch64/SVE/assembler_tests/sub.s =================================================================== --- llvm/trunk/test/MC/AArch64/SVE/assembler_tests/sub.s +++ llvm/trunk/test/MC/AArch64/SVE/assembler_tests/sub.s @@ -0,0 +1,66 @@ +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s +sub z0.h, z0.h, z0.h // 00000100-01100000-00000100-00000000 +// CHECK: sub z0.h, z0.h, z0.h // encoding: [0x00,0x04,0x60,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01100000-00000100-00000000 +sub z21.b, z10.b, z21.b // 00000100-00110101-00000101-01010101 +// CHECK: sub z21.b, z10.b, z21.b // encoding: [0x55,0x05,0x35,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00110101-00000101-01010101 +sub z31.h, z31.h, z31.h // 00000100-01111111-00000111-11111111 +// CHECK: sub z31.h, z31.h, z31.h // encoding: [0xff,0x07,0x7f,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01111111-00000111-11111111 +sub z21.h, z10.h, z21.h // 00000100-01110101-00000101-01010101 +// CHECK: sub z21.h, z10.h, z21.h // encoding: [0x55,0x05,0x75,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01110101-00000101-01010101 +sub z31.b, z31.b, z31.b // 00000100-00111111-00000111-11111111 +// CHECK: sub z31.b, z31.b, z31.b // encoding: [0xff,0x07,0x3f,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00111111-00000111-11111111 +sub z0.s, z0.s, z0.s // 00000100-10100000-00000100-00000000 +// CHECK: sub z0.s, z0.s, z0.s // encoding: [0x00,0x04,0xa0,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10100000-00000100-00000000 +sub z23.b, z13.b, z8.b // 00000100-00101000-00000101-10110111 +// CHECK: sub z23.b, z13.b, z8.b // encoding: [0xb7,0x05,0x28,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00101000-00000101-10110111 +sub z21.d, z10.d, z21.d // 00000100-11110101-00000101-01010101 +// CHECK: sub z21.d, z10.d, z21.d // encoding: [0x55,0x05,0xf5,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11110101-00000101-01010101 +sub z21.s, z10.s, z21.s // 00000100-10110101-00000101-01010101 +// CHECK: sub z21.s, z10.s, z21.s // encoding: [0x55,0x05,0xb5,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10110101-00000101-01010101 +sub z0.b, z0.b, z0.b // 00000100-00100000-00000100-00000000 +// CHECK: sub z0.b, z0.b, z0.b // encoding: [0x00,0x04,0x20,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-00100000-00000100-00000000 +sub z23.d, z13.d, z8.d // 00000100-11101000-00000101-10110111 +// CHECK: sub z23.d, z13.d, z8.d // encoding: [0xb7,0x05,0xe8,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11101000-00000101-10110111 +sub z23.s, z13.s, z8.s // 00000100-10101000-00000101-10110111 +// CHECK: sub z23.s, z13.s, z8.s // encoding: [0xb7,0x05,0xa8,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10101000-00000101-10110111 +sub z31.d, z31.d, z31.d // 00000100-11111111-00000111-11111111 +// CHECK: sub z31.d, z31.d, z31.d // encoding: [0xff,0x07,0xff,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11111111-00000111-11111111 +sub z23.h, z13.h, z8.h // 00000100-01101000-00000101-10110111 +// CHECK: sub z23.h, z13.h, z8.h // encoding: [0xb7,0x05,0x68,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-01101000-00000101-10110111 +sub z0.d, z0.d, z0.d // 00000100-11100000-00000100-00000000 +// CHECK: sub z0.d, z0.d, z0.d // encoding: [0x00,0x04,0xe0,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-11100000-00000100-00000000 +sub z31.s, z31.s, z31.s // 00000100-10111111-00000111-11111111 +// CHECK: sub z31.s, z31.s, z31.s // encoding: [0xff,0x07,0xbf,0x04] +// CHECK-ERROR: invalid operand for instruction +// CHECK-ERROR-NEXT: 00000100-10111111-00000111-11111111 Index: llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/add.s =================================================================== --- llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/add.s +++ llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/add.s @@ -0,0 +1,50 @@ +# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=+sve < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s +0xff,0x03,0xbf,0x04 +# CHECK: add z31.s, z31.s, z31.s // encoding: [0xff,0x03,0xbf,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x01,0xe8,0x04 +# CHECK: add z23.d, z13.d, z8.d // encoding: [0xb7,0x01,0xe8,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x00,0xa0,0x04 +# CHECK: add z0.s, z0.s, z0.s // encoding: [0x00,0x00,0xa0,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x03,0xff,0x04 +# CHECK: add z31.d, z31.d, z31.d // encoding: [0xff,0x03,0xff,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x01,0x35,0x04 +# CHECK: add z21.b, z10.b, z21.b // encoding: [0x55,0x01,0x35,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x03,0x3f,0x04 +# CHECK: add z31.b, z31.b, z31.b // encoding: [0xff,0x03,0x3f,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x00,0x60,0x04 +# CHECK: add z0.h, z0.h, z0.h // encoding: [0x00,0x00,0x60,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x01,0x28,0x04 +# CHECK: add z23.b, z13.b, z8.b // encoding: [0xb7,0x01,0x28,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x00,0xe0,0x04 +# CHECK: add z0.d, z0.d, z0.d // encoding: [0x00,0x00,0xe0,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x03,0x7f,0x04 +# CHECK: add z31.h, z31.h, z31.h // encoding: [0xff,0x03,0x7f,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x00,0x20,0x04 +# CHECK: add z0.b, z0.b, z0.b // encoding: [0x00,0x00,0x20,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x01,0xf5,0x04 +# CHECK: add z21.d, z10.d, z21.d // encoding: [0x55,0x01,0xf5,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x01,0x75,0x04 +# CHECK: add z21.h, z10.h, z21.h // encoding: [0x55,0x01,0x75,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x01,0xb5,0x04 +# CHECK: add z21.s, z10.s, z21.s // encoding: [0x55,0x01,0xb5,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x01,0x68,0x04 +# CHECK: add z23.h, z13.h, z8.h // encoding: [0xb7,0x01,0x68,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x01,0xa8,0x04 +# CHECK: add z23.s, z13.s, z8.s // encoding: [0xb7,0x01,0xa8,0x04] +# CHECK-ERROR: invalid instruction encoding Index: llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/sub.s =================================================================== --- llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/sub.s +++ llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/sub.s @@ -0,0 +1,50 @@ +# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=+sve < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s +0x00,0x04,0x60,0x04 +# CHECK: sub z0.h, z0.h, z0.h // encoding: [0x00,0x04,0x60,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x05,0x35,0x04 +# CHECK: sub z21.b, z10.b, z21.b // encoding: [0x55,0x05,0x35,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x07,0x7f,0x04 +# CHECK: sub z31.h, z31.h, z31.h // encoding: [0xff,0x07,0x7f,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x05,0x75,0x04 +# CHECK: sub z21.h, z10.h, z21.h // encoding: [0x55,0x05,0x75,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x07,0x3f,0x04 +# CHECK: sub z31.b, z31.b, z31.b // encoding: [0xff,0x07,0x3f,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x04,0xa0,0x04 +# CHECK: sub z0.s, z0.s, z0.s // encoding: [0x00,0x04,0xa0,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x05,0x28,0x04 +# CHECK: sub z23.b, z13.b, z8.b // encoding: [0xb7,0x05,0x28,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x05,0xf5,0x04 +# CHECK: sub z21.d, z10.d, z21.d // encoding: [0x55,0x05,0xf5,0x04] +# CHECK-ERROR: invalid instruction encoding +0x55,0x05,0xb5,0x04 +# CHECK: sub z21.s, z10.s, z21.s // encoding: [0x55,0x05,0xb5,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x04,0x20,0x04 +# CHECK: sub z0.b, z0.b, z0.b // encoding: [0x00,0x04,0x20,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x05,0xe8,0x04 +# CHECK: sub z23.d, z13.d, z8.d // encoding: [0xb7,0x05,0xe8,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x05,0xa8,0x04 +# CHECK: sub z23.s, z13.s, z8.s // encoding: [0xb7,0x05,0xa8,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x07,0xff,0x04 +# CHECK: sub z31.d, z31.d, z31.d // encoding: [0xff,0x07,0xff,0x04] +# CHECK-ERROR: invalid instruction encoding +0xb7,0x05,0x68,0x04 +# CHECK: sub z23.h, z13.h, z8.h // encoding: [0xb7,0x05,0x68,0x04] +# CHECK-ERROR: invalid instruction encoding +0x00,0x04,0xe0,0x04 +# CHECK: sub z0.d, z0.d, z0.d // encoding: [0x00,0x04,0xe0,0x04] +# CHECK-ERROR: invalid instruction encoding +0xff,0x07,0xbf,0x04 +# CHECK: sub z31.s, z31.s, z31.s // encoding: [0xff,0x07,0xbf,0x04] +# CHECK-ERROR: invalid instruction encoding