Index: lib/CodeGen/MachineCombiner.cpp
===================================================================
--- lib/CodeGen/MachineCombiner.cpp
+++ lib/CodeGen/MachineCombiner.cpp
@@ -415,7 +415,7 @@
 
   bool IncrementalUpdate = false;
   auto BlockIter = MBB->begin();
-  auto LastUpdate = BlockIter;
+  decltype(BlockIter) LastUpdate;
   // Check if the block is in a loop.
   const MachineLoop *ML = MLI->getLoopFor(MBB);
   if (!MinInstr)
@@ -503,9 +503,11 @@
                                     InstrIdxForVirtReg, P,
                                     !IncrementalUpdate) &&
             preservesResourceLen(MBB, BlockTrace, InsInstrs, DelInstrs)) {
-          if (MBB->size() > inc_threshold)
+          if (MBB->size() > inc_threshold) {
             // Use incremental depth updates for basic blocks above treshold
             IncrementalUpdate = true;
+            LastUpdate = BlockIter;
+          }
 
           insertDeleteInstructions(MBB, MI, InsInstrs, DelInstrs, MinInstr,
                                    RegUnits, IncrementalUpdate);
Index: test/CodeGen/AArch64/machine-combiner.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AArch64/machine-combiner.mir
@@ -0,0 +1,98 @@
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a57 -enable-unsafe-fp-math \
+# RUN:     -run-pass machine-combiner -machine-combiner-inc-threshold=0 \
+# RUN:     -verify-machineinstrs  -o - %s | FileCheck %s
+--- |
+  define double @iterator_test(double %in, i32 %a, i32 %b, i32 %c) {
+  entry:
+    %cmp = icmp sgt i32 %a, %b
+    br i1 %cmp, label %bb1, label %bb2
+
+  bb1:                                              ; preds = %entry
+  ; First combine must start the BB and enable increment updates
+    %0 = mul nsw i32 %a, %b
+    %1 = add nsw i32 %c, %0
+    %2 = sitofp i32 %1 to double
+  ; Next combine will trigger incremental updates.
+    %3 = fmul double %2, %2
+    %4 = fadd double %in, %3
+    ret double %4
+
+  bb2:                                              ; preds = %entry
+    ret double %in
+  }
+...
+---
+#
+# CHECK-LABEL: name: iterator_test
+name:            iterator_test
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: fpr64, preferred-register: '' }
+  - { id: 1, class: gpr32, preferred-register: '' }
+  - { id: 2, class: gpr32, preferred-register: '' }
+  - { id: 3, class: gpr32, preferred-register: '' }
+  - { id: 4, class: gpr32, preferred-register: '' }
+  - { id: 5, class: gpr32, preferred-register: '' }
+  - { id: 6, class: gpr32, preferred-register: '' }
+  - { id: 7, class: fpr64, preferred-register: '' }
+  - { id: 8, class: fpr64, preferred-register: '' }
+  - { id: 9, class: fpr64, preferred-register: '' }
+liveins:
+  - { reg: '%d0', virtual-reg: '%0' }
+  - { reg: '%w0', virtual-reg: '%1' }
+  - { reg: '%w1', virtual-reg: '%2' }
+  - { reg: '%w2', virtual-reg: '%3' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    0
+  adjustsStack:    false
+  hasCalls:        false
+  stackProtector:  ''
+  maxCallFrameSize: 4294967295
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:
+stack:
+constants:
+body:             |
+  bb.0.entry:
+    successors: %bb.1.bb1(0x40000000), %bb.2.bb2(0x40000000)
+    liveins: %d0, %w0, %w1, %w2
+
+    %3 = COPY %w2
+    %2 = COPY %w1
+    %1 = COPY %w0
+    %0 = COPY %d0
+    %4 = SUBSWrr %1, %2, implicit-def %nzcv
+    Bcc 13, %bb.2.bb2, implicit %nzcv
+    B %bb.1.bb1
+
+  bb.1.bb1:
+    ; CHECK: MADDWrrr %1, %2, %3
+    %5 = MADDWrrr %1, %2, %wzr
+    %6 = ADDWrr %3, killed %5
+    %7 = SCVTFUWDri killed %6
+    ; CHECK: FMADDDrrr %7, %7, %0
+    %8 = FMULDrr %7, %7
+    %9 = FADDDrr %0, killed %8
+    %d0 = COPY %9
+    RET_ReallyLR implicit %d0
+
+  bb.2.bb2:
+    %d0 = COPY %0
+    RET_ReallyLR implicit %d0
+
+...