Index: llvm/trunk/include/llvm/MC/MCExpr.h =================================================================== --- llvm/trunk/include/llvm/MC/MCExpr.h +++ llvm/trunk/include/llvm/MC/MCExpr.h @@ -262,6 +262,8 @@ VK_Mips_GOT_LO16, VK_Mips_CALL_HI16, VK_Mips_CALL_LO16, + VK_Mips_PCREL_HI16, + VK_Mips_PCREL_LO16, VK_COFF_IMGREL32 // symbol@imgrel (image-relative) }; Index: llvm/trunk/lib/MC/MCExpr.cpp =================================================================== --- llvm/trunk/lib/MC/MCExpr.cpp +++ llvm/trunk/lib/MC/MCExpr.cpp @@ -271,6 +271,8 @@ case VK_Mips_GOT_LO16: return "GOT_LO16"; case VK_Mips_CALL_HI16: return "CALL_HI16"; case VK_Mips_CALL_LO16: return "CALL_LO16"; + case VK_Mips_PCREL_HI16: return "PCREL_HI16"; + case VK_Mips_PCREL_LO16: return "PCREL_LO16"; case VK_COFF_IMGREL32: return "IMGREL32"; } llvm_unreachable("Invalid variant kind"); Index: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1982,6 +1982,8 @@ .Case("call_lo", MCSymbolRefExpr::VK_Mips_CALL_LO16) .Case("higher", MCSymbolRefExpr::VK_Mips_HIGHER) .Case("highest", MCSymbolRefExpr::VK_Mips_HIGHEST) + .Case("pcrel_hi", MCSymbolRefExpr::VK_Mips_PCREL_HI16) + .Case("pcrel_lo", MCSymbolRefExpr::VK_Mips_PCREL_LO16) .Default(MCSymbolRefExpr::VK_None); assert(VK != MCSymbolRefExpr::VK_None); Index: llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp +++ llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp @@ -166,6 +166,8 @@ case MCSymbolRefExpr::VK_Mips_GOT_LO16: OS << "%got_lo("; break; case MCSymbolRefExpr::VK_Mips_CALL_HI16: OS << "%call_hi("; break; case MCSymbolRefExpr::VK_Mips_CALL_LO16: OS << "%call_lo("; break; + case MCSymbolRefExpr::VK_Mips_PCREL_HI16: OS << "%pcrel_hi("; break; + case MCSymbolRefExpr::VK_Mips_PCREL_LO16: OS << "%pcrel_lo("; break; } OS << SRE->getSymbol(); Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -56,6 +56,7 @@ case Mips::fixup_MICROMIPS_GOT_PAGE: case Mips::fixup_MICROMIPS_GOT_OFST: case Mips::fixup_MICROMIPS_GOT_DISP: + case Mips::fixup_MIPS_PCLO16: break; case Mips::fixup_Mips_PC16: // So far we are only using this type for branches. @@ -80,6 +81,7 @@ case Mips::fixup_Mips_GOT_HI16: case Mips::fixup_Mips_CALL_HI16: case Mips::fixup_MICROMIPS_HI16: + case Mips::fixup_MIPS_PCHI16: // Get the 2nd 16-bits. Also add 1 if bit 15 is 1. Value = ((Value + 0x8000) >> 16) & 0xffff; break; @@ -247,6 +249,8 @@ { "fixup_Mips_CALL_LO16", 0, 16, 0 }, { "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_MIPS_PCHI16", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_MIPS_PCLO16", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_26_S1", 0, 26, 0 }, { "fixup_MICROMIPS_HI16", 0, 16, 0 }, { "fixup_MICROMIPS_LO16", 0, 16, 0 }, @@ -306,6 +310,8 @@ { "fixup_Mips_CALL_LO16", 16, 16, 0 }, { "fixup_MIPS_PC21_S2", 11, 21, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MIPS_PC26_S2", 6, 26, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_MIPS_PCHI16", 16, 16, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_MIPS_PCLO16", 16, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_26_S1", 6, 26, 0 }, { "fixup_MICROMIPS_HI16", 16, 16, 0 }, { "fixup_MICROMIPS_LO16", 16, 16, 0 }, Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -199,6 +199,12 @@ case Mips::fixup_MIPS_PC26_S2: Type = ELF::R_MIPS_PC26_S2; break; + case Mips::fixup_MIPS_PCHI16: + Type = ELF::R_MIPS_PCHI16; + break; + case Mips::fixup_MIPS_PCLO16: + Type = ELF::R_MIPS_PCLO16; + break; } return Type; } Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h @@ -134,6 +134,12 @@ // resulting in - R_MIPS_PC26_S2 fixup_MIPS_PC26_S2, + // resulting in - R_MIPS_PCHI16 + fixup_MIPS_PCHI16, + + // resulting in - R_MIPS_PCLO16 + fixup_MIPS_PCLO16, + // resulting in - R_MICROMIPS_26_S1 fixup_MICROMIPS_26_S1, Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -480,6 +480,12 @@ case MCSymbolRefExpr::VK_Mips_CALL_LO16: FixupKind = Mips::fixup_Mips_CALL_LO16; break; + case MCSymbolRefExpr::VK_Mips_PCREL_HI16: + FixupKind = Mips::fixup_MIPS_PCHI16; + break; + case MCSymbolRefExpr::VK_Mips_PCREL_LO16: + FixupKind = Mips::fixup_MIPS_PCLO16; + break; } // switch Fixups.push_back(MCFixup::Create(0, Expr, MCFixupKind(FixupKind))); Index: llvm/trunk/test/MC/Mips/mips32r6/relocations.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/relocations.s +++ llvm/trunk/test/MC/Mips/mips32r6/relocations.s @@ -23,6 +23,14 @@ # CHECK-FIXUP: bc bar # encoding: [0b110010AA,A,A,A] # CHECK-FIXUP: # fixup A - offset: 0, # CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC26_S2 +# CHECK-FIXUP: aluipc $2, %pcrel_hi(bar) # encoding: [0xec,0x5f,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar@PCREL_HI16, +# CHECK-FIXUP: kind: fixup_MIPS_PCHI16 +# CHECK-FIXUP: addiu $2, $2, %pcrel_lo(bar) # encoding: [0x24,0x42,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar@PCREL_LO16, +# CHECK-FIXUP: kind: fixup_MIPS_PCLO16 #------------------------------------------------------------------------------ # Check that the appropriate relocations were created. #------------------------------------------------------------------------------ @@ -33,6 +41,8 @@ # CHECK-ELF: 0xC R_MIPS_PC21_S2 bar 0x0 # CHECK-ELF: 0x10 R_MIPS_PC26_S2 bar 0x0 # CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar 0x0 +# CHECK-ELF: 0x18 R_MIPS_PCHI16 bar 0x0 +# CHECK-ELF: 0x1C R_MIPS_PCLO16 bar 0x0 # CHECK-ELF: ] beqc $5, $6, bar @@ -41,3 +51,5 @@ bnezc $9, bar balc bar bc bar + aluipc $2, %pcrel_hi(bar) + addiu $2, $2, %pcrel_lo(bar) Index: llvm/trunk/test/MC/Mips/mips64r6/relocations.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64r6/relocations.s +++ llvm/trunk/test/MC/Mips/mips64r6/relocations.s @@ -23,6 +23,14 @@ # CHECK-FIXUP: bc bar # encoding: [0b110010AA,A,A,A] # CHECK-FIXUP: # fixup A - offset: 0, # CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC26_S2 +# CHECK-FIXUP: aluipc $2, %pcrel_hi(bar) # encoding: [0xec,0x5f,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar@PCREL_HI16, +# CHECK-FIXUP: kind: fixup_MIPS_PCHI16 +# CHECK-FIXUP: addiu $2, $2, %pcrel_lo(bar) # encoding: [0x24,0x42,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar@PCREL_LO16, +# CHECK-FIXUP: kind: fixup_MIPS_PCLO16 #------------------------------------------------------------------------------ # Check that the appropriate relocations were created. #------------------------------------------------------------------------------ @@ -33,6 +41,8 @@ # CHECK-ELF: 0xC R_MIPS_PC21_S2 bar 0x0 # CHECK-ELF: 0x10 R_MIPS_PC26_S2 bar 0x0 # CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar 0x0 +# CHECK-ELF: 0x18 R_MIPS_PCHI16 bar 0x0 +# CHECK-ELF: 0x1C R_MIPS_PCLO16 bar 0x0 # CHECK-ELF: ] beqc $5, $6, bar @@ -41,3 +51,5 @@ bnezc $9, bar balc bar bc bar + aluipc $2, %pcrel_hi(bar) + addiu $2, $2, %pcrel_lo(bar)