Added R_PPC_ADDR16_HI relocation support to lld

[vit9696]

Summary

The support of R_PPC_ADDR16_HI improves ld compatibility and makes things on par with RuntimeDyldELF that already implements this relocation.

[davide]

test/ELF/ppc-relocs.s

27–32

I assume you checked that bfd or gold produce the same results?

78

why this changed?

[vit9696]

test/ELF/ppc-relocs.s

27–32

Well, initially I did not, since it was simple. Yet I have just checked bfd, and ensured that it is the same.
(The only difference between hi and ha is the higher bit, and I simply followed applyPPChi/applyPPCha).

78

I wanted the HA/HI tests be closer to each other for readability reasons.

[ruiu]

LGTM

For the record, R_PPC64_ADDR_HI is defined as

R_PPC64_ADDR16_HI         5        half16        #hi(S + A)

where

#hi(x) = ((x >> 16) & 0xffff).

in this document: http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html#RELOC-TYPE

[davide]

Was this ever committed?

[vit9696]

In D38509#895496, @davide wrote:

Was this ever committed?

Not yet. I don't have commit rights, could you commit it please?

[vit9696]

Ping, would anybody commit this please?

[ruiu]

Committed as r316306.

ELF/Arch/PPC.cpp

 };
 } // namespace
 
 void PPC::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
   switch (Type) {
   case R_PPC_ADDR16_HA:
     write16be(Loc, (Val + 0x8000) >> 16);
     break;
+  case R_PPC_ADDR16_HI:
+    write16be(Loc, Val >> 16);
+    break;
   case R_PPC_ADDR16_LO:
     write16be(Loc, Val);
     break;
   case R_PPC_ADDR32:
   case R_PPC_REL32:
     write32be(Loc, Val);
     break;
   case R_PPC_REL24:

test/ELF/ppc-relocs.s

msg:
   len = . - msg
 
 # CHECK: Disassembly of section .R_PPC_ADDR16_HA:
 # CHECK: _start:
 # CHECK:    11000:       3c 80 00 01     lis 4, 1
 # CHECK: msg:
 # CHECK:    11004:       66 6f 6f 00     oris 15, 19, 28416
 
+.section .R_PPC_ADDR16_HI,"ax",@progbits
+.globl _starti
+_starti:
+  lis 4,msgi@h
+msgi:
+  .string "foo"
+  leni = . - msgi
+
+# CHECK: Disassembly of section .R_PPC_ADDR16_HI:
+# CHECK: _starti:
+# CHECK:    11008:       3c 80 00 01     lis 4, 1
+# CHECK: msgi:
+# CHECK:    1100c:       66 6f 6f 00     oris 15, 19, 28416
+
 .section .R_PPC_ADDR16_LO,"ax",@progbits
   addi 4, 4, msg@l
 mystr:
   .asciz "blah"
   len = . - mystr
 
 # CHECK: Disassembly of section .R_PPC_ADDR16_LO:
 # CHECK: .R_PPC_ADDR16_LO:
-# CHECK:    11008:       38 84 10 04     addi 4, 4, 4100
+# CHECK:    11010:       38 84 10 04     addi 4, 4, 4100
 # CHECK: mystr:
-# CHECK:    1100c:       62 6c 61 68     ori 12, 19, 24936
+# CHECK:    11014:       62 6c 61 68     ori 12, 19, 24936
 
 .align  2
 .section .R_PPC_REL24,"ax",@progbits
 .globl .FR_PPC_REL24
 .FR_PPC_REL24:
   b .Lfoox
 .section .R_PPC_REL24_2,"ax",@progbits
 .Lfoox:
 
 # CHECK: Disassembly of section .R_PPC_REL24:
 # CHECK: .FR_PPC_REL24:
-# CHECK:    11014:       48 00 00 04     b .+4
+# CHECK:    1101c:       48 00 00 04     b .+4
 
 .section .R_PPC_REL32,"ax",@progbits
 .globl .FR_PPC_REL32
 .FR_PPC_REL32:
   .long .Lfoox3 - .
 .section .R_PPC_REL32_2,"ax",@progbits
 .Lfoox3:
 
 # CHECK: Disassembly of section .R_PPC_REL32:
 # CHECK: .FR_PPC_REL32:
-# CHECK:    11018:       00 00 00 04
+# CHECK:    11020:       00 00 00 04
 
 .section .R_PPC_ADDR32,"ax",@progbits
 .globl .FR_PPC_ADDR32
 .FR_PPC_ADDR32:
   .long .Lfoox2
 .section .R_PPC_ADDR32_2,"ax",@progbits
 .Lfoox2:
 
 # CHECK: Disassembly of section .R_PPC_ADDR32:
 # CHECK: .FR_PPC_ADDR32:
-# CHECK:    1101c:       00 01 10 20
+# CHECK:    11024:       00 01 10 28