Index: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h =================================================================== --- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h +++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h @@ -21,10 +21,10 @@ namespace llvm { -class LLVMTargetMachine; struct MachineSchedContext; class PassConfigImpl; class ScheduleDAGInstrs; +class TargetMachine; // The old pass manager infrastructure is hidden in a legacy namespace now. namespace legacy { @@ -121,7 +121,7 @@ void setStartStopPasses(); protected: - LLVMTargetMachine *TM; + TargetMachine *TM; PassConfigImpl *Impl = nullptr; // Internal data structures bool Initialized = false; // Flagged after all passes are configured. @@ -141,7 +141,7 @@ bool addCoreISelPasses(); public: - TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm); + TargetPassConfig(TargetMachine &TM, PassManagerBase &pm); // Dummy constructor. TargetPassConfig(); @@ -378,7 +378,6 @@ virtual void addFastRegAlloc(FunctionPass *RegAllocPass); /// addOptimizedRegAlloc - Add passes related to register allocation. - /// LLVMTargetMachine provides standard regalloc passes for most targets. virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass); /// addPreRewrite - Add passes to the optimized register allocation pipeline Index: llvm/trunk/include/llvm/MC/MCAsmInfo.h =================================================================== --- llvm/trunk/include/llvm/MC/MCAsmInfo.h +++ llvm/trunk/include/llvm/MC/MCAsmInfo.h @@ -353,7 +353,7 @@ /// The integrated assembler should be enabled by default (by the /// constructors) when failing to parse a valid piece of assembly (inline /// or otherwise) is considered a bug. It may then be overridden after - /// construction (see LLVMTargetMachine::initAsmInfo()). + /// construction (see TargetMachine::initAsmInfo()). bool UseIntegratedAssembler; /// Preserve Comments in assembly Index: llvm/trunk/include/llvm/Target/TargetMachine.h =================================================================== --- llvm/trunk/include/llvm/Target/TargetMachine.h +++ llvm/trunk/include/llvm/Target/TargetMachine.h @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file defines the TargetMachine and LLVMTargetMachine classes. +/// \file Defines the TargetMachine interface. // //===----------------------------------------------------------------------===// @@ -49,16 +49,16 @@ using legacy::PassManagerBase; //===----------------------------------------------------------------------===// -/// + /// Primary interface to the complete machine description for the target /// machine. All target-specific information should be accessible through this /// interface. -/// class TargetMachine { protected: // Can only create subclasses. TargetMachine(const Target &T, StringRef DataLayoutString, const Triple &TargetTriple, StringRef CPU, StringRef FS, - const TargetOptions &Options); + const TargetOptions &Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL); /// The Target that this machine was created for. const Target &TheTarget; @@ -91,6 +91,8 @@ unsigned RequireStructuredCFG : 1; unsigned O0WantsFastISel : 1; + void initAsmInfo(); + public: const TargetOptions DefaultOptions; mutable TargetOptions Options; @@ -225,23 +227,18 @@ /// supported, or false on success. /// \p MMI is an optional parameter that, if set to non-nullptr, /// will be used to set the MachineModuloInfo for this PM. - virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &, - CodeGenFileType, - bool /*DisableVerify*/ = true, - MachineModuleInfo *MMI = nullptr) { - return true; - } + virtual bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out, + CodeGenFileType FileType, + bool DisableVerify = true, + MachineModuleInfo *MMI = nullptr); /// Add passes to the specified pass manager to get machine code emitted with /// the MCJIT. This method returns true if machine code is not supported. It /// fills the MCContext Ctx pointer which can be used to build custom /// MCStreamer. - /// - virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&, - raw_pwrite_stream &, - bool /*DisableVerify*/ = true) { - return true; - } + virtual bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, + raw_pwrite_stream &OS, + bool DisableVerify = true); /// True if subtarget inserts the final scheduling pass on its own. /// @@ -265,47 +262,11 @@ virtual bool useIPRA() const { return false; } -}; - -/// This class describes a target machine that is implemented with the LLVM -/// target-independent code generator. -/// -class LLVMTargetMachine : public TargetMachine { -protected: // Can only create subclasses. - LLVMTargetMachine(const Target &T, StringRef DataLayoutString, - const Triple &TargetTriple, StringRef CPU, StringRef FS, - const TargetOptions &Options, Reloc::Model RM, - CodeModel::Model CM, CodeGenOpt::Level OL); - - void initAsmInfo(); - -public: - /// \brief Get a TargetIRAnalysis implementation for the target. - /// - /// This analysis will produce a TTI result which uses the common code - /// generator to answer queries about the IR. - TargetIRAnalysis getTargetIRAnalysis() override; /// Create a pass configuration object to be used by addPassToEmitX methods /// for generating a pipeline of CodeGen passes. virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); - /// Add passes to the specified pass manager to get the specified file - /// emitted. Typically this will involve several steps of code generation. - /// \p MMI is an optional parameter that, if set to non-nullptr, - /// will be used to set the MachineModuloInfofor this PM. - bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out, - CodeGenFileType FileType, bool DisableVerify = true, - MachineModuleInfo *MMI = nullptr) override; - - /// Add passes to the specified pass manager to get machine code emitted with - /// the MCJIT. This method returns true if machine code is not supported. It - /// fills the MCContext Ctx pointer which can be used to build custom - /// MCStreamer. - bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, - raw_pwrite_stream &OS, - bool DisableVerify = true) override; - /// Returns true if the target is expected to pass all machine verifier /// checks. This is a stopgap measure to fix targets one by one. We will /// remove this at some point and always enable the verifier when Index: llvm/trunk/lib/CodeGen/CMakeLists.txt =================================================================== --- llvm/trunk/lib/CodeGen/CMakeLists.txt +++ llvm/trunk/lib/CodeGen/CMakeLists.txt @@ -53,7 +53,6 @@ LiveRegUnits.cpp LiveStackAnalysis.cpp LiveVariables.cpp - LLVMTargetMachine.cpp LocalStackSlotAllocation.cpp LowLevelType.cpp LowerEmuTLS.cpp @@ -142,6 +141,8 @@ TargetInstrInfo.cpp TargetLoweringBase.cpp TargetLoweringObjectFileImpl.cpp + TargetMachine.cpp + TargetMachineC.cpp TargetOptionsImpl.cpp TargetPassConfig.cpp TargetRegisterInfo.cpp Index: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp =================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp @@ -1,259 +0,0 @@ -//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements the LLVMTargetMachine class. -// -//===----------------------------------------------------------------------===// - -#include "llvm/Analysis/Passes.h" -#include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/BasicTTIImpl.h" -#include "llvm/CodeGen/MachineModuleInfo.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/TargetPassConfig.h" -#include "llvm/IR/IRPrintingPasses.h" -#include "llvm/IR/LegacyPassManager.h" -#include "llvm/IR/Verifier.h" -#include "llvm/MC/MCAsmBackend.h" -#include "llvm/MC/MCAsmInfo.h" -#include "llvm/MC/MCCodeEmitter.h" -#include "llvm/MC/MCContext.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/MC/MCStreamer.h" -#include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/FormattedStream.h" -#include "llvm/Support/TargetRegistry.h" -#include "llvm/Target/TargetLoweringObjectFile.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Transforms/Scalar.h" -using namespace llvm; - -void LLVMTargetMachine::initAsmInfo() { - MRI = TheTarget.createMCRegInfo(getTargetTriple().str()); - MII = TheTarget.createMCInstrInfo(); - // FIXME: Having an MCSubtargetInfo on the target machine is a hack due - // to some backends having subtarget feature dependent module level - // code generation. This is similar to the hack in the AsmPrinter for - // module level assembly etc. - STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(), - getTargetFeatureString()); - - MCAsmInfo *TmpAsmInfo = - TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str()); - // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, - // and if the old one gets included then MCAsmInfo will be NULL and - // we'll crash later. - // Provide the user with a useful error message about what's wrong. - assert(TmpAsmInfo && "MCAsmInfo not initialized. " - "Make sure you include the correct TargetSelect.h" - "and that InitializeAllTargetMCs() is being invoked!"); - - if (Options.DisableIntegratedAS) - TmpAsmInfo->setUseIntegratedAssembler(false); - - TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments); - - TmpAsmInfo->setCompressDebugSections(Options.CompressDebugSections); - - TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations); - - if (Options.ExceptionModel != ExceptionHandling::None) - TmpAsmInfo->setExceptionsType(Options.ExceptionModel); - - AsmInfo = TmpAsmInfo; -} - -LLVMTargetMachine::LLVMTargetMachine(const Target &T, - StringRef DataLayoutString, - const Triple &TT, StringRef CPU, - StringRef FS, const TargetOptions &Options, - Reloc::Model RM, CodeModel::Model CM, - CodeGenOpt::Level OL) - : TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) { - this->RM = RM; - this->CMModel = CM; - this->OptLevel = OL; -} - -TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() { - return TargetIRAnalysis([this](const Function &F) { - return TargetTransformInfo(BasicTTIImpl(this, F)); - }); -} - -/// addPassesToX helper drives creation and initialization of TargetPassConfig. -static MCContext * -addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM, - bool DisableVerify, bool &WillCompleteCodeGenPipeline, - raw_pwrite_stream &Out, MachineModuleInfo *MMI) { - // Targets may override createPassConfig to provide a target-specific - // subclass. - TargetPassConfig *PassConfig = TM->createPassConfig(PM); - // Set PassConfig options provided by TargetMachine. - PassConfig->setDisableVerify(DisableVerify); - WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline(); - PM.add(PassConfig); - if (!MMI) - MMI = new MachineModuleInfo(TM); - PM.add(MMI); - - if (PassConfig->addISelPasses()) - return nullptr; - PassConfig->addMachinePasses(); - PassConfig->setInitialized(); - if (!WillCompleteCodeGenPipeline) - PM.add(createPrintMIRPass(Out)); - - return &MMI->getContext(); -} - -bool LLVMTargetMachine::addAsmPrinter(PassManagerBase &PM, - raw_pwrite_stream &Out, CodeGenFileType FileType, - MCContext &Context) { - if (Options.MCOptions.MCSaveTempLabels) - Context.setAllowTemporaryLabels(false); - - const MCSubtargetInfo &STI = *getMCSubtargetInfo(); - const MCAsmInfo &MAI = *getMCAsmInfo(); - const MCRegisterInfo &MRI = *getMCRegisterInfo(); - const MCInstrInfo &MII = *getMCInstrInfo(); - - std::unique_ptr AsmStreamer; - - switch (FileType) { - case CGFT_AssemblyFile: { - MCInstPrinter *InstPrinter = getTarget().createMCInstPrinter( - getTargetTriple(), MAI.getAssemblerDialect(), MAI, MII, MRI); - - // Create a code emitter if asked to show the encoding. - MCCodeEmitter *MCE = nullptr; - if (Options.MCOptions.ShowMCEncoding) - MCE = getTarget().createMCCodeEmitter(MII, MRI, Context); - - MCAsmBackend *MAB = - getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU, - Options.MCOptions); - auto FOut = llvm::make_unique(Out); - MCStreamer *S = getTarget().createAsmStreamer( - Context, std::move(FOut), Options.MCOptions.AsmVerbose, - Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB, - Options.MCOptions.ShowMCInst); - AsmStreamer.reset(S); - break; - } - case CGFT_ObjectFile: { - // Create the code emitter for the target if it exists. If not, .o file - // emission fails. - MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, Context); - MCAsmBackend *MAB = - getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU, - Options.MCOptions); - if (!MCE || !MAB) - return true; - - // Don't waste memory on names of temp labels. - Context.setUseNamesOnTempLabels(false); - - Triple T(getTargetTriple().str()); - AsmStreamer.reset(getTarget().createMCObjectStreamer( - T, Context, std::unique_ptr(MAB), Out, - std::unique_ptr(MCE), STI, Options.MCOptions.MCRelaxAll, - Options.MCOptions.MCIncrementalLinkerCompatible, - /*DWARFMustBeAtTheEnd*/ true)); - break; - } - case CGFT_Null: - // The Null output is intended for use for performance analysis and testing, - // not real users. - AsmStreamer.reset(getTarget().createNullStreamer(Context)); - break; - } - - // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. - FunctionPass *Printer = - getTarget().createAsmPrinter(*this, std::move(AsmStreamer)); - if (!Printer) - return true; - - PM.add(Printer); - return false; -} - -bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, - raw_pwrite_stream &Out, - CodeGenFileType FileType, - bool DisableVerify, - MachineModuleInfo *MMI) { - // Add common CodeGen passes. - bool WillCompleteCodeGenPipeline = true; - MCContext *Context = addPassesToGenerateCode( - this, PM, DisableVerify, WillCompleteCodeGenPipeline, Out, MMI); - if (!Context) - return true; - - if (WillCompleteCodeGenPipeline && addAsmPrinter(PM, Out, FileType, *Context)) - return true; - - PM.add(createFreeMachineFunctionPass()); - return false; -} - -/// addPassesToEmitMC - Add passes to the specified pass manager to get -/// machine code emitted with the MCJIT. This method returns true if machine -/// code is not supported. It fills the MCContext Ctx pointer which can be -/// used to build custom MCStreamer. -/// -bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, - raw_pwrite_stream &Out, - bool DisableVerify) { - // Add common CodeGen passes. - bool WillCompleteCodeGenPipeline = true; - Ctx = addPassesToGenerateCode(this, PM, DisableVerify, - WillCompleteCodeGenPipeline, Out, - /*MachineModuleInfo*/ nullptr); - if (!Ctx) - return true; - assert(WillCompleteCodeGenPipeline && "CodeGen pipeline has been altered"); - - if (Options.MCOptions.MCSaveTempLabels) - Ctx->setAllowTemporaryLabels(false); - - // Create the code emitter for the target if it exists. If not, .o file - // emission fails. - const MCRegisterInfo &MRI = *getMCRegisterInfo(); - MCCodeEmitter *MCE = - getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx); - MCAsmBackend *MAB = - getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU, - Options.MCOptions); - if (!MCE || !MAB) - return true; - - const Triple &T = getTargetTriple(); - const MCSubtargetInfo &STI = *getMCSubtargetInfo(); - std::unique_ptr AsmStreamer(getTarget().createMCObjectStreamer( - T, *Ctx, std::unique_ptr(MAB), Out, - std::unique_ptr(MCE), STI, Options.MCOptions.MCRelaxAll, - Options.MCOptions.MCIncrementalLinkerCompatible, - /*DWARFMustBeAtTheEnd*/ true)); - - // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. - FunctionPass *Printer = - getTarget().createAsmPrinter(*this, std::move(AsmStreamer)); - if (!Printer) - return true; - - PM.add(Printer); - PM.add(createFreeMachineFunctionPass()); - - return false; // success! -} Index: llvm/trunk/lib/CodeGen/MachineVerifier.cpp =================================================================== --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp @@ -17,10 +17,8 @@ // Register live intervals: Registers must be defined only once, and must be // defined before use. // -// The machine code verifier is enabled from LLVMTargetMachine.cpp with the -// command-line option -verify-machineinstrs, or by defining the environment -// variable LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive -// the verifier errors. +// The machine code verifier is enabled with the command-line option +// -verify-machineinstrs. //===----------------------------------------------------------------------===// #include "llvm/ADT/BitVector.h" Index: llvm/trunk/lib/CodeGen/TargetMachine.cpp =================================================================== --- llvm/trunk/lib/CodeGen/TargetMachine.cpp +++ llvm/trunk/lib/CodeGen/TargetMachine.cpp @@ -0,0 +1,420 @@ +//===-- TargetMachine.cpp - Implement the TargetMachine class -------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +/// \file Implements the TargetMachine class. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Target/TargetMachine.h" + +#include "llvm/Analysis/Passes.h" +#include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/BasicTTIImpl.h" +#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/CodeGen/TargetPassConfig.h" +#include "llvm/IR/IRPrintingPasses.h" +#include "llvm/IR/LegacyPassManager.h" +#include "llvm/IR/Mangler.h" +#include "llvm/IR/Verifier.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FormattedStream.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Target/TargetLoweringObjectFile.h" +#include "llvm/Target/TargetOptions.h" +#include "llvm/Transforms/Scalar.h" +using namespace llvm; + +TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString, + const Triple &TT, StringRef CPU, StringRef FS, + const TargetOptions &Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL) + : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU), + TargetFS(FS), RM(RM), CMModel(CM), OptLevel(OL), AsmInfo(nullptr), + MRI(nullptr), MII(nullptr), STI(nullptr), RequireStructuredCFG(false), + DefaultOptions(Options), Options(Options) { +} + +TargetMachine::~TargetMachine() { + delete AsmInfo; + delete MRI; + delete MII; + delete STI; +} + +bool TargetMachine::isPositionIndependent() const { + return getRelocationModel() == Reloc::PIC_; +} + +// FIXME: This function needs to go away for a number of reasons: +// a) global state on the TargetMachine is terrible in general, +// b) these target options should be passed only on the function +// and not on the TargetMachine (via TargetOptions) at all. +void TargetMachine::resetTargetOptions(const Function &F) const { +#define RESET_OPTION(X, Y) \ + do { \ + if (F.hasFnAttribute(Y)) \ + Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \ + else \ + Options.X = DefaultOptions.X; \ + } while (0) + + RESET_OPTION(UnsafeFPMath, "unsafe-fp-math"); + RESET_OPTION(NoInfsFPMath, "no-infs-fp-math"); + RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math"); + RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math"); + RESET_OPTION(NoTrappingFPMath, "no-trapping-math"); + + StringRef Denormal = + F.getFnAttribute("denormal-fp-math").getValueAsString(); + if (Denormal == "ieee") + Options.FPDenormalMode = FPDenormal::IEEE; + else if (Denormal == "preserve-sign") + Options.FPDenormalMode = FPDenormal::PreserveSign; + else if (Denormal == "positive-zero") + Options.FPDenormalMode = FPDenormal::PositiveZero; + else + Options.FPDenormalMode = DefaultOptions.FPDenormalMode; +} + +Reloc::Model TargetMachine::getRelocationModel() const { return RM; } + +CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; } + +/// Get the IR-specified TLS model for Var. +static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) { + switch (GV->getThreadLocalMode()) { + case GlobalVariable::NotThreadLocal: + llvm_unreachable("getSelectedTLSModel for non-TLS variable"); + break; + case GlobalVariable::GeneralDynamicTLSModel: + return TLSModel::GeneralDynamic; + case GlobalVariable::LocalDynamicTLSModel: + return TLSModel::LocalDynamic; + case GlobalVariable::InitialExecTLSModel: + return TLSModel::InitialExec; + case GlobalVariable::LocalExecTLSModel: + return TLSModel::LocalExec; + } + llvm_unreachable("invalid TLS model"); +} + +bool TargetMachine::shouldAssumeDSOLocal(const Module &M, + const GlobalValue *GV) const { + Reloc::Model RM = getRelocationModel(); + const Triple &TT = getTargetTriple(); + + // DLLImport explicitly marks the GV as external. + if (GV && GV->hasDLLImportStorageClass()) + return false; + + // Every other GV is local on COFF. + // Make an exception for windows OS in the triple: Some firmwares builds use + // *-win32-macho triples. This (accidentally?) produced windows relocations + // without GOT tables in older clang versions; Keep this behaviour. + if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO())) + return true; + + if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility())) + return true; + + if (TT.isOSBinFormatMachO()) { + if (RM == Reloc::Static) + return true; + return GV && GV->isStrongDefinitionForLinker(); + } + + assert(TT.isOSBinFormatELF()); + assert(RM != Reloc::DynamicNoPIC); + + bool IsExecutable = + RM == Reloc::Static || M.getPIELevel() != PIELevel::Default; + if (IsExecutable) { + // If the symbol is defined, it cannot be preempted. + if (GV && !GV->isDeclarationForLinker()) + return true; + + bool IsTLS = GV && GV->isThreadLocal(); + bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV && + isa(GV) && + !GV->hasExternalWeakLinkage(); + Triple::ArchType Arch = TT.getArch(); + bool IsPPC = + Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le; + // Check if we can use copy relocations. PowerPC has no copy relocations. + if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs)) + return true; + } + + // ELF supports preemption of other symbols. + return false; +} + +TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const { + bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default; + Reloc::Model RM = getRelocationModel(); + bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE; + bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV); + + TLSModel::Model Model; + if (IsSharedLibrary) { + if (IsLocal) + Model = TLSModel::LocalDynamic; + else + Model = TLSModel::GeneralDynamic; + } else { + if (IsLocal) + Model = TLSModel::LocalExec; + else + Model = TLSModel::InitialExec; + } + + // If the user specified a more specific model, use that. + TLSModel::Model SelectedModel = getSelectedTLSModel(GV); + if (SelectedModel > Model) + return SelectedModel; + + return Model; +} + +CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; } + +void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; } + +void TargetMachine::getNameWithPrefix(SmallVectorImpl &Name, + const GlobalValue *GV, Mangler &Mang, + bool MayAlwaysUsePrivate) const { + if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) { + // Simple case: If GV is not private, it is not important to find out if + // private labels are legal in this case or not. + Mang.getNameWithPrefix(Name, GV, false); + return; + } + const TargetLoweringObjectFile *TLOF = getObjFileLowering(); + TLOF->getNameWithPrefix(Name, GV, *this); +} + +MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const { + const TargetLoweringObjectFile *TLOF = getObjFileLowering(); + SmallString<128> NameStr; + getNameWithPrefix(NameStr, GV, TLOF->getMangler()); + return TLOF->getContext().getOrCreateSymbol(NameStr); +} + +void TargetMachine::initAsmInfo() { + MRI = TheTarget.createMCRegInfo(getTargetTriple().str()); + MII = TheTarget.createMCInstrInfo(); + // FIXME: Having an MCSubtargetInfo on the target machine is a hack due + // to some backends having subtarget feature dependent module level + // code generation. This is similar to the hack in the AsmPrinter for + // module level assembly etc. + STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(), + getTargetFeatureString()); + + MCAsmInfo *TmpAsmInfo = + TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str()); + // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, + // and if the old one gets included then MCAsmInfo will be NULL and + // we'll crash later. + // Provide the user with a useful error message about what's wrong. + assert(TmpAsmInfo && "MCAsmInfo not initialized. " + "Make sure you include the correct TargetSelect.h" + "and that InitializeAllTargetMCs() is being invoked!"); + + if (Options.DisableIntegratedAS) + TmpAsmInfo->setUseIntegratedAssembler(false); + + TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments); + + TmpAsmInfo->setCompressDebugSections(Options.CompressDebugSections); + + TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations); + + if (Options.ExceptionModel != ExceptionHandling::None) + TmpAsmInfo->setExceptionsType(Options.ExceptionModel); + + AsmInfo = TmpAsmInfo; +} + +TargetIRAnalysis TargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis([this](const Function &F) { + return TargetTransformInfo(BasicTTIImpl(this, F)); + }); +} + +/// addPassesToX helper drives creation and initialization of TargetPassConfig. +static MCContext * +addPassesToGenerateCode(TargetMachine *TM, PassManagerBase &PM, + bool DisableVerify, bool &WillCompleteCodeGenPipeline, + raw_pwrite_stream &Out, MachineModuleInfo *MMI) { + // Targets may override createPassConfig to provide a target-specific + // subclass. + TargetPassConfig *PassConfig = TM->createPassConfig(PM); + // Set PassConfig options provided by TargetMachine. + PassConfig->setDisableVerify(DisableVerify); + WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline(); + PM.add(PassConfig); + if (!MMI) + MMI = new MachineModuleInfo(TM); + PM.add(MMI); + + if (PassConfig->addISelPasses()) + return nullptr; + PassConfig->addMachinePasses(); + PassConfig->setInitialized(); + if (!WillCompleteCodeGenPipeline) + PM.add(createPrintMIRPass(Out)); + + return &MMI->getContext(); +} + +bool TargetMachine::addAsmPrinter(PassManagerBase &PM, + raw_pwrite_stream &Out, CodeGenFileType FileType, + MCContext &Context) { + if (Options.MCOptions.MCSaveTempLabels) + Context.setAllowTemporaryLabels(false); + + const MCSubtargetInfo &STI = *getMCSubtargetInfo(); + const MCAsmInfo &MAI = *getMCAsmInfo(); + const MCRegisterInfo &MRI = *getMCRegisterInfo(); + const MCInstrInfo &MII = *getMCInstrInfo(); + + std::unique_ptr AsmStreamer; + + switch (FileType) { + case CGFT_AssemblyFile: { + MCInstPrinter *InstPrinter = getTarget().createMCInstPrinter( + getTargetTriple(), MAI.getAssemblerDialect(), MAI, MII, MRI); + + // Create a code emitter if asked to show the encoding. + MCCodeEmitter *MCE = nullptr; + if (Options.MCOptions.ShowMCEncoding) + MCE = getTarget().createMCCodeEmitter(MII, MRI, Context); + + MCAsmBackend *MAB = + getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU, + Options.MCOptions); + auto FOut = llvm::make_unique(Out); + MCStreamer *S = getTarget().createAsmStreamer( + Context, std::move(FOut), Options.MCOptions.AsmVerbose, + Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB, + Options.MCOptions.ShowMCInst); + AsmStreamer.reset(S); + break; + } + case CGFT_ObjectFile: { + // Create the code emitter for the target if it exists. If not, .o file + // emission fails. + MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, Context); + MCAsmBackend *MAB = + getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU, + Options.MCOptions); + if (!MCE || !MAB) + return true; + + // Don't waste memory on names of temp labels. + Context.setUseNamesOnTempLabels(false); + + Triple T(getTargetTriple().str()); + AsmStreamer.reset(getTarget().createMCObjectStreamer( + T, Context, std::unique_ptr(MAB), Out, + std::unique_ptr(MCE), STI, Options.MCOptions.MCRelaxAll, + Options.MCOptions.MCIncrementalLinkerCompatible, + /*DWARFMustBeAtTheEnd*/ true)); + break; + } + case CGFT_Null: + // The Null output is intended for use for performance analysis and testing, + // not real users. + AsmStreamer.reset(getTarget().createNullStreamer(Context)); + break; + } + + // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. + FunctionPass *Printer = + getTarget().createAsmPrinter(*this, std::move(AsmStreamer)); + if (!Printer) + return true; + + PM.add(Printer); + return false; +} + +bool TargetMachine::addPassesToEmitFile(PassManagerBase &PM, + raw_pwrite_stream &Out, + CodeGenFileType FileType, + bool DisableVerify, + MachineModuleInfo *MMI) { + // Add common CodeGen passes. + bool WillCompleteCodeGenPipeline = true; + MCContext *Context = addPassesToGenerateCode( + this, PM, DisableVerify, WillCompleteCodeGenPipeline, Out, MMI); + if (!Context) + return true; + + if (WillCompleteCodeGenPipeline && addAsmPrinter(PM, Out, FileType, *Context)) + return true; + + PM.add(createFreeMachineFunctionPass()); + return false; +} + +bool TargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, + raw_pwrite_stream &Out, + bool DisableVerify) { + // Add common CodeGen passes. + bool WillCompleteCodeGenPipeline = true; + Ctx = addPassesToGenerateCode(this, PM, DisableVerify, + WillCompleteCodeGenPipeline, Out, + /*MachineModuleInfo*/ nullptr); + if (!Ctx) + return true; + assert(WillCompleteCodeGenPipeline && "CodeGen pipeline has been altered"); + + if (Options.MCOptions.MCSaveTempLabels) + Ctx->setAllowTemporaryLabels(false); + + // Create the code emitter for the target if it exists. If not, .o file + // emission fails. + const MCRegisterInfo &MRI = *getMCRegisterInfo(); + MCCodeEmitter *MCE = + getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx); + MCAsmBackend *MAB = + getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU, + Options.MCOptions); + if (!MCE || !MAB) + return true; + + const Triple &T = getTargetTriple(); + const MCSubtargetInfo &STI = *getMCSubtargetInfo(); + std::unique_ptr AsmStreamer(getTarget().createMCObjectStreamer( + T, *Ctx, std::unique_ptr(MAB), Out, + std::unique_ptr(MCE), STI, Options.MCOptions.MCRelaxAll, + Options.MCOptions.MCIncrementalLinkerCompatible, + /*DWARFMustBeAtTheEnd*/ true)); + + // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. + FunctionPass *Printer = + getTarget().createAsmPrinter(*this, std::move(AsmStreamer)); + if (!Printer) + return true; + + PM.add(Printer); + PM.add(createFreeMachineFunctionPass()); + + return false; // success! +} Index: llvm/trunk/lib/CodeGen/TargetMachineC.cpp =================================================================== --- llvm/trunk/lib/CodeGen/TargetMachineC.cpp +++ llvm/trunk/lib/CodeGen/TargetMachineC.cpp @@ -0,0 +1,244 @@ +//===-- TargetMachine.cpp -------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the LLVM-C part of TargetMachine.h +// +//===----------------------------------------------------------------------===// + +#include "llvm-c/Core.h" +#include "llvm-c/Target.h" +#include "llvm-c/TargetMachine.h" +#include "llvm/Analysis/TargetTransformInfo.h" +#include "llvm/IR/DataLayout.h" +#include "llvm/IR/LegacyPassManager.h" +#include "llvm/IR/Module.h" +#include "llvm/Support/CodeGenCWrappers.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/FormattedStream.h" +#include "llvm/Support/Host.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetSubtargetInfo.h" +#include +#include +#include + +using namespace llvm; + +static TargetMachine *unwrap(LLVMTargetMachineRef P) { + return reinterpret_cast(P); +} +static Target *unwrap(LLVMTargetRef P) { + return reinterpret_cast(P); +} +static LLVMTargetMachineRef wrap(const TargetMachine *P) { + return reinterpret_cast(const_cast(P)); +} +static LLVMTargetRef wrap(const Target * P) { + return reinterpret_cast(const_cast(P)); +} + +LLVMTargetRef LLVMGetFirstTarget() { + if (TargetRegistry::targets().begin() == TargetRegistry::targets().end()) { + return nullptr; + } + + const Target *target = &*TargetRegistry::targets().begin(); + return wrap(target); +} +LLVMTargetRef LLVMGetNextTarget(LLVMTargetRef T) { + return wrap(unwrap(T)->getNext()); +} + +LLVMTargetRef LLVMGetTargetFromName(const char *Name) { + StringRef NameRef = Name; + auto I = find_if(TargetRegistry::targets(), + [&](const Target &T) { return T.getName() == NameRef; }); + return I != TargetRegistry::targets().end() ? wrap(&*I) : nullptr; +} + +LLVMBool LLVMGetTargetFromTriple(const char* TripleStr, LLVMTargetRef *T, + char **ErrorMessage) { + std::string Error; + + *T = wrap(TargetRegistry::lookupTarget(TripleStr, Error)); + + if (!*T) { + if (ErrorMessage) + *ErrorMessage = strdup(Error.c_str()); + + return 1; + } + + return 0; +} + +const char * LLVMGetTargetName(LLVMTargetRef T) { + return unwrap(T)->getName(); +} + +const char * LLVMGetTargetDescription(LLVMTargetRef T) { + return unwrap(T)->getShortDescription(); +} + +LLVMBool LLVMTargetHasJIT(LLVMTargetRef T) { + return unwrap(T)->hasJIT(); +} + +LLVMBool LLVMTargetHasTargetMachine(LLVMTargetRef T) { + return unwrap(T)->hasTargetMachine(); +} + +LLVMBool LLVMTargetHasAsmBackend(LLVMTargetRef T) { + return unwrap(T)->hasMCAsmBackend(); +} + +LLVMTargetMachineRef LLVMCreateTargetMachine(LLVMTargetRef T, + const char *Triple, const char *CPU, const char *Features, + LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc, + LLVMCodeModel CodeModel) { + Optional RM; + switch (Reloc){ + case LLVMRelocStatic: + RM = Reloc::Static; + break; + case LLVMRelocPIC: + RM = Reloc::PIC_; + break; + case LLVMRelocDynamicNoPic: + RM = Reloc::DynamicNoPIC; + break; + default: + break; + } + + bool JIT; + Optional CM = unwrap(CodeModel, JIT); + + CodeGenOpt::Level OL; + switch (Level) { + case LLVMCodeGenLevelNone: + OL = CodeGenOpt::None; + break; + case LLVMCodeGenLevelLess: + OL = CodeGenOpt::Less; + break; + case LLVMCodeGenLevelAggressive: + OL = CodeGenOpt::Aggressive; + break; + default: + OL = CodeGenOpt::Default; + break; + } + + TargetOptions opt; + return wrap(unwrap(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM, + OL, JIT)); +} + +void LLVMDisposeTargetMachine(LLVMTargetMachineRef T) { delete unwrap(T); } + +LLVMTargetRef LLVMGetTargetMachineTarget(LLVMTargetMachineRef T) { + const Target* target = &(unwrap(T)->getTarget()); + return wrap(target); +} + +char* LLVMGetTargetMachineTriple(LLVMTargetMachineRef T) { + std::string StringRep = unwrap(T)->getTargetTriple().str(); + return strdup(StringRep.c_str()); +} + +char* LLVMGetTargetMachineCPU(LLVMTargetMachineRef T) { + std::string StringRep = unwrap(T)->getTargetCPU(); + return strdup(StringRep.c_str()); +} + +char* LLVMGetTargetMachineFeatureString(LLVMTargetMachineRef T) { + std::string StringRep = unwrap(T)->getTargetFeatureString(); + return strdup(StringRep.c_str()); +} + +void LLVMSetTargetMachineAsmVerbosity(LLVMTargetMachineRef T, + LLVMBool VerboseAsm) { + unwrap(T)->Options.MCOptions.AsmVerbose = VerboseAsm; +} + +LLVMTargetDataRef LLVMCreateTargetDataLayout(LLVMTargetMachineRef T) { + return wrap(new DataLayout(unwrap(T)->createDataLayout())); +} + +static LLVMBool LLVMTargetMachineEmit(LLVMTargetMachineRef T, LLVMModuleRef M, + raw_pwrite_stream &OS, + LLVMCodeGenFileType codegen, + char **ErrorMessage) { + TargetMachine* TM = unwrap(T); + Module* Mod = unwrap(M); + + legacy::PassManager pass; + + std::string error; + + Mod->setDataLayout(TM->createDataLayout()); + + TargetMachine::CodeGenFileType ft; + switch (codegen) { + case LLVMAssemblyFile: + ft = TargetMachine::CGFT_AssemblyFile; + break; + default: + ft = TargetMachine::CGFT_ObjectFile; + break; + } + if (TM->addPassesToEmitFile(pass, OS, ft)) { + error = "TargetMachine can't emit a file of this type"; + *ErrorMessage = strdup(error.c_str()); + return true; + } + + pass.run(*Mod); + + OS.flush(); + return false; +} + +LLVMBool LLVMTargetMachineEmitToFile(LLVMTargetMachineRef T, LLVMModuleRef M, + char* Filename, LLVMCodeGenFileType codegen, char** ErrorMessage) { + std::error_code EC; + raw_fd_ostream dest(Filename, EC, sys::fs::F_None); + if (EC) { + *ErrorMessage = strdup(EC.message().c_str()); + return true; + } + bool Result = LLVMTargetMachineEmit(T, M, dest, codegen, ErrorMessage); + dest.flush(); + return Result; +} + +LLVMBool LLVMTargetMachineEmitToMemoryBuffer(LLVMTargetMachineRef T, + LLVMModuleRef M, LLVMCodeGenFileType codegen, char** ErrorMessage, + LLVMMemoryBufferRef *OutMemBuf) { + SmallString<0> CodeString; + raw_svector_ostream OStream(CodeString); + bool Result = LLVMTargetMachineEmit(T, M, OStream, codegen, ErrorMessage); + + StringRef Data = OStream.str(); + *OutMemBuf = + LLVMCreateMemoryBufferWithMemoryRangeCopy(Data.data(), Data.size(), ""); + return Result; +} + +char *LLVMGetDefaultTargetTriple(void) { + return strdup(sys::getDefaultTargetTriple().c_str()); +} + +void LLVMAddAnalysisPasses(LLVMTargetMachineRef T, LLVMPassManagerRef PM) { + unwrap(PM)->add( + createTargetTransformInfoWrapperPass(unwrap(T)->getTargetIRAnalysis())); +} Index: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp =================================================================== --- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp +++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp @@ -355,7 +355,7 @@ // Out of line constructor provides default values for pass options and // registers all common codegen passes. -TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm) +TargetPassConfig::TargetPassConfig(TargetMachine &TM, PassManagerBase &pm) : ImmutablePass(ID), PM(&pm), TM(&TM) { Impl = new PassConfigImpl(); @@ -408,7 +408,7 @@ /// addPassToEmitX methods for generating a pipeline of CodeGen passes. /// /// Targets may override this to extend TargetPassConfig. -TargetPassConfig *LLVMTargetMachine::createPassConfig(PassManagerBase &PM) { +TargetPassConfig *TargetMachine::createPassConfig(PassManagerBase &PM) { return new TargetPassConfig(*this, PM); } Index: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h =================================================================== --- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h +++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h @@ -23,7 +23,7 @@ class AArch64RegisterBankInfo; -class AArch64TargetMachine : public LLVMTargetMachine { +class AArch64TargetMachine : public TargetMachine { protected: std::unique_ptr TLOF; mutable StringMap> SubtargetMap; Index: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp +++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -237,10 +237,9 @@ Optional CM, CodeGenOpt::Level OL, bool JIT, bool LittleEndian) - : LLVMTargetMachine(T, - computeDataLayout(TT, Options.MCOptions, LittleEndian), - TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(TT, CM, JIT), OL), + : TargetMachine(T, computeDataLayout(TT, Options.MCOptions, LittleEndian), + TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(TT, CM, JIT), OL), TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) { initAsmInfo(); } Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h @@ -31,7 +31,7 @@ // AMDGPU Target Machine (R600+) //===----------------------------------------------------------------------===// -class AMDGPUTargetMachine : public LLVMTargetMachine { +class AMDGPUTargetMachine : public TargetMachine { protected: std::unique_ptr TLOF; AMDGPUIntrinsicInfo IntrinsicInfo; Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -290,9 +290,9 @@ Optional RM, Optional CM, CodeGenOpt::Level OptLevel) - : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU), - FS, Options, getEffectiveRelocModel(RM), - getEffectiveCodeModel(CM), OptLevel), + : TargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU), + FS, Options, getEffectiveRelocModel(RM), + getEffectiveCodeModel(CM), OptLevel), TLOF(createTLOF(getTargetTriple())) { AS = AMDGPU::getAMDGPUAS(TT); initAsmInfo(); @@ -471,7 +471,7 @@ class AMDGPUPassConfig : public TargetPassConfig { public: - AMDGPUPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) + AMDGPUPassConfig(TargetMachine &TM, PassManagerBase &PM) : TargetPassConfig(TM, PM) { // Exceptions and StackMaps are not supported, so these passes will never do // anything. @@ -502,7 +502,7 @@ class R600PassConfig final : public AMDGPUPassConfig { public: - R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) + R600PassConfig(TargetMachine &TM, PassManagerBase &PM) : AMDGPUPassConfig(TM, PM) {} ScheduleDAGInstrs *createMachineScheduler( @@ -519,7 +519,7 @@ class GCNPassConfig final : public AMDGPUPassConfig { public: - GCNPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) + GCNPassConfig(TargetMachine &TM, PassManagerBase &PM) : AMDGPUPassConfig(TM, PM) { // It is necessary to know the register usage of the entire call graph. We // allow calls without EnableAMDGPUFunctionCalls if they are marked Index: llvm/trunk/lib/Target/ARC/ARCTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/ARC/ARCTargetMachine.h +++ llvm/trunk/lib/Target/ARC/ARCTargetMachine.h @@ -21,7 +21,7 @@ class TargetPassConfig; -class ARCTargetMachine : public LLVMTargetMachine { +class ARCTargetMachine : public TargetMachine { std::unique_ptr TLOF; ARCSubtarget Subtarget; Index: llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp +++ llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp @@ -39,11 +39,10 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, - "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" - "f32:32:32-i64:32-f64:32-a:0:32-n32", - TT, CPU, FS, Options, getRelocModel(RM), - getEffectiveCodeModel(CM), OL), + : TargetMachine(T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" + "f32:32:32-i64:32-f64:32-a:0:32-n32", + TT, CPU, FS, Options, getRelocModel(RM), + getEffectiveCodeModel(CM), OL), TLOF(make_unique()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); Index: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { -class ARMBaseTargetMachine : public LLVMTargetMachine { +class ARMBaseTargetMachine : public TargetMachine { public: enum ARMABI { ARM_ABI_UNKNOWN, Index: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp @@ -205,9 +205,9 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool isLittle) - : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, - CPU, FS, Options, getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(CM), OL), + : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, + CPU, FS, Options, getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(CM), OL), TargetABI(computeTargetABI(TT, CPU, Options)), TLOF(createTLOF(getTargetTriple())), isLittle(isLittle) { Index: llvm/trunk/lib/Target/AVR/AVRTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/AVR/AVRTargetMachine.h +++ llvm/trunk/lib/Target/AVR/AVRTargetMachine.h @@ -26,12 +26,11 @@ namespace llvm { /// A generic AVR implementation. -class AVRTargetMachine : public LLVMTargetMachine { +class AVRTargetMachine : public TargetMachine { public: AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, - Optional RM, - Optional CM, + Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT); const AVRSubtarget *getSubtargetImpl() const; Index: llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp +++ llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp @@ -52,9 +52,8 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, - getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), - OL), + : TargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, + getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL), SubTarget(TT, getCPU(CPU), FS, *this) { this->TLOF = make_unique(); initAsmInfo(); Index: llvm/trunk/lib/Target/BPF/BPFTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/BPF/BPFTargetMachine.h +++ llvm/trunk/lib/Target/BPF/BPFTargetMachine.h @@ -18,7 +18,7 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { -class BPFTargetMachine : public LLVMTargetMachine { +class BPFTargetMachine : public TargetMachine { std::unique_ptr TLOF; BPFSubtarget Subtarget; Index: llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp +++ llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp @@ -55,9 +55,8 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, - getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), - OL), + : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, + getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL), TLOF(make_unique()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); Index: llvm/trunk/lib/Target/CMakeLists.txt =================================================================== --- llvm/trunk/lib/Target/CMakeLists.txt +++ llvm/trunk/lib/Target/CMakeLists.txt @@ -6,8 +6,6 @@ Target.cpp TargetIntrinsicInfo.cpp TargetLoweringObjectFile.cpp - TargetMachine.cpp - TargetMachineC.cpp ADDITIONAL_HEADER_DIRS ${LLVM_MAIN_INCLUDE_DIR}/llvm/Target Index: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h +++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h @@ -23,7 +23,7 @@ class Module; -class HexagonTargetMachine : public LLVMTargetMachine { +class HexagonTargetMachine : public TargetMachine { std::unique_ptr TLOF; mutable StringMap> SubtargetMap; Index: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -194,7 +194,7 @@ // Specify the vector alignment explicitly. For v512x1, the calculated // alignment would be 512*alignment(i1), which is 512 bytes, instead of // the required minimum of 64 bytes. - : LLVMTargetMachine( + : TargetMachine( T, "e-m:e-p:32:32:32-a:0-n16:32-" "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-" Index: llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h +++ llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { class formatted_raw_ostream; -class LanaiTargetMachine : public LLVMTargetMachine { +class LanaiTargetMachine : public TargetMachine { LanaiSubtarget Subtarget; std::unique_ptr TLOF; Index: llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp +++ llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp @@ -65,9 +65,9 @@ Optional RM, Optional CodeModel, CodeGenOpt::Level OptLevel, bool JIT) - : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options, - getEffectiveRelocModel(RM), - getEffectiveCodeModel(CodeModel), OptLevel), + : TargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options, + getEffectiveRelocModel(RM), + getEffectiveCodeModel(CodeModel), OptLevel), Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(), OptLevel), TLOF(new LanaiTargetObjectFile()) { Index: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h =================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h +++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h @@ -23,7 +23,7 @@ /// MSP430TargetMachine /// -class MSP430TargetMachine : public LLVMTargetMachine { +class MSP430TargetMachine : public TargetMachine { std::unique_ptr TLOF; MSP430Subtarget Subtarget; Index: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp +++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -49,9 +49,9 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, - Options, getEffectiveRelocModel(RM), - getEffectiveCodeModel(CM), OL), + : TargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, + Options, getEffectiveRelocModel(RM), + getEffectiveCodeModel(CM), OL), TLOF(make_unique()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp @@ -686,7 +686,7 @@ MCAssembler &MCA = getStreamer().getAssembler(); // It's possible that MCObjectFileInfo isn't fully initialized at this point - // due to an initialization order problem where LLVMTargetMachine creates the + // due to an initialization order problem where TargetMachine creates the // target streamer before TargetLoweringObjectFile calls // InitializeMCObjectFileInfo. There doesn't seem to be a single place that // covers all cases so this statement covers most cases and direct object Index: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { -class MipsTargetMachine : public LLVMTargetMachine { +class MipsTargetMachine : public TargetMachine { bool isLittle; std::unique_ptr TLOF; // Selected ABI Index: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp @@ -109,9 +109,9 @@ Optional CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) - : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, - CPU, FS, Options, getEffectiveRelocModel(JIT, RM), - getEffectiveCodeModel(CM), OL), + : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, + CPU, FS, Options, getEffectiveRelocModel(JIT, RM), + getEffectiveCodeModel(CM), OL), isLittle(isLittle), TLOF(llvm::make_unique()), ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this, Index: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h +++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h @@ -24,7 +24,7 @@ /// NVPTXTargetMachine /// -class NVPTXTargetMachine : public LLVMTargetMachine { +class NVPTXTargetMachine : public TargetMachine { bool is64bit; std::unique_ptr TLOF; NVPTX::DrvInterface drvInterface; Index: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -100,8 +100,8 @@ CodeGenOpt::Level OL, bool is64bit) // The pic relocation model is used regardless of what the client has // specified, as it is the only relocation model currently supported. - : LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options, - Reloc::PIC_, getEffectiveCodeModel(CM), OL), + : TargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options, + Reloc::PIC_, getEffectiveCodeModel(CM), OL), is64bit(is64bit), TLOF(llvm::make_unique()), Subtarget(TT, CPU, FS, *this) { if (TT.getOS() == Triple::NVCL) Index: llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h =================================================================== --- llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h +++ llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h @@ -18,7 +18,7 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { -class Nios2TargetMachine : public LLVMTargetMachine { +class Nios2TargetMachine : public TargetMachine { mutable StringMap> SubtargetMap; public: Index: llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp +++ llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp @@ -42,8 +42,8 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, computeDataLayout(), TT, CPU, FS, Options, - getEffectiveRelocModel(RM), *CM, OL) {} + : TargetMachine(T, computeDataLayout(), TT, CPU, FS, Options, + getEffectiveRelocModel(RM), *CM, OL) {} Nios2TargetMachine::~Nios2TargetMachine() {} Index: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h @@ -23,7 +23,7 @@ /// Common code between 32-bit and 64-bit PowerPC targets. /// -class PPCTargetMachine final : public LLVMTargetMachine { +class PPCTargetMachine final : public TargetMachine { public: enum PPCABI { PPC_ABI_UNKNOWN, PPC_ABI_ELFv1, PPC_ABI_ELFv2 }; private: Index: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -225,7 +225,7 @@ // The FeatureString here is a little subtle. We are modifying the feature // string with what are (currently) non-function specific overrides as it goes -// into the LLVMTargetMachine constructor and then using the stored value in the +// into the TargetMachine constructor and then using the stored value in the // Subtarget constructor below it. PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, @@ -233,10 +233,10 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU, - computeFSAdditions(FS, OL, TT), Options, - getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(TT, CM, JIT), OL), + : TargetMachine(T, getDataLayoutString(TT), TT, CPU, + computeFSAdditions(FS, OL, TT), Options, + getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(TT, CM, JIT), OL), TLOF(createTLOF(getTargetTriple())), TargetABI(computeTargetABI(TT, Options)) { initAsmInfo(); Index: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h +++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h @@ -20,7 +20,7 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { -class RISCVTargetMachine : public LLVMTargetMachine { +class RISCVTargetMachine : public TargetMachine { std::unique_ptr TLOF; public: Index: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp +++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -55,9 +55,9 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, - getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(CM), OL), + : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, + getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(CM), OL), TLOF(make_unique()) { initAsmInfo(); } Index: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h @@ -20,7 +20,7 @@ namespace llvm { -class SparcTargetMachine : public LLVMTargetMachine { +class SparcTargetMachine : public TargetMachine { std::unique_ptr TLOF; SparcSubtarget Subtarget; bool is64Bit; Index: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp @@ -88,7 +88,7 @@ const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) - : LLVMTargetMachine( + : TargetMachine( T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), is64bit, JIT), Index: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h +++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { -class SystemZTargetMachine : public LLVMTargetMachine { +class SystemZTargetMachine : public TargetMachine { std::unique_ptr TLOF; SystemZSubtarget Subtarget; @@ -42,7 +42,7 @@ return &Subtarget; } - // Override LLVMTargetMachine + // Override TargetMachine TargetPassConfig *createPassConfig(PassManagerBase &PM) override; TargetIRAnalysis getTargetIRAnalysis() override; Index: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp +++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp @@ -143,7 +143,7 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine( + : TargetMachine( T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL), Index: llvm/trunk/lib/Target/TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/TargetMachine.cpp +++ llvm/trunk/lib/Target/TargetMachine.cpp @@ -1,222 +0,0 @@ -//===-- TargetMachine.cpp - General Target Information ---------------------==// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file describes the general parts of a Target machine. -// -//===----------------------------------------------------------------------===// - -#include "llvm/Target/TargetMachine.h" -#include "llvm/Analysis/TargetTransformInfo.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/IR/Function.h" -#include "llvm/IR/GlobalAlias.h" -#include "llvm/IR/GlobalValue.h" -#include "llvm/IR/GlobalVariable.h" -#include "llvm/IR/LegacyPassManager.h" -#include "llvm/IR/Mangler.h" -#include "llvm/MC/MCAsmInfo.h" -#include "llvm/MC/MCContext.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/MC/MCSectionMachO.h" -#include "llvm/MC/MCTargetOptions.h" -#include "llvm/MC/SectionKind.h" -#include "llvm/Target/TargetLowering.h" -#include "llvm/Target/TargetLoweringObjectFile.h" -#include "llvm/Target/TargetSubtargetInfo.h" -using namespace llvm; - -//--------------------------------------------------------------------------- -// TargetMachine Class -// - -TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString, - const Triple &TT, StringRef CPU, StringRef FS, - const TargetOptions &Options) - : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU), - TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr), - RequireStructuredCFG(false), DefaultOptions(Options), Options(Options) { -} - -TargetMachine::~TargetMachine() { - delete AsmInfo; - delete MRI; - delete MII; - delete STI; -} - -bool TargetMachine::isPositionIndependent() const { - return getRelocationModel() == Reloc::PIC_; -} - -/// \brief Reset the target options based on the function's attributes. -// FIXME: This function needs to go away for a number of reasons: -// a) global state on the TargetMachine is terrible in general, -// b) these target options should be passed only on the function -// and not on the TargetMachine (via TargetOptions) at all. -void TargetMachine::resetTargetOptions(const Function &F) const { -#define RESET_OPTION(X, Y) \ - do { \ - if (F.hasFnAttribute(Y)) \ - Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \ - else \ - Options.X = DefaultOptions.X; \ - } while (0) - - RESET_OPTION(UnsafeFPMath, "unsafe-fp-math"); - RESET_OPTION(NoInfsFPMath, "no-infs-fp-math"); - RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math"); - RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math"); - RESET_OPTION(NoTrappingFPMath, "no-trapping-math"); - - StringRef Denormal = - F.getFnAttribute("denormal-fp-math").getValueAsString(); - if (Denormal == "ieee") - Options.FPDenormalMode = FPDenormal::IEEE; - else if (Denormal == "preserve-sign") - Options.FPDenormalMode = FPDenormal::PreserveSign; - else if (Denormal == "positive-zero") - Options.FPDenormalMode = FPDenormal::PositiveZero; - else - Options.FPDenormalMode = DefaultOptions.FPDenormalMode; -} - -/// Returns the code generation relocation model. The choices are static, PIC, -/// and dynamic-no-pic. -Reloc::Model TargetMachine::getRelocationModel() const { return RM; } - -/// Returns the code model. The choices are small, kernel, medium, large, and -/// target default. -CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; } - -/// Get the IR-specified TLS model for Var. -static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) { - switch (GV->getThreadLocalMode()) { - case GlobalVariable::NotThreadLocal: - llvm_unreachable("getSelectedTLSModel for non-TLS variable"); - break; - case GlobalVariable::GeneralDynamicTLSModel: - return TLSModel::GeneralDynamic; - case GlobalVariable::LocalDynamicTLSModel: - return TLSModel::LocalDynamic; - case GlobalVariable::InitialExecTLSModel: - return TLSModel::InitialExec; - case GlobalVariable::LocalExecTLSModel: - return TLSModel::LocalExec; - } - llvm_unreachable("invalid TLS model"); -} - -bool TargetMachine::shouldAssumeDSOLocal(const Module &M, - const GlobalValue *GV) const { - Reloc::Model RM = getRelocationModel(); - const Triple &TT = getTargetTriple(); - - // DLLImport explicitly marks the GV as external. - if (GV && GV->hasDLLImportStorageClass()) - return false; - - // Every other GV is local on COFF. - // Make an exception for windows OS in the triple: Some firmwares builds use - // *-win32-macho triples. This (accidentally?) produced windows relocations - // without GOT tables in older clang versions; Keep this behaviour. - if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO())) - return true; - - if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility())) - return true; - - if (TT.isOSBinFormatMachO()) { - if (RM == Reloc::Static) - return true; - return GV && GV->isStrongDefinitionForLinker(); - } - - assert(TT.isOSBinFormatELF()); - assert(RM != Reloc::DynamicNoPIC); - - bool IsExecutable = - RM == Reloc::Static || M.getPIELevel() != PIELevel::Default; - if (IsExecutable) { - // If the symbol is defined, it cannot be preempted. - if (GV && !GV->isDeclarationForLinker()) - return true; - - bool IsTLS = GV && GV->isThreadLocal(); - bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV && - isa(GV) && - !GV->hasExternalWeakLinkage(); - Triple::ArchType Arch = TT.getArch(); - bool IsPPC = - Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le; - // Check if we can use copy relocations. PowerPC has no copy relocations. - if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs)) - return true; - } - - // ELF supports preemption of other symbols. - return false; -} - -TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const { - bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default; - Reloc::Model RM = getRelocationModel(); - bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE; - bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV); - - TLSModel::Model Model; - if (IsSharedLibrary) { - if (IsLocal) - Model = TLSModel::LocalDynamic; - else - Model = TLSModel::GeneralDynamic; - } else { - if (IsLocal) - Model = TLSModel::LocalExec; - else - Model = TLSModel::InitialExec; - } - - // If the user specified a more specific model, use that. - TLSModel::Model SelectedModel = getSelectedTLSModel(GV); - if (SelectedModel > Model) - return SelectedModel; - - return Model; -} - -/// Returns the optimization level: None, Less, Default, or Aggressive. -CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; } - -void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; } - -TargetIRAnalysis TargetMachine::getTargetIRAnalysis() { - return TargetIRAnalysis([](const Function &F) { - return TargetTransformInfo(F.getParent()->getDataLayout()); - }); -} - -void TargetMachine::getNameWithPrefix(SmallVectorImpl &Name, - const GlobalValue *GV, Mangler &Mang, - bool MayAlwaysUsePrivate) const { - if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) { - // Simple case: If GV is not private, it is not important to find out if - // private labels are legal in this case or not. - Mang.getNameWithPrefix(Name, GV, false); - return; - } - const TargetLoweringObjectFile *TLOF = getObjFileLowering(); - TLOF->getNameWithPrefix(Name, GV, *this); -} - -MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const { - const TargetLoweringObjectFile *TLOF = getObjFileLowering(); - SmallString<128> NameStr; - getNameWithPrefix(NameStr, GV, TLOF->getMangler()); - return TLOF->getContext().getOrCreateSymbol(NameStr); -} Index: llvm/trunk/lib/Target/TargetMachineC.cpp =================================================================== --- llvm/trunk/lib/Target/TargetMachineC.cpp +++ llvm/trunk/lib/Target/TargetMachineC.cpp @@ -1,244 +0,0 @@ -//===-- TargetMachine.cpp -------------------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements the LLVM-C part of TargetMachine.h -// -//===----------------------------------------------------------------------===// - -#include "llvm-c/Core.h" -#include "llvm-c/Target.h" -#include "llvm-c/TargetMachine.h" -#include "llvm/Analysis/TargetTransformInfo.h" -#include "llvm/IR/DataLayout.h" -#include "llvm/IR/LegacyPassManager.h" -#include "llvm/IR/Module.h" -#include "llvm/Support/CodeGenCWrappers.h" -#include "llvm/Support/FileSystem.h" -#include "llvm/Support/FormattedStream.h" -#include "llvm/Support/Host.h" -#include "llvm/Support/TargetRegistry.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetSubtargetInfo.h" -#include -#include -#include - -using namespace llvm; - -static TargetMachine *unwrap(LLVMTargetMachineRef P) { - return reinterpret_cast(P); -} -static Target *unwrap(LLVMTargetRef P) { - return reinterpret_cast(P); -} -static LLVMTargetMachineRef wrap(const TargetMachine *P) { - return reinterpret_cast(const_cast(P)); -} -static LLVMTargetRef wrap(const Target * P) { - return reinterpret_cast(const_cast(P)); -} - -LLVMTargetRef LLVMGetFirstTarget() { - if (TargetRegistry::targets().begin() == TargetRegistry::targets().end()) { - return nullptr; - } - - const Target *target = &*TargetRegistry::targets().begin(); - return wrap(target); -} -LLVMTargetRef LLVMGetNextTarget(LLVMTargetRef T) { - return wrap(unwrap(T)->getNext()); -} - -LLVMTargetRef LLVMGetTargetFromName(const char *Name) { - StringRef NameRef = Name; - auto I = find_if(TargetRegistry::targets(), - [&](const Target &T) { return T.getName() == NameRef; }); - return I != TargetRegistry::targets().end() ? wrap(&*I) : nullptr; -} - -LLVMBool LLVMGetTargetFromTriple(const char* TripleStr, LLVMTargetRef *T, - char **ErrorMessage) { - std::string Error; - - *T = wrap(TargetRegistry::lookupTarget(TripleStr, Error)); - - if (!*T) { - if (ErrorMessage) - *ErrorMessage = strdup(Error.c_str()); - - return 1; - } - - return 0; -} - -const char * LLVMGetTargetName(LLVMTargetRef T) { - return unwrap(T)->getName(); -} - -const char * LLVMGetTargetDescription(LLVMTargetRef T) { - return unwrap(T)->getShortDescription(); -} - -LLVMBool LLVMTargetHasJIT(LLVMTargetRef T) { - return unwrap(T)->hasJIT(); -} - -LLVMBool LLVMTargetHasTargetMachine(LLVMTargetRef T) { - return unwrap(T)->hasTargetMachine(); -} - -LLVMBool LLVMTargetHasAsmBackend(LLVMTargetRef T) { - return unwrap(T)->hasMCAsmBackend(); -} - -LLVMTargetMachineRef LLVMCreateTargetMachine(LLVMTargetRef T, - const char *Triple, const char *CPU, const char *Features, - LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc, - LLVMCodeModel CodeModel) { - Optional RM; - switch (Reloc){ - case LLVMRelocStatic: - RM = Reloc::Static; - break; - case LLVMRelocPIC: - RM = Reloc::PIC_; - break; - case LLVMRelocDynamicNoPic: - RM = Reloc::DynamicNoPIC; - break; - default: - break; - } - - bool JIT; - Optional CM = unwrap(CodeModel, JIT); - - CodeGenOpt::Level OL; - switch (Level) { - case LLVMCodeGenLevelNone: - OL = CodeGenOpt::None; - break; - case LLVMCodeGenLevelLess: - OL = CodeGenOpt::Less; - break; - case LLVMCodeGenLevelAggressive: - OL = CodeGenOpt::Aggressive; - break; - default: - OL = CodeGenOpt::Default; - break; - } - - TargetOptions opt; - return wrap(unwrap(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM, - OL, JIT)); -} - -void LLVMDisposeTargetMachine(LLVMTargetMachineRef T) { delete unwrap(T); } - -LLVMTargetRef LLVMGetTargetMachineTarget(LLVMTargetMachineRef T) { - const Target* target = &(unwrap(T)->getTarget()); - return wrap(target); -} - -char* LLVMGetTargetMachineTriple(LLVMTargetMachineRef T) { - std::string StringRep = unwrap(T)->getTargetTriple().str(); - return strdup(StringRep.c_str()); -} - -char* LLVMGetTargetMachineCPU(LLVMTargetMachineRef T) { - std::string StringRep = unwrap(T)->getTargetCPU(); - return strdup(StringRep.c_str()); -} - -char* LLVMGetTargetMachineFeatureString(LLVMTargetMachineRef T) { - std::string StringRep = unwrap(T)->getTargetFeatureString(); - return strdup(StringRep.c_str()); -} - -void LLVMSetTargetMachineAsmVerbosity(LLVMTargetMachineRef T, - LLVMBool VerboseAsm) { - unwrap(T)->Options.MCOptions.AsmVerbose = VerboseAsm; -} - -LLVMTargetDataRef LLVMCreateTargetDataLayout(LLVMTargetMachineRef T) { - return wrap(new DataLayout(unwrap(T)->createDataLayout())); -} - -static LLVMBool LLVMTargetMachineEmit(LLVMTargetMachineRef T, LLVMModuleRef M, - raw_pwrite_stream &OS, - LLVMCodeGenFileType codegen, - char **ErrorMessage) { - TargetMachine* TM = unwrap(T); - Module* Mod = unwrap(M); - - legacy::PassManager pass; - - std::string error; - - Mod->setDataLayout(TM->createDataLayout()); - - TargetMachine::CodeGenFileType ft; - switch (codegen) { - case LLVMAssemblyFile: - ft = TargetMachine::CGFT_AssemblyFile; - break; - default: - ft = TargetMachine::CGFT_ObjectFile; - break; - } - if (TM->addPassesToEmitFile(pass, OS, ft)) { - error = "TargetMachine can't emit a file of this type"; - *ErrorMessage = strdup(error.c_str()); - return true; - } - - pass.run(*Mod); - - OS.flush(); - return false; -} - -LLVMBool LLVMTargetMachineEmitToFile(LLVMTargetMachineRef T, LLVMModuleRef M, - char* Filename, LLVMCodeGenFileType codegen, char** ErrorMessage) { - std::error_code EC; - raw_fd_ostream dest(Filename, EC, sys::fs::F_None); - if (EC) { - *ErrorMessage = strdup(EC.message().c_str()); - return true; - } - bool Result = LLVMTargetMachineEmit(T, M, dest, codegen, ErrorMessage); - dest.flush(); - return Result; -} - -LLVMBool LLVMTargetMachineEmitToMemoryBuffer(LLVMTargetMachineRef T, - LLVMModuleRef M, LLVMCodeGenFileType codegen, char** ErrorMessage, - LLVMMemoryBufferRef *OutMemBuf) { - SmallString<0> CodeString; - raw_svector_ostream OStream(CodeString); - bool Result = LLVMTargetMachineEmit(T, M, OStream, codegen, ErrorMessage); - - StringRef Data = OStream.str(); - *OutMemBuf = - LLVMCreateMemoryBufferWithMemoryRangeCopy(Data.data(), Data.size(), ""); - return Result; -} - -char *LLVMGetDefaultTargetTriple(void) { - return strdup(sys::getDefaultTargetTriple().c_str()); -} - -void LLVMAddAnalysisPasses(LLVMTargetMachineRef T, LLVMPassManagerRef PM) { - unwrap(PM)->add( - createTargetTransformInfoWrapperPass(unwrap(T)->getTargetIRAnalysis())); -} Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h @@ -21,7 +21,7 @@ namespace llvm { -class WebAssemblyTargetMachine final : public LLVMTargetMachine { +class WebAssemblyTargetMachine final : public TargetMachine { std::unique_ptr TLOF; mutable StringMap> SubtargetMap; Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -69,11 +69,10 @@ const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, - TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128" - : "e-m:e-p:32:32-i64:64-n32:64-S128", - TT, CPU, FS, Options, getEffectiveRelocModel(RM), - CM ? *CM : CodeModel::Large, OL), + : TargetMachine(T, TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128" + : "e-m:e-p:32:32-i64:64-n32:64-S128", + TT, CPU, FS, Options, getEffectiveRelocModel(RM), + CM ? *CM : CodeModel::Large, OL), TLOF(TT.isOSBinFormatELF() ? static_cast( new WebAssemblyTargetObjectFileELF()) : Index: llvm/trunk/lib/Target/X86/X86TargetMachine.h =================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.h +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h @@ -28,7 +28,7 @@ class X86Subtarget; class X86RegisterBankInfo; -class X86TargetMachine final : public LLVMTargetMachine { +class X86TargetMachine final : public TargetMachine { std::unique_ptr TLOF; mutable StringMap> SubtargetMap; Index: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp @@ -200,7 +200,7 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine( + : TargetMachine( T, computeDataLayout(TT), TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM), getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL), Index: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h =================================================================== --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h @@ -24,7 +24,7 @@ namespace llvm { -class XCoreTargetMachine : public LLVMTargetMachine { +class XCoreTargetMachine : public TargetMachine { std::unique_ptr TLOF; XCoreSubtarget Subtarget; Index: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp @@ -48,7 +48,7 @@ Optional RM, Optional CM, CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine( + : TargetMachine( T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32", TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL), Index: llvm/trunk/tools/llc/llc.cpp =================================================================== --- llvm/trunk/tools/llc/llc.cpp +++ llvm/trunk/tools/llc/llc.cpp @@ -511,8 +511,7 @@ } const char *argv0 = argv[0]; - LLVMTargetMachine &LLVMTM = static_cast(*Target); - MachineModuleInfo *MMI = new MachineModuleInfo(&LLVMTM); + MachineModuleInfo *MMI = new MachineModuleInfo(Target.get()); // Construct a custom pass pipeline that starts after instruction // selection. @@ -521,7 +520,7 @@ errs() << argv0 << ": run-pass is for .mir file only.\n"; return 1; } - TargetPassConfig &TPC = *LLVMTM.createPassConfig(PM); + TargetPassConfig &TPC = *Target->createPassConfig(PM); if (TPC.hasLimitedCodeGenPipeline()) { errs() << argv0 << ": run-pass cannot be used with " << TPC.getLimitedCodeGenPipelineReason(" and ") << ".\n"; Index: llvm/trunk/tools/opt/opt.cpp =================================================================== --- llvm/trunk/tools/opt/opt.cpp +++ llvm/trunk/tools/opt/opt.cpp @@ -593,10 +593,9 @@ } if (TM) { - // FIXME: We should dyn_cast this when supported. - auto <M = static_cast(*TM); - Pass *TPC = LTM.createPassConfig(Passes); - Passes.add(TPC); + Pass *TPC = TM->createPassConfig(Passes); + if (TPC) + Passes.add(TPC); } // Create a new optimization pass for each one specified on the command line Index: llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp =================================================================== --- llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp +++ llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp @@ -62,11 +62,11 @@ TargetInstrInfo TII; }; -class BogusTargetMachine : public LLVMTargetMachine { +class BogusTargetMachine : public TargetMachine { public: BogusTargetMachine() - : LLVMTargetMachine(Target(), "", Triple(""), "", "", TargetOptions(), - Reloc::Static, CodeModel::Small, CodeGenOpt::Default), + : TargetMachine(Target(), "", Triple(""), "", "", TargetOptions(), + Reloc::Static, CodeModel::Small, CodeGenOpt::Default), ST(*this) {} ~BogusTargetMachine() override {}