Index: lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -469,7 +469,7 @@
     }
     NewOps.push_back(User->getOperand(i));
   }
-  TLO.DAG.UpdateNodeOperands(User, NewOps);
+  User = TLO.DAG.UpdateNodeOperands(User, NewOps);
   // Op has less users now, so we may be able to perform additional combines
   // with it.
   DCI.AddToWorklist(Op.getNode());
Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6485,7 +6485,7 @@
                                      Node->getOperand(i)), 0));
   }
 
-  DAG.UpdateNodeOperands(Node, Ops);
+  Node = DAG.UpdateNodeOperands(Node, Ops);
   return Node;
 }
 
Index: test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
@@ -0,0 +1,85 @@
+; RUN: (ulimit -t 5; llc -march=amdgcn < %s | FileCheck -check-prefix=GCN %s)
+
+; Check we can compile this test without an infinite loop in
+; TLI.SimplifyDemandedBits() due to failure to use return value
+; of TLO.DAG.UpdateNodeOperands()
+
+; On success, the body of foo() is empty save for a s_endpgm.
+; Check for it.
+
+@0 = external unnamed_addr addrspace(3) global [462 x float], align 4
+
+declare i32 @llvm.amdgcn.workitem.id.y() 
+declare i32 @llvm.amdgcn.workitem.id.x() 
+declare float @llvm.fmuladd.f32(float, float, float) 
+
+; GCN: s_endpgm
+define amdgpu_kernel void @foo(float addrspace(1)* noalias nocapture readonly, float addrspace(1)* noalias nocapture readonly, float addrspace(1)* noalias nocapture, float) local_unnamed_addr !reqd_work_group_size !{i32 8, i32 16, i32 1} {
+  %5 = tail call i32 @llvm.amdgcn.workitem.id.y() 
+  %6 = tail call i32 @llvm.amdgcn.workitem.id.x() 
+  %7 = and i32 %5, 15
+  %8 = mul nuw nsw i32 %7, 21
+  %9 = sub i32 %8, 0
+  %10 = add i32 %9, 0
+  %11 = add i32 %10, 0
+  %12 = getelementptr inbounds [462 x float], [462 x float] addrspace(3)* @0, i32 0, i32 0
+  br label %14
+
+; <label>:13:
+  br i1 undef, label %39, label %40
+
+; <label>:14:
+  br i1 false, label %.preheader, label %.loopexit145
+
+.loopexit145:
+  br label %15
+
+; <label>:15:
+  %16 = phi i32 [ %7, %.loopexit145 ], [ %22, %.loopexit ]
+  %17 = add nsw i32 %16, -3
+  %18 = mul i32 %16, 21
+  br i1 undef, label %19, label %.loopexit
+
+; <label>:19:
+  %20 = mul i32 %17, 224
+  %21 = add i32 undef, %20
+  br label %23
+
+.loopexit:
+  %22 = add nuw nsw i32 %16, 16
+  br i1 undef, label %15, label %28
+
+; <label>:23:
+  %24 = phi i32 [ %6, %19 ], [ %27, %23 ]
+  %25 = add i32 %24, %18
+  %26 = getelementptr inbounds float, float addrspace(3)* %12, i32 %25
+  store float undef, float addrspace(3)* %26, align 4
+  %27 = add nuw i32 %24, 8
+  br i1 undef, label %23, label %.loopexit
+
+; <label>:28:
+  br label %33
+
+.preheader:
+  %29 = phi i32 [ %30, %.preheader ], [ undef, %14 ]
+  %30 = add nuw i32 %29, 128
+  %31 = icmp ult i32 %30, 1568
+  br i1 %31, label %.preheader, label %.loopexit145
+
+; <label>:32:
+  br i1 undef, label %13, label %14
+
+; <label>:33:
+  %34 = phi i32 [ %11, %28 ], [ undef, %33 ]
+  %35 = getelementptr inbounds [462 x float], [462 x float] addrspace(3)* @0, i32 0, i32 %34
+  %36 = load float, float addrspace(3)* %35, align 4
+  %37 = tail call float @llvm.fmuladd.f32(float %36, float undef, float undef)
+  %38 = tail call float @llvm.fmuladd.f32(float undef, float undef, float %37)
+  br i1 undef, label %32, label %33
+
+; <label>:39:
+  br label %40
+
+; <label>:40:
+  ret void
+}