Index: include/llvm/MC/MCParser/MCTargetAsmParser.h =================================================================== --- include/llvm/MC/MCParser/MCTargetAsmParser.h +++ include/llvm/MC/MCParser/MCTargetAsmParser.h @@ -221,7 +221,10 @@ /// end-of-statement token and false is returned. /// /// \param DirectiveID - the identifier token of the directive. - virtual bool ParseDirective(AsmToken DirectiveID) = 0; + // \param Operands [out] - The list of parsed operands, this returns + // ownership of them to the caller. + virtual bool ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) = 0; /// MatchAndEmitInstruction - Recognize a series of operands of a parsed /// instruction as an actual MCInst and emit it to the specified MCStreamer. Index: lib/MC/MCParser/AsmParser.cpp =================================================================== --- lib/MC/MCParser/AsmParser.cpp +++ lib/MC/MCParser/AsmParser.cpp @@ -1857,7 +1857,8 @@ getTargetParser().flushPendingInstructions(getStreamer()); SMLoc StartTokLoc = getTok().getLoc(); - bool TPDirectiveReturn = getTargetParser().ParseDirective(ID); + bool TPDirectiveReturn = + getTargetParser().ParseDirective(ID, Info.ParsedOperands); if (hasPendingError()) return true; Index: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp =================================================================== --- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -153,7 +153,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override; @@ -3848,7 +3848,8 @@ } /// ParseDirective parses the arm specific directives -bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID) { +bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { const MCObjectFileInfo::Environment Format = getContext().getObjectFileInfo()->getObjectFileType(); bool IsMachO = Format == MCObjectFileInfo::IsMachO; Index: lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp =================================================================== --- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -953,7 +953,7 @@ OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Mnemonic); StringRef parseMnemonicSuffix(StringRef Name); bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, @@ -2493,7 +2493,8 @@ return false; } -bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) { +bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { StringRef IDVal = DirectiveID.getString(); if (IDVal == ".hsa_code_object_version") Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp =================================================================== --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -597,7 +597,7 @@ bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override; @@ -9161,7 +9161,8 @@ } /// parseDirective parses the arm specific directives -bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) { +bool ARMAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { const MCObjectFileInfo::Environment Format = getContext().getObjectFileInfo()->getObjectFileType(); bool IsMachO = Format == MCObjectFileInfo::IsMachO; Index: lib/Target/BPF/AsmParser/BPFAsmParser.cpp =================================================================== --- lib/Target/BPF/AsmParser/BPFAsmParser.cpp +++ lib/Target/BPF/AsmParser/BPFAsmParser.cpp @@ -40,7 +40,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; // "=" is used as assignment operator for assembly statment, so can't be used // for symbol assignment. @@ -463,7 +463,10 @@ return false; } -bool BPFAsmParser::ParseDirective(AsmToken DirectiveID) { return true; } +bool BPFAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { + return true; +} extern "C" void LLVMInitializeBPFAsmParser() { RegisterMCAsmParser X(getTheBPFTarget()); Index: lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp =================================================================== --- lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp +++ lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp @@ -184,7 +184,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, AsmToken ID, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; }; /// HexagonOperand - Instances of this class represent a parsed Hexagon machine @@ -616,7 +616,8 @@ } /// ParseDirective parses the Hexagon specific directives -bool HexagonAsmParser::ParseDirective(AsmToken DirectiveID) { +bool HexagonAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { StringRef IDVal = DirectiveID.getIdentifier(); if ((IDVal.lower() == ".word") || (IDVal.lower() == ".4byte")) return ParseDirectiveValue(4, DirectiveID.getLoc()); Index: lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp =================================================================== --- lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp +++ lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp @@ -61,7 +61,7 @@ bool parsePrePost(StringRef Type, int *OffsetValue); - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; @@ -644,7 +644,10 @@ } // end anonymous namespace -bool LanaiAsmParser::ParseDirective(AsmToken /*DirectiveId*/) { return true; } +bool LanaiAsmParser::ParseDirective(AsmToken /*DirectiveId*/, + OperandVector &Operands) { + return true; +} bool LanaiAsmParser::MatchAndEmitInstruction(SMLoc IdLoc, unsigned &Opcode, OperandVector &Operands, Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -175,7 +175,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; OperandMatchResultTy parseMemOperand(OperandVector &Operands); OperandMatchResultTy @@ -7418,7 +7418,8 @@ return false; } -bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) { +bool MipsAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { // This returns false if this function recognizes the directive // regardless of whether it is successfully handles or reports an // error. Otherwise it returns true to give the generic parser a Index: lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp =================================================================== --- lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -311,7 +311,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override; @@ -1747,7 +1747,8 @@ } /// ParseDirective parses the PPC specific directives -bool PPCAsmParser::ParseDirective(AsmToken DirectiveID) { +bool PPCAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { StringRef IDVal = DirectiveID.getIdentifier(); if (isDarwin()) { if (IDVal == ".machine") Index: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp =================================================================== --- lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp +++ lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp @@ -44,7 +44,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; // Auto-generated instruction matching functions #define GET_ASSEMBLER_HEADER @@ -498,7 +498,10 @@ return false; } -bool RISCVAsmParser::ParseDirective(AsmToken DirectiveID) { return true; } +bool RISCVAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { + return true; +} extern "C" void LLVMInitializeRISCVAsmParser() { RegisterMCAsmParser X(getTheRISCV32Target()); Index: lib/Target/Sparc/AsmParser/SparcAsmParser.cpp =================================================================== --- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp +++ lib/Target/Sparc/AsmParser/SparcAsmParser.cpp @@ -70,7 +70,7 @@ bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override; @@ -678,7 +678,7 @@ } bool SparcAsmParser:: -ParseDirective(AsmToken DirectiveID) +ParseDirective(AsmToken DirectiveID, OperandVector &Operands) { StringRef IDVal = DirectiveID.getString(); Index: lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp =================================================================== --- lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -436,7 +436,7 @@ } // Override MCTargetAsmParser. - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; @@ -948,7 +948,8 @@ return MatchOperand_Success; } -bool SystemZAsmParser::ParseDirective(AsmToken DirectiveID) { +bool SystemZAsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { StringRef IDVal = DirectiveID.getIdentifier(); if (IDVal == ".insn") Index: lib/Target/X86/AsmParser/X86AsmParser.cpp =================================================================== --- lib/Target/X86/AsmParser/X86AsmParser.cpp +++ lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -931,7 +931,7 @@ bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) override; - bool ParseDirective(AsmToken DirectiveID) override; + bool ParseDirective(AsmToken DirectiveID, OperandVector &Operands) override; }; } // end anonymous namespace @@ -2962,7 +2962,8 @@ return X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(RegNo); } -bool X86AsmParser::ParseDirective(AsmToken DirectiveID) { +bool X86AsmParser::ParseDirective(AsmToken DirectiveID, + OperandVector &Operands) { MCAsmParser &Parser = getParser(); StringRef IDVal = DirectiveID.getIdentifier(); if (IDVal == ".word")