Index: lib/Target/AMDGPU/SIInsertSkips.cpp
===================================================================
--- lib/Target/AMDGPU/SIInsertSkips.cpp
+++ lib/Target/AMDGPU/SIInsertSkips.cpp
@@ -132,6 +132,16 @@
           I->getOpcode() == AMDGPU::S_CBRANCH_VCCZ)
         return true;
 
+      // Since V_READFIRSTLANE and V_READLANE produce
+      // scalar result there must be the scalar instruction
+      // that consumes it. Thus this scalar instructions may
+      // not be executed when exec mask is zero.
+      if ((I->getOpcode() == AMDGPU::V_READFIRSTLANE_B32) ||
+        (I->getOpcode() == AMDGPU::V_READLANE_B32))
+      {
+        return true;
+      }
+
       if (I->isInlineAsm()) {
         const MCAsmInfo *MAI = MF->getTarget().getMCAsmInfo();
         const char *AsmStr = I->getOperand(0).getSymbolName();