Index: include/llvm/Support/ELF.h
===================================================================
--- include/llvm/Support/ELF.h
+++ include/llvm/Support/ELF.h
@@ -881,6 +881,8 @@
   R_MIPS_TLS_TPREL_HI16    = 49,
   R_MIPS_TLS_TPREL_LO16    = 50,
   R_MIPS_GLOB_DAT          = 51,
+  R_MIPS_PC21_S2           = 60,
+  R_MIPS_PC26_S2           = 61,
   R_MIPS16_GOT16           = 102,
   R_MIPS16_HI16            = 104,
   R_MIPS16_LO16            = 105,
Index: lib/Object/ELF.cpp
===================================================================
--- lib/Object/ELF.cpp
+++ lib/Object/ELF.cpp
@@ -159,6 +159,8 @@
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_TLS_TPREL_HI16);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_TLS_TPREL_LO16);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_GLOB_DAT);
+      LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_PC21_S2);
+      LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_PC26_S2);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_COPY);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MIPS_JUMP_SLOT);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_MICROMIPS_26_S1);
Index: lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -102,6 +102,22 @@
     if (!isIntN(16, Value) && Ctx)
       Ctx->FatalError(Fixup.getLoc(), "out of range PC16 fixup");
     break;
+  case Mips::fixup_MIPS_PC21_S2:
+    Value -= 4;
+    // Forcing a signed division because Value can be negative.
+    Value = (int64_t) Value / 4;
+    // We now check if Value can be encoded as a 21-bit signed immediate.
+    if (!isIntN(21, Value) && Ctx)
+      Ctx->FatalError(Fixup.getLoc(), "out of range PC21 fixup");
+    break;
+  case Mips::fixup_MIPS_PC26_S2:
+    Value -= 4;
+    // Forcing a signed division because Value can be negative.
+    Value = (int64_t) Value / 4;
+    // We now check if Value can be encoded as a 26-bit signed immediate.
+    if (!isIntN(26, Value) && Ctx)
+      Ctx->FatalError(Fixup.getLoc(), "out of range PC26 fixup");
+    break;
   }
 
   return Value;
@@ -229,6 +245,8 @@
     { "fixup_Mips_GOT_LO16",     0,     16,   0 },
     { "fixup_Mips_CALL_HI16",    0,     16,   0 },
     { "fixup_Mips_CALL_LO16",    0,     16,   0 },
+    { "fixup_MIPS_PC21_S2",      0,     21,  MCFixupKindInfo::FKF_IsPCRel },
+    { "fixup_MIPS_PC26_S2",      0,     26,  MCFixupKindInfo::FKF_IsPCRel },
     { "fixup_MICROMIPS_26_S1",   0,     26,   0 },
     { "fixup_MICROMIPS_HI16",    0,     16,   0 },
     { "fixup_MICROMIPS_LO16",    0,     16,   0 },
Index: lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
+++ lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
@@ -193,6 +193,12 @@
   case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
     Type = ELF::R_MICROMIPS_TLS_TPREL_LO16;
     break;
+  case Mips::fixup_MIPS_PC21_S2:
+    Type = ELF::R_MIPS_PC21_S2;
+    break;
+  case Mips::fixup_MIPS_PC26_S2:
+    Type = ELF::R_MIPS_PC26_S2;
+    break;
   }
   return Type;
 }
Index: lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
+++ lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
@@ -128,6 +128,12 @@
     // resulting in - R_MIPS_CALL_LO16
     fixup_Mips_CALL_LO16,
 
+    // resulting in - R_MIPS_PC21_S2
+    fixup_MIPS_PC21_S2,
+
+    // resulting in - R_MIPS_PC26_S2
+    fixup_MIPS_PC26_S2,
+
     // resulting in - R_MICROMIPS_26_S1
     fixup_MICROMIPS_26_S1,
 
Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -258,7 +258,9 @@
   assert(MO.isExpr() &&
          "getBranchTarget21OpValue expects only expressions or immediates");
 
-  // TODO: Push 21 PC fixup.
+  const MCExpr *Expr = MO.getExpr();
+  Fixups.push_back(MCFixup::Create(0, Expr,
+                                   MCFixupKind(Mips::fixup_MIPS_PC21_S2)));
   return 0;
 }
 
@@ -278,7 +280,9 @@
   assert(MO.isExpr() &&
          "getBranchTarget26OpValue expects only expressions or immediates");
 
-  // TODO: Push 26 PC fixup.
+  const MCExpr *Expr = MO.getExpr();
+  Fixups.push_back(MCFixup::Create(0, Expr,
+                                   MCFixupKind(Mips::fixup_MIPS_PC26_S2)));
   return 0;
 }
 
Index: test/MC/Mips/mips32r6/reloc-pc16.s
===================================================================
--- /dev/null
+++ test/MC/Mips/mips32r6/reloc-pc16.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
+# RUN:   | FileCheck %s -check-prefix=CHECK-FIXUP
+# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips32r6 \
+# RUN:   | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
+#------------------------------------------------------------------------------
+# Check that the assembler can handle the documented syntax for fixups.
+#------------------------------------------------------------------------------
+# CHECK-FIXUP:   beqc $5, $6, bar # encoding: [0x20'A',0xa6'A',0x00,0x00]
+# CHECK-FIXUP:                    #   fixup A - offset: 0,
+# CHECK-FIXUP:                        value: bar, kind: fixup_Mips_PC16
+# CHECK-FIXUP:   bnec $5, $6, bar # encoding: [0x60'A',0xa6'A',0x00,0x00]
+# CHECK-FIXUP:                    #   fixup A - offset: 0,
+# CHECK-FIXUP:                        value: bar, kind: fixup_Mips_PC16
+#------------------------------------------------------------------------------
+# Check that the appropriate relocations were created.
+#------------------------------------------------------------------------------
+# CHECK-ELF: Relocations [
+# CHECK-ELF:     0x0 R_MIPS_PC16 bar 0x0
+# CHECK-ELF:     0x4 R_MIPS_PC16 bar 0x0
+# CHECK-ELF: ]
+
+  beqc $5, $6, bar
+  bnec $5, $6, bar
Index: test/MC/Mips/mips32r6/reloc-pc21.s
===================================================================
--- /dev/null
+++ test/MC/Mips/mips32r6/reloc-pc21.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
+# RUN:   | FileCheck %s -check-prefix=CHECK-FIXUP
+# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips32r6 \
+# RUN:   | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
+#------------------------------------------------------------------------------
+# Check that the assembler can handle the documented syntax for fixups.
+#------------------------------------------------------------------------------
+# CHECK-FIXUP:   beqzc $9, bar # encoding: [0xd9'A',0x20'A',0bAAAAA000,0x00]
+# CHECK-FIXUP:                 #   fixup A - offset: 0,
+# CHECK-FIXUP:                     value: bar, kind: fixup_MIPS_PC21_S2
+# CHECK-FIXUP:   bnezc $9, bar # encoding: [0xf9'A',0x20'A',0bAAAAA000,0x00]
+# CHECK-FIXUP:                 #   fixup A - offset: 0,
+# CHECK-FIXUP:                     value: bar, kind: fixup_MIPS_PC21_S2
+#------------------------------------------------------------------------------
+# Check that the appropriate relocations were created.
+#------------------------------------------------------------------------------
+# CHECK-ELF: Relocations [
+# CHECK-ELF:     0x0 R_MIPS_PC21_S2 bar 0x0
+# CHECK-ELF:     0x4 R_MIPS_PC21_S2 bar 0x0
+# CHECK-ELF: ]
+
+  beqzc $9, bar
+  bnezc $9, bar
Index: test/MC/Mips/mips32r6/reloc-pc26.s
===================================================================
--- /dev/null
+++ test/MC/Mips/mips32r6/reloc-pc26.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
+# RUN:   | FileCheck %s -check-prefix=CHECK-FIXUP
+# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips32r6 \
+# RUN:   | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
+#------------------------------------------------------------------------------
+# Check that the assembler can handle the documented syntax for fixups.
+#------------------------------------------------------------------------------
+# CHECK-FIXUP:   balc  bar # encoding: [0xe8'A',A,A,0bAA000000]
+# CHECK-FIXUP:             #   fixup A - offset: 0,
+# CHECK-FIXUP:                 value: bar, kind: fixup_MIPS_PC26_S2
+# CHECK-FIXUP:   bc    bar # encoding: [0xc8'A',A,A,0bAA000000]
+# CHECK-FIXUP:             #   fixup A - offset: 0,
+# CHECK-FIXUP:                 value: bar, kind: fixup_MIPS_PC26_S2
+#------------------------------------------------------------------------------
+# Check that the appropriate relocations were created.
+#------------------------------------------------------------------------------
+# CHECK-ELF: Relocations [
+# CHECK-ELF:     0x0 R_MIPS_PC26_S2 bar 0x0
+# CHECK-ELF:     0x4 R_MIPS_PC26_S2 bar 0x0
+# CHECK-ELF: ]
+
+  balc  bar
+  bc    bar
Index: test/MC/Mips/mips64r6/reloc-pc16.s
===================================================================
--- /dev/null
+++ test/MC/Mips/mips64r6/reloc-pc16.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 \
+# RUN:   | FileCheck %s -check-prefix=CHECK-FIXUP
+# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips64r6 \
+# RUN:   | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
+#------------------------------------------------------------------------------
+# Check that the assembler can handle the documented syntax for fixups.
+#------------------------------------------------------------------------------
+# CHECK-FIXUP:   beqc $5, $6, bar # encoding: [0x20'A',0xa6'A',0x00,0x00]
+# CHECK-FIXUP:                    #   fixup A - offset: 0,
+# CHECK-FIXUP:                        value: bar, kind: fixup_Mips_PC16
+# CHECK-FIXUP:   bnec $5, $6, bar # encoding: [0x60'A',0xa6'A',0x00,0x00]
+# CHECK-FIXUP:                    #   fixup A - offset: 0,
+# CHECK-FIXUP:                        value: bar, kind: fixup_Mips_PC16
+#------------------------------------------------------------------------------
+# Check that the appropriate relocations were created.
+#------------------------------------------------------------------------------
+# CHECK-ELF: Relocations [
+# CHECK-ELF:     0x0 R_MIPS_PC16 bar 0x0
+# CHECK-ELF:     0x4 R_MIPS_PC16 bar 0x0
+# CHECK-ELF: ]
+
+  beqc $5, $6, bar
+  bnec $5, $6, bar
Index: test/MC/Mips/mips64r6/reloc-pc21.s
===================================================================
--- /dev/null
+++ test/MC/Mips/mips64r6/reloc-pc21.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 \
+# RUN:   | FileCheck %s -check-prefix=CHECK-FIXUP
+# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips64r6 \
+# RUN:   | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
+#------------------------------------------------------------------------------
+# Check that the assembler can handle the documented syntax for fixups.
+#------------------------------------------------------------------------------
+# CHECK-FIXUP:   beqzc $9, bar # encoding: [0xd9'A',0x20'A',0bAAAAA000,0x00]
+# CHECK-FIXUP:                 #   fixup A - offset: 0,
+# CHECK-FIXUP:                     value: bar, kind: fixup_MIPS_PC21_S2
+# CHECK-FIXUP:   bnezc $9, bar # encoding: [0xf9'A',0x20'A',0bAAAAA000,0x00]
+# CHECK-FIXUP:                 #   fixup A - offset: 0,
+# CHECK-FIXUP:                     value: bar, kind: fixup_MIPS_PC21_S2
+#------------------------------------------------------------------------------
+# Check that the appropriate relocations were created.
+#------------------------------------------------------------------------------
+# CHECK-ELF: Relocations [
+# CHECK-ELF:     0x0 R_MIPS_PC21_S2 bar 0x0
+# CHECK-ELF:     0x4 R_MIPS_PC21_S2 bar 0x0
+# CHECK-ELF: ]
+
+  beqzc $9, bar
+  bnezc $9, bar
Index: test/MC/Mips/mips64r6/reloc-pc26.s
===================================================================
--- /dev/null
+++ test/MC/Mips/mips64r6/reloc-pc26.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 \
+# RUN:   | FileCheck %s -check-prefix=CHECK-FIXUP
+# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips64r6 \
+# RUN:   | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
+#------------------------------------------------------------------------------
+# Check that the assembler can handle the documented syntax for fixups.
+#------------------------------------------------------------------------------
+# CHECK-FIXUP:   balc  bar # encoding: [0xe8'A',A,A,0bAA000000]
+# CHECK-FIXUP:             #   fixup A - offset: 0,
+# CHECK-FIXUP:                 value: bar, kind: fixup_MIPS_PC26_S2
+# CHECK-FIXUP:   bc    bar # encoding: [0xc8'A',A,A,0bAA000000]
+# CHECK-FIXUP:             #   fixup A - offset: 0,
+# CHECK-FIXUP:                 value: bar, kind: fixup_MIPS_PC26_S2
+#------------------------------------------------------------------------------
+# Check that the appropriate relocations were created.
+#------------------------------------------------------------------------------
+# CHECK-ELF: Relocations [
+# CHECK-ELF:     0x0 R_MIPS_PC26_S2 bar 0x0
+# CHECK-ELF:     0x4 R_MIPS_PC26_S2 bar 0x0
+# CHECK-ELF: ]
+
+  balc  bar
+  bc    bar