Index: lib/Target/AMDGPU/VOP3PInstructions.td =================================================================== --- lib/Target/AMDGPU/VOP3PInstructions.td +++ lib/Target/AMDGPU/VOP3PInstructions.td @@ -67,9 +67,9 @@ // Size of src arguments (16/32) is controlled by op_sel. // For 16-bit src arguments their location (hi/lo) are controlled by op_sel_hi. let isCommutable = 1 in { -def V_MAD_MIX_F32 : VOP3_VOP3PInst<"v_mad_mix_f32", VOP3_Profile>; -def V_MAD_MIXLO_F16 : VOP3_VOP3PInst<"v_mad_mixlo_f16", VOP3_Profile>; -def V_MAD_MIXHI_F16 : VOP3_VOP3PInst<"v_mad_mixhi_f16", VOP3_Profile>; +def V_MAD_MIX_F32 : VOP3_VOP3PInst<"v_mad_mix_f32", VOP3_Profile>; +def V_MAD_MIXLO_F16 : VOP3_VOP3PInst<"v_mad_mixlo_f16", VOP3_Profile>; +def V_MAD_MIXHI_F16 : VOP3_VOP3PInst<"v_mad_mixhi_f16", VOP3_Profile>; } multiclass VOP3P_Real_vi op> { Index: test/CodeGen/AMDGPU/mad-mix.ll =================================================================== --- test/CodeGen/AMDGPU/mad-mix.ll +++ test/CodeGen/AMDGPU/mad-mix.ll @@ -1,9 +1,9 @@ -; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -show-mc-encoding < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CIVI,VI %s ; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CIVI,CI %s ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_f16lo: -; GFX9: v_mad_mix_f32 v0, v0, v1, v2{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 ; encoding: [0x00,0x40,0xa0,0xd3,0x00,0x03,0x0a,0x1c] ; VI: v_mac_f32 ; CI: v_mad_f32 define float @v_mad_mix_f32_f16lo_f16lo_f16lo(half %src0, half %src1, half %src2) #0 { @@ -15,7 +15,7 @@ } ; GCN-LABEL: {{^}}v_mad_mix_f32_f16hi_f16hi_f16hi_int: -; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1]{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] ; encoding ; CIVI: v_mac_f32 define float @v_mad_mix_f32_f16hi_f16hi_f16hi_int(i32 %src0, i32 %src1, i32 %src2) #0 { %src0.hi = lshr i32 %src0, 16 @@ -35,7 +35,7 @@ } ; GCN-LABEL: {{^}}v_mad_mix_f32_f16hi_f16hi_f16hi_elt: -; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1]{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] ; encoding ; VI: v_mac_f32 ; CI: v_mad_f32 define float @v_mad_mix_f32_f16hi_f16hi_f16hi_elt(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 { @@ -84,7 +84,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_negf16lo_f16lo_f16lo: ; GFX9: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, -v0, v1, v2{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, -v0, v1, v2 ; encoding ; GFX9-NEXT: s_setpc_b64 ; CIVI: v_mad_f32 @@ -128,7 +128,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_f32: ; GCN: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] ; encoding ; GFX9-NEXT: s_setpc_b64 ; CIVI: v_mad_f32 @@ -141,7 +141,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_negf32: ; GCN: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0] ; encoding ; GFX9-NEXT: s_setpc_b64 ; CIVI: v_mad_f32 @@ -155,7 +155,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_absf32: ; GCN: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, |v2| op_sel_hi:[1,1,0]{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, |v2| op_sel_hi:[1,1,0] ; encoding ; GFX9-NEXT: s_setpc_b64 ; CIVI: v_mad_f32 @@ -169,7 +169,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_negabsf32: ; GCN: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, -|v2| op_sel_hi:[1,1,0]{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, -|v2| op_sel_hi:[1,1,0] ; encoding ; GFX9-NEXT: s_setpc_b64 ; CIVI: v_mad_f32 @@ -189,7 +189,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_f32imm1: ; GCN: s_waitcnt ; GFX9: v_mov_b32_e32 v2, 1.0 -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] ; encoding ; CIVI: v_mad_f32 v0, v0, v1, 1.0 ; GCN-NEXT: s_setpc_b64 @@ -203,7 +203,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_f32imminv2pi: ; GCN: s_waitcnt ; GFX9: v_mov_b32_e32 v2, 0.15915494 -; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] ; encoding ; VI: v_mad_f32 v0, v0, v1, 0.15915494 define float @v_mad_mix_f32_f16lo_f16lo_f32imminv2pi(half %src0, half %src1) #0 { %src0.ext = fpext half %src0 to float @@ -219,7 +219,7 @@ ; f32 1/2pi = 0x3e22f983 ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi: ; GFX9: v_mov_b32_e32 v2, 0x3e230000 -; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] ; encoding ; CIVI: v_madak_f32 v0, v0, v1, 0x3e230000 define float @v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi(half %src0, half %src1) #0 { @@ -232,7 +232,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_cvtf16imm63: ; GFX9: v_mov_b32_e32 v2, 0x367c0000 -; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] ; encoding ; CIVI: v_madak_f32 v0, v0, v1, 0x367c0000 define float @v_mad_mix_f32_f16lo_f16lo_cvtf16imm63(half %src0, half %src1) #0 { @@ -246,8 +246,8 @@ ; GCN-LABEL: {{^}}v_mad_mix_v2f32_f32imm1: ; GFX9: v_mov_b32_e32 v2, v1 ; GFX9: v_mov_b32_e32 v3, 1.0 -; GFX9: v_mad_mix_f32 v1, v0, v2, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]{{$}} -; GFX9: v_mad_mix_f32 v0, v0, v2, v3 op_sel_hi:[1,1,0]{{$}} +; GFX9: v_mad_mix_f32 v1, v0, v2, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0] ; encoding +; GFX9: v_mad_mix_f32 v0, v0, v2, v3 op_sel_hi:[1,1,0] ; encoding define <2 x float> @v_mad_mix_v2f32_f32imm1(<2 x half> %src0, <2 x half> %src1) #0 { %src0.ext = fpext <2 x half> %src0 to <2 x float> %src1.ext = fpext <2 x half> %src1 to <2 x float> @@ -258,8 +258,8 @@ ; GCN-LABEL: {{^}}v_mad_mix_v2f32_cvtf16imminv2pi: ; GFX9: v_mov_b32_e32 v2, v1 ; GFX9: v_mov_b32_e32 v3, 0x3e230000 -; GFX9: v_mad_mix_f32 v1, v0, v2, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]{{$}} -; GFX9: v_mad_mix_f32 v0, v0, v2, v3 op_sel_hi:[1,1,0]{{$}} +; GFX9: v_mad_mix_f32 v1, v0, v2, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0] ; encoding +; GFX9: v_mad_mix_f32 v0, v0, v2, v3 op_sel_hi:[1,1,0] ; encoding define <2 x float> @v_mad_mix_v2f32_cvtf16imminv2pi(<2 x half> %src0, <2 x half> %src1) #0 { %src0.ext = fpext <2 x half> %src0 to <2 x float> %src1.ext = fpext <2 x half> %src1 to <2 x float> @@ -271,8 +271,8 @@ ; GCN-LABEL: {{^}}v_mad_mix_v2f32_f32imminv2pi: ; GFX9: v_mov_b32_e32 v2, v1 ; GFX9: v_mov_b32_e32 v3, 0.15915494 -; GFX9: v_mad_mix_f32 v1, v0, v2, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]{{$}} -; GFX9: v_mad_mix_f32 v0, v0, v2, v3 op_sel_hi:[1,1,0]{{$}} +; GFX9: v_mad_mix_f32 v1, v0, v2, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0] ; encoding +; GFX9: v_mad_mix_f32 v0, v0, v2, v3 op_sel_hi:[1,1,0] ; encoding define <2 x float> @v_mad_mix_v2f32_f32imminv2pi(<2 x half> %src0, <2 x half> %src1) #0 { %src0.ext = fpext <2 x half> %src0 to <2 x float> %src1.ext = fpext <2 x half> %src1 to <2 x float> @@ -282,7 +282,7 @@ } ; GCN-LABEL: {{^}}v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt: -; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] clamp{{$}} +; GFX9: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] clamp ; encoding ; VI: v_mac_f32_e64 v{{[0-9]}}, v{{[0-9]}}, v{{[0-9]}} clamp{{$}} ; CI: v_mad_f32 v{{[0-9]}}, v{{[0-9]}}, v{{[0-9]}}, v{{[0-9]}} clamp{{$}} define float @v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 { @@ -300,7 +300,7 @@ ; GCN-LABEL: no_mix_simple: ; GCN: s_waitcnt -; GCN-NEXT: v_mad_f32 v0, v0, v1, v2{{$}} +; GCN-NEXT: v_mad_f32 v0, v0, v1, v2 ; GCN-NEXT: s_setpc_b64 define float @no_mix_simple(float %src0, float %src1, float %src2) #0 { %result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2) @@ -309,7 +309,7 @@ ; GCN-LABEL: no_mix_simple_fabs: ; GCN: s_waitcnt -; GCN-NEXT: v_mad_f32 v0, |v0|, v1, v2{{$}} +; GCN-NEXT: v_mad_f32 v0, |v0|, v1, v2 ; GCN-NEXT: s_setpc_b64 define float @no_mix_simple_fabs(float %src0, float %src1, float %src2) #0 { %src0.fabs = call float @llvm.fabs.f32(float %src0) @@ -375,7 +375,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd: ; GCN: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 ; encoding ; GFX9-NEXT: s_setpc_b64 define float @v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd(half %src0, half %src1, half %src2) #0 { %src0.ext = fpext half %src0 to float @@ -388,7 +388,7 @@ ; GCN-LABEL: {{^}}v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd: ; GCN: s_waitcnt -; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} +; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] ; encoding ; GFX9-NEXT: s_setpc_b64 define float @v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd(half %src0, half %src1, float %src2) #0 { %src0.ext = fpext half %src0 to float