Index: lib/Target/SystemZ/SystemZSubtarget.h =================================================================== --- lib/Target/SystemZ/SystemZSubtarget.h +++ lib/Target/SystemZ/SystemZSubtarget.h @@ -91,6 +91,11 @@ return &TSInfo; } + // True if the subtarget should run MachineScheduler after aggressive + // coalescing. This currently replaces the SelectionDAG scheduler with the + // "source" order scheduler. + bool enableMachineScheduler() const override { return true; } + // This is important for reducing register pressure in vector code. bool useAA() const override { return true; } Index: test/CodeGen/SystemZ/alloca-01.ll =================================================================== --- test/CodeGen/SystemZ/alloca-01.ll +++ test/CodeGen/SystemZ/alloca-01.ll @@ -29,12 +29,12 @@ ; CHECK: lgr %r15, [[REG2]] ; ; CHECK-A-LABEL: f1: -; CHECK-A: lgr %r15, %r1 -; CHECK-A: la %r2, 176(%r1) +; CHECK-A-DAG: lgr %r15, %r1 +; CHECK-A-DAG: la %r2, 176(%r1) ; ; CHECK-B-LABEL: f1: ; CHECK-B: lgr %r15, %r1 -; CHECK-B: la %r3, 177(%r1) +; CHECK-B: la %r0, 177(%r1) ; ; CHECK-C-LABEL: f1: ; CHECK-C: lgr %r15, %r1 Index: test/CodeGen/SystemZ/alloca-02.ll =================================================================== --- test/CodeGen/SystemZ/alloca-02.ll +++ test/CodeGen/SystemZ/alloca-02.ll @@ -10,29 +10,29 @@ define i64 @f1(i64 %length, i64 %index) { ; CHECK-A-LABEL: f1: -; CHECK-A: lgr %r15, [[ADDR:%r[1-5]]] -; CHECK-A: la %r2, 160([[ADDR]]) +; CHECK-A-DAG: lgr %r15, [[ADDR:%r[1-5]]] +; CHECK-A-DAG: la %r2, 160([[ADDR]]) ; CHECK-A: mvi 0(%r2), 0 ; ; CHECK-B-LABEL: f1: -; CHECK-B: lgr %r15, [[ADDR:%r[1-5]]] -; CHECK-B: la %r2, 160([[ADDR]]) +; CHECK-B-DAG: lgr %r15, [[ADDR:%r[1-5]]] +; CHECK-B-DAG: la %r2, 160([[ADDR]]) ; CHECK-B: mvi 4095(%r2), 1 ; ; CHECK-C-LABEL: f1: -; CHECK-C: lgr %r15, [[ADDR:%r[1-5]]] +; CHECK-C-DAG: lgr %r15, [[ADDR:%r[1-5]]] ; CHECK-C-DAG: la %r2, 160([[ADDR]]) ; CHECK-C-DAG: lhi [[TMP:%r[0-5]]], 2 ; CHECK-C: stc [[TMP]], 0({{%r3,%r2|%r2,%r3}}) ; ; CHECK-D-LABEL: f1: -; CHECK-D: lgr %r15, [[ADDR:%r[1-5]]] +; CHECK-D-DAG: lgr %r15, [[ADDR:%r[1-5]]] ; CHECK-D-DAG: la %r2, 160([[ADDR]]) ; CHECK-D-DAG: lhi [[TMP:%r[0-5]]], 3 ; CHECK-D: stc [[TMP]], 4095({{%r3,%r2|%r2,%r3}}) ; ; CHECK-E-LABEL: f1: -; CHECK-E: lgr %r15, [[ADDR:%r[1-5]]] +; CHECK-E-DAG: lgr %r15, [[ADDR:%r[1-5]]] ; CHECK-E-DAG: la %r2, 160([[ADDR]]) ; CHECK-E-DAG: lhi [[TMP:%r[0-5]]], 4 ; CHECK-E: stcy [[TMP]], 4096({{%r3,%r2|%r2,%r3}}) Index: test/CodeGen/SystemZ/alloca-03.ll =================================================================== --- test/CodeGen/SystemZ/alloca-03.ll +++ test/CodeGen/SystemZ/alloca-03.ll @@ -15,13 +15,13 @@ ; Allocate %len * 8, no need to align stack. define void @f1(i64 %len) { ; CHECK-LABEL: f1: -; CHECK: sllg %r0, %r2, 3 -; CHECK: lgr %r1, %r15 +; CHECK-DAG: sllg %r0, %r2, 3 +; CHECK-DAG: lgr %r1, %r15 ; CHECK: sgr %r1, %r0 ; CHECK-NOT: ngr -; CHECK: lgr %r15, %r1 -; CHECK: la %r1, 160(%r1) -; CHECK: mvghi 0(%r1), 10 +; CHECK-DAG: lgr %r15, %r1 +; CHECK-DAG: la %r2, 160(%r1) +; CHECK: mvghi 0(%r2), 10 %x = alloca i64, i64 %len store volatile i64 10, i64* %x ret void @@ -31,10 +31,10 @@ define void @f2() { ; CHECK-LABEL: f2: ; CHECK: aghi %r1, -128 -; CHECK: lgr %r15, %r1 -; CHECK: la %r1, 280(%r1) -; CHECK: nill %r1, 65408 -; CHECK: mvghi 0(%r1), 10 +; CHECK-DAG: lgr %r15, %r1 +; CHECK-DAG: la %r2, 280(%r1) +; CHECK-DAG: nill %r2, 65408 +; CHECK: mvghi 0(%r2), 10 %x = alloca i64, i64 1, align 128 store volatile i64 10, i64* %x, align 128 ret void @@ -43,14 +43,14 @@ ; Dynamic alloca, align 128. define void @f3(i64 %len) { ; CHECK-LABEL: f3: -; CHECK: sllg %r1, %r2, 3 -; CHECK: la %r0, 120(%r1) -; CHECK: lgr %r1, %r15 +; CHECK-DAG: sllg %r2, %r2, 3 +; CHECK-DAG: la %r0, 120(%r2) +; CHECK-DAG: lgr %r1, %r15 ; CHECK: sgr %r1, %r0 +; CHECK: la %r2, 280(%r1) +; CHECK: nill %r2, 65408 ; CHECK: lgr %r15, %r1 -; CHECK: la %r1, 280(%r1) -; CHECK: nill %r1, 65408 -; CHECK: mvghi 0(%r1), 10 +; CHECK: mvghi 0(%r2), 10 %x = alloca i64, i64 %len, align 128 store volatile i64 10, i64* %x, align 128 ret void @@ -73,10 +73,10 @@ ; CHECK: lgr %r1, %r15 ; CHECK: aghi %r1, -128 +; CHECK: la %r2, 280(%r1) +; CHECK: nill %r2, 65408 ; CHECK: lgr %r15, %r1 -; CHECK: la %r1, 280(%r1) -; CHECK: nill %r1, 65408 -; CHECK: mvhi 0(%r1), 10 +; CHECK: mvhi 0(%r2), 10 %x = alloca i32, i64 1, align 128 store volatile i32 10, i32* %x ret void Index: test/CodeGen/SystemZ/args-06.ll =================================================================== --- test/CodeGen/SystemZ/args-06.ll +++ test/CodeGen/SystemZ/args-06.ll @@ -5,12 +5,12 @@ define i8 @f1(i8 %a, i8 %b, i8 %c, i8 %d, i8 %e, i8 %f, i8 %g) { ; CHECK-LABEL: f1: +; CHECK: lb {{%r[0-5]}}, 175(%r15) +; CHECK: lb {{%r[0-5]}}, 167(%r15) ; CHECK: ar %r2, %r3 ; CHECK: ar %r2, %r4 ; CHECK: ar %r2, %r5 ; CHECK: ar %r2, %r6 -; CHECK: lb {{%r[0-5]}}, 167(%r15) -; CHECK: lb {{%r[0-5]}}, 175(%r15) ; CHECK: br %r14 %addb = add i8 %a, %b %addc = add i8 %addb, %c Index: test/CodeGen/SystemZ/atomicrmw-add-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-add-01.ll +++ test/CodeGen/SystemZ/atomicrmw-add-01.ll @@ -15,8 +15,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg %r1, %r2, 0, 189, 0{{$}} -; CHECK: sll [[SHIFT:%r[0-9]+]], 3 -; CHECK: l [[OLD:%r[0-9]+]], 0(%r1) +; CHECK-DAG: sll [[SHIFT:%r[0-9]+]], 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0(%r1) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) ; CHECK: ar [[ROT]], %r3 @@ -49,8 +49,8 @@ define i8 @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0 -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: afi [[ROT]], -2147483648 Index: test/CodeGen/SystemZ/atomicrmw-add-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-add-02.ll +++ test/CodeGen/SystemZ/atomicrmw-add-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: ar [[ROT]], %r3 @@ -49,8 +49,8 @@ define i16 @f2(i16 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0 -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: afi [[ROT]], -2147483648 Index: test/CodeGen/SystemZ/atomicrmw-and-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-and-01.ll +++ test/CodeGen/SystemZ/atomicrmw-and-01.ll @@ -49,8 +49,8 @@ define i8 @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0 -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nilh [[ROT]], 33023 Index: test/CodeGen/SystemZ/atomicrmw-and-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-and-02.ll +++ test/CodeGen/SystemZ/atomicrmw-and-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nr [[ROT]], %r3 @@ -50,8 +50,8 @@ define i16 @f2(i16 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nilh [[ROT]], 32768 Index: test/CodeGen/SystemZ/atomicrmw-minmax-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-minmax-01.ll +++ test/CodeGen/SystemZ/atomicrmw-minmax-01.ll @@ -15,8 +15,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: crjle [[ROT]], %r3, [[KEEP:\..*]] @@ -51,8 +51,8 @@ define i8 @f2(i8 *%src, i8 %b) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: crjhe [[ROT]], %r3, [[KEEP:\..*]] @@ -87,8 +87,8 @@ define i8 @f3(i8 *%src, i8 %b) { ; CHECK-LABEL: f3: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]] @@ -123,8 +123,8 @@ define i8 @f4(i8 *%src, i8 %b) { ; CHECK-LABEL: f4: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]] Index: test/CodeGen/SystemZ/atomicrmw-minmax-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-minmax-02.ll +++ test/CodeGen/SystemZ/atomicrmw-minmax-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: crjle [[ROT]], %r3, [[KEEP:\..*]] @@ -51,8 +51,8 @@ define i16 @f2(i16 *%src, i16 %b) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: crjhe [[ROT]], %r3, [[KEEP:\..*]] @@ -87,8 +87,8 @@ define i16 @f3(i16 *%src, i16 %b) { ; CHECK-LABEL: f3: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]] @@ -123,8 +123,8 @@ define i16 @f4(i16 *%src, i16 %b) { ; CHECK-LABEL: f4: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]] Index: test/CodeGen/SystemZ/atomicrmw-minmax-04.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-minmax-04.ll +++ test/CodeGen/SystemZ/atomicrmw-minmax-04.ll @@ -133,8 +133,8 @@ ; Check that constants are handled. define i64 @f10(i64 %dummy, i64 *%ptr) { ; CHECK-LABEL: f10: -; CHECK: lghi [[LIMIT:%r[0-9]+]], 42 -; CHECK: lg %r2, 0(%r3) +; CHECK-DAG: lghi [[LIMIT:%r[0-9]+]], 42 +; CHECK-DAG: lg %r2, 0(%r3) ; CHECK: j [[LOOP:\.[^:]*]] ; CHECK: [[BB1:\.[^:]*]]: ; CHECK: csg %r2, [[NEW:%r[0-9]+]], 0(%r3) Index: test/CodeGen/SystemZ/atomicrmw-nand-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-nand-01.ll +++ test/CodeGen/SystemZ/atomicrmw-nand-01.ll @@ -15,8 +15,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nr [[ROT]], %r3 @@ -51,8 +51,8 @@ define i8 @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nilh [[ROT]], 33023 Index: test/CodeGen/SystemZ/atomicrmw-nand-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-nand-02.ll +++ test/CodeGen/SystemZ/atomicrmw-nand-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nr [[ROT]], %r3 @@ -51,8 +51,8 @@ define i16 @f2(i16 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: nilh [[ROT]], 32768 Index: test/CodeGen/SystemZ/atomicrmw-or-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-or-01.ll +++ test/CodeGen/SystemZ/atomicrmw-or-01.ll @@ -15,8 +15,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: or [[ROT]], %r3 @@ -49,8 +49,8 @@ define i8 @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: oilh [[ROT]], 32768 Index: test/CodeGen/SystemZ/atomicrmw-or-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-or-02.ll +++ test/CodeGen/SystemZ/atomicrmw-or-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: or [[ROT]], %r3 @@ -49,8 +49,8 @@ define i16 @f2(i16 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: oilh [[ROT]], 32768 Index: test/CodeGen/SystemZ/atomicrmw-sub-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-sub-01.ll +++ test/CodeGen/SystemZ/atomicrmw-sub-01.ll @@ -15,8 +15,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: sr [[ROT]], %r3 @@ -49,8 +49,8 @@ define i8 @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: afi [[ROT]], -2147483648 Index: test/CodeGen/SystemZ/atomicrmw-sub-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-sub-02.ll +++ test/CodeGen/SystemZ/atomicrmw-sub-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: sr [[ROT]], %r3 @@ -49,8 +49,8 @@ define i16 @f2(i16 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: afi [[ROT]], -2147483648 Index: test/CodeGen/SystemZ/atomicrmw-xchg-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-xchg-01.ll +++ test/CodeGen/SystemZ/atomicrmw-xchg-01.ll @@ -13,8 +13,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: risbg [[ROT]], %r3, 32, 39, 24 Index: test/CodeGen/SystemZ/atomicrmw-xchg-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-xchg-02.ll +++ test/CodeGen/SystemZ/atomicrmw-xchg-02.ll @@ -13,8 +13,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: risbg [[ROT]], %r3, 32, 47, 16 Index: test/CodeGen/SystemZ/atomicrmw-xchg-03.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-xchg-03.ll +++ test/CodeGen/SystemZ/atomicrmw-xchg-03.ll @@ -110,8 +110,8 @@ ; use the sequence above. define i32 @f10(i32 %dummy, i32 *%src) { ; CHECK-LABEL: f10: -; CHECK: llill [[VALUE:%r[0-9+]]], 40000 -; CHECK: l %r2, 0(%r3) +; CHECK-DAG: llill [[VALUE:%r[0-9+]]], 40000 +; CHECK-DAG: l %r2, 0(%r3) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: cs %r2, [[VALUE]], 0(%r3) ; CHECK: jl [[LABEL]] Index: test/CodeGen/SystemZ/atomicrmw-xchg-04.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-xchg-04.ll +++ test/CodeGen/SystemZ/atomicrmw-xchg-04.ll @@ -77,8 +77,8 @@ ; use the sequence above. define i64 @f7(i64 %dummy, i64 *%ptr) { ; CHECK-LABEL: f7: -; CHECK: llilf [[VALUE:%r[0-9+]]], 3000000000 -; CHECK: lg %r2, 0(%r3) +; CHECK-DAG: llilf [[VALUE:%r[0-9+]]], 3000000000 +; CHECK-DAG: lg %r2, 0(%r3) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: csg %r2, [[VALUE]], 0(%r3) ; CHECK: jl [[LABEL]] Index: test/CodeGen/SystemZ/atomicrmw-xor-01.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-xor-01.ll +++ test/CodeGen/SystemZ/atomicrmw-xor-01.ll @@ -15,8 +15,8 @@ define i8 @f1(i8 *%src, i8 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: xr [[ROT]], %r3 @@ -49,8 +49,8 @@ define i8 @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: xilf [[ROT]], 2147483648 Index: test/CodeGen/SystemZ/atomicrmw-xor-02.ll =================================================================== --- test/CodeGen/SystemZ/atomicrmw-xor-02.ll +++ test/CodeGen/SystemZ/atomicrmw-xor-02.ll @@ -15,8 +15,8 @@ define i16 @f1(i16 *%src, i16 %b) { ; CHECK-LABEL: f1: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: xr [[ROT]], %r3 @@ -49,8 +49,8 @@ define i16 @f2(i16 *%src) { ; CHECK-LABEL: f2: ; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}} -; CHECK: sll %r2, 3 -; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-DAG: sll %r2, 3 +; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK: [[LABEL:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2) ; CHECK: xilf [[ROT]], 2147483648 Index: test/CodeGen/SystemZ/backchain.ll =================================================================== --- test/CodeGen/SystemZ/backchain.ll +++ test/CodeGen/SystemZ/backchain.ll @@ -60,18 +60,18 @@ ; CHECK: aghi %r15, -160 ; CHECK: stg %r1, 0(%r15) ; CHECK: lgr %r11, %r15 -; CHECK: lgr [[SAVESP:%r[0-9]+]], %r15 -; CHECK: lg [[BC:%r[0-9]+]], 0(%r15) -; CHECK: lgr [[NEWSP:%r[0-9]+]], %r15 -; CHECK: lgr %r15, [[NEWSP]] -; CHECK: stg [[BC]], 0([[NEWSP]]) -; CHECK: lg [[BC2:%r[0-9]+]], 0(%r15) -; CHECK: lgr %r15, [[SAVESP]] -; CHECK: stg [[BC2]], 0([[SAVESP]]) -; CHECK: lg [[BC3:%r[0-9]+]], 0(%r15) -; CHECK: lgr [[NEWSP2:%r[0-9]+]], %r15 -; CHECK: lgr %r15, [[NEWSP2]] -; CHECK: stg [[BC3]], 0([[NEWSP2]]) +; CHECK-DAG: lgr [[SAVESP:%r[0-9]+]], %r15 +; CHECK-DAG: lg [[BC:%r[0-9]+]], 0(%r15) +; CHECK-DAG: lgr [[NEWSP:%r[0-9]+]], %r15 +; CHECK-DAG: lgr %r15, [[NEWSP]] +; CHECK-DAG: stg [[BC]], 0([[NEWSP]]) +; CHECK-DAG: lg [[BC2:%r[0-9]+]], 0(%r15) +; CHECK-DAG: lgr %r15, [[SAVESP]] +; CHECK-DAG: stg [[BC2]], 0([[SAVESP]]) +; CHECK-DAG: lg [[BC3:%r[0-9]+]], 0(%r15) +; CHECK-DAG: lgr [[NEWSP2:%r[0-9]+]], %r15 +; CHECK-DAG: lgr %r15, [[NEWSP2]] +; CHECK-DAG: stg [[BC3]], 0([[NEWSP2]]) ; CHECK: lmg %r11, %r15, 248(%r11) ; CHECK: br %r14 %src = call i8 *@llvm.stacksave() Index: test/CodeGen/SystemZ/call-03.ll =================================================================== --- test/CodeGen/SystemZ/call-03.ll +++ test/CodeGen/SystemZ/call-03.ll @@ -64,11 +64,12 @@ ; the target register is %r1. define void @f5(void(i32, i32, i32, i32) *%foo) { ; CHECK-LABEL: f5: -; CHECK: lgr %r1, %r2 +; CHECK: lgr %r0, %r2 ; CHECK-DAG: lhi %r2, 1 ; CHECK-DAG: lhi %r3, 2 ; CHECK-DAG: lhi %r4, 3 ; CHECK-DAG: lhi %r5, 4 +; CHECK: lgr %r1, %r0 ; CHECK: br %r1 tail call void %foo(i32 1, i32 2, i32 3, i32 4) ret void Index: test/CodeGen/SystemZ/cmpxchg-01.ll =================================================================== --- test/CodeGen/SystemZ/cmpxchg-01.ll +++ test/CodeGen/SystemZ/cmpxchg-01.ll @@ -13,8 +13,8 @@ define i8 @f1(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) { ; CHECK-MAIN-LABEL: f1: ; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}} -; CHECK-MAIN: sll %r3, 3 -; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-MAIN-DAG: sll %r3, 3 +; CHECK-MAIN-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK-MAIN: [[LOOP:\.[^ ]*]]: ; CHECK-MAIN: rll %r2, [[OLD]], 8(%r3) ; CHECK-MAIN: risbg %r4, %r2, 32, 55, 0 Index: test/CodeGen/SystemZ/cmpxchg-02.ll =================================================================== --- test/CodeGen/SystemZ/cmpxchg-02.ll +++ test/CodeGen/SystemZ/cmpxchg-02.ll @@ -13,8 +13,8 @@ define i16 @f1(i16 %dummy, i16 *%src, i16 %cmp, i16 %swap) { ; CHECK-MAIN-LABEL: f1: ; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}} -; CHECK-MAIN: sll %r3, 3 -; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0([[RISBG]]) +; CHECK-MAIN-DAG: sll %r3, 3 +; CHECK-MAIN-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]]) ; CHECK-MAIN: [[LOOP:\.[^ ]*]]: ; CHECK-MAIN: rll %r2, [[OLD]], 16(%r3) ; CHECK-MAIN: risbg %r4, %r2, 32, 47, 0 Index: test/CodeGen/SystemZ/cmpxchg-05.ll =================================================================== --- test/CodeGen/SystemZ/cmpxchg-05.ll +++ test/CodeGen/SystemZ/cmpxchg-05.ll @@ -68,8 +68,8 @@ ; Now use the comparison result and zero-extended old value. ; CHECK-LABEL: f6 ; CHECK: llcr [[REG:%r[0-9]+]], [[RES:%r[0-9]+]] -; CHECK: st [[REG]], 0(%r5) -; CHECK: cr [[REG]], %r3 +; CHECK-DAG: st [[REG]], 0(%r5) +; CHECK-DAG: cr [[REG]], %r3 define zeroext i8 @f6(i8* nocapture, i8 zeroext, i8 zeroext, i32*) { %cx = cmpxchg i8* %0, i8 %1, i8 %2 seq_cst seq_cst %old = extractvalue { i8, i1 } %cx, 0 Index: test/CodeGen/SystemZ/fp-add-03.ll =================================================================== --- test/CodeGen/SystemZ/fp-add-03.ll +++ test/CodeGen/SystemZ/fp-add-03.ll @@ -5,12 +5,12 @@ ; There is no memory form of 128-bit addition. define void @f1(fp128 *%ptr, float %f2) { ; CHECK-LABEL: f1: -; CHECK: lxebr %f0, %f0 -; CHECK: ld %f1, 0(%r2) -; CHECK: ld %f3, 8(%r2) -; CHECK: axbr %f1, %f0 -; CHECK: std %f1, 0(%r2) -; CHECK: std %f3, 8(%r2) +; CHECK-DAG: lxebr %f0, %f0 +; CHECK-DAG: ld %f1, 0(%r2) +; CHECK-DAG: ld %f3, 8(%r2) +; CHECK: axbr %f0, %f1 +; CHECK: std %f0, 0(%r2) +; CHECK: std %f2, 8(%r2) ; CHECK: br %r14 %f1 = load fp128 , fp128 *%ptr %f2x = fpext float %f2 to fp128 Index: test/CodeGen/SystemZ/fp-cmp-03.ll =================================================================== --- test/CodeGen/SystemZ/fp-cmp-03.ll +++ test/CodeGen/SystemZ/fp-cmp-03.ll @@ -6,9 +6,9 @@ ; There is no memory form of 128-bit comparison. define i64 @f1(i64 %a, i64 %b, fp128 *%ptr, float %f2) { ; CHECK-LABEL: f1: -; CHECK: lxebr %f0, %f0 -; CHECK: ld %f1, 0(%r4) -; CHECK: ld %f3, 8(%r4) +; CHECK-DAG: lxebr %f0, %f0 +; CHECK-DAG: ld %f1, 0(%r4) +; CHECK-DAG: ld %f3, 8(%r4) ; CHECK: cxbr %f1, %f0 ; CHECK-NEXT: ber %r14 ; CHECK: lgr %r2, %r3 Index: test/CodeGen/SystemZ/fp-cmp-04.ll =================================================================== --- test/CodeGen/SystemZ/fp-cmp-04.ll +++ test/CodeGen/SystemZ/fp-cmp-04.ll @@ -208,9 +208,9 @@ ; CHECK-LABEL: f11: ; CHECK: aebr %f0, %f2 ; CHECK-NEXT: sebr %f4, %f0 -; CHECK-NEXT: ste %f4, 0(%r2) -; CHECK-NEXT: ltebr %f0, %f0 -; CHECK-NEXT: ber %r14 +; CHECK-DAG: ste %f4, 0(%r2) +; CHECK-DAG: ltebr %f0, %f0 +; CHECK: ber %r14 ; CHECK: br %r14 entry: %add = fadd float %a, %b @@ -305,7 +305,8 @@ ; we need. define float @f15(float %val, float %dummy, float *%dest) { ; CHECK-LABEL: f15: -; CHECK: ltebr %f2, %f0 +; CHECK: ltebr %f0, %f0 +; CHECK-NEXT: ler %f2, %f0 ; CHECK-NEXT: #APP ; CHECK-NEXT: blah %f2 ; CHECK-NEXT: #NO_APP @@ -328,7 +329,8 @@ ; we need. define double @f16(double %val, double %dummy, double *%dest) { ; CHECK-LABEL: f16: -; CHECK: ltdbr %f2, %f0 +; CHECK: ltdbr %f0, %f0 +; CHECK-NEXT: ldr %f2, %f0 ; CHECK-NEXT: #APP ; CHECK-NEXT: blah %f2 ; CHECK-NEXT: #NO_APP Index: test/CodeGen/SystemZ/fp-conv-02.ll =================================================================== --- test/CodeGen/SystemZ/fp-conv-02.ll +++ test/CodeGen/SystemZ/fp-conv-02.ll @@ -72,83 +72,3 @@ ret double %res } -; Test a case where we spill the source of at least one LDEBR. We want -; to use LDEB if possible. -define void @f7(double *%ptr1, float *%ptr2) { -; CHECK-LABEL: f7: -; CHECK-SCALAR: ldeb {{%f[0-9]+}}, 16{{[04]}}(%r15) -; CHECK: br %r14 - %val0 = load volatile float , float *%ptr2 - %val1 = load volatile float , float *%ptr2 - %val2 = load volatile float , float *%ptr2 - %val3 = load volatile float , float *%ptr2 - %val4 = load volatile float , float *%ptr2 - %val5 = load volatile float , float *%ptr2 - %val6 = load volatile float , float *%ptr2 - %val7 = load volatile float , float *%ptr2 - %val8 = load volatile float , float *%ptr2 - %val9 = load volatile float , float *%ptr2 - %val10 = load volatile float , float *%ptr2 - %val11 = load volatile float , float *%ptr2 - %val12 = load volatile float , float *%ptr2 - %val13 = load volatile float , float *%ptr2 - %val14 = load volatile float , float *%ptr2 - %val15 = load volatile float , float *%ptr2 - %val16 = load volatile float , float *%ptr2 - - %ext0 = fpext float %val0 to double - %ext1 = fpext float %val1 to double - %ext2 = fpext float %val2 to double - %ext3 = fpext float %val3 to double - %ext4 = fpext float %val4 to double - %ext5 = fpext float %val5 to double - %ext6 = fpext float %val6 to double - %ext7 = fpext float %val7 to double - %ext8 = fpext float %val8 to double - %ext9 = fpext float %val9 to double - %ext10 = fpext float %val10 to double - %ext11 = fpext float %val11 to double - %ext12 = fpext float %val12 to double - %ext13 = fpext float %val13 to double - %ext14 = fpext float %val14 to double - %ext15 = fpext float %val15 to double - %ext16 = fpext float %val16 to double - - store volatile float %val0, float *%ptr2 - store volatile float %val1, float *%ptr2 - store volatile float %val2, float *%ptr2 - store volatile float %val3, float *%ptr2 - store volatile float %val4, float *%ptr2 - store volatile float %val5, float *%ptr2 - store volatile float %val6, float *%ptr2 - store volatile float %val7, float *%ptr2 - store volatile float %val8, float *%ptr2 - store volatile float %val9, float *%ptr2 - store volatile float %val10, float *%ptr2 - store volatile float %val11, float *%ptr2 - store volatile float %val12, float *%ptr2 - store volatile float %val13, float *%ptr2 - store volatile float %val14, float *%ptr2 - store volatile float %val15, float *%ptr2 - store volatile float %val16, float *%ptr2 - - store volatile double %ext0, double *%ptr1 - store volatile double %ext1, double *%ptr1 - store volatile double %ext2, double *%ptr1 - store volatile double %ext3, double *%ptr1 - store volatile double %ext4, double *%ptr1 - store volatile double %ext5, double *%ptr1 - store volatile double %ext6, double *%ptr1 - store volatile double %ext7, double *%ptr1 - store volatile double %ext8, double *%ptr1 - store volatile double %ext9, double *%ptr1 - store volatile double %ext10, double *%ptr1 - store volatile double %ext11, double *%ptr1 - store volatile double %ext12, double *%ptr1 - store volatile double %ext13, double *%ptr1 - store volatile double %ext14, double *%ptr1 - store volatile double %ext15, double *%ptr1 - store volatile double %ext16, double *%ptr1 - - ret void -} Index: test/CodeGen/SystemZ/fp-conv-17.mir =================================================================== --- /dev/null +++ test/CodeGen/SystemZ/fp-conv-17.mir @@ -0,0 +1,202 @@ +# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z10 -start-before=greedy %s -o - \ +# RUN: | FileCheck %s +--- | + define void @f0(double* %ptr1, float* %ptr2) { + %val0 = load volatile float, float* %ptr2 + %val1 = load volatile float, float* %ptr2 + %val2 = load volatile float, float* %ptr2 + %val3 = load volatile float, float* %ptr2 + %val4 = load volatile float, float* %ptr2 + %val5 = load volatile float, float* %ptr2 + %val6 = load volatile float, float* %ptr2 + %val7 = load volatile float, float* %ptr2 + %val8 = load volatile float, float* %ptr2 + %val9 = load volatile float, float* %ptr2 + %val10 = load volatile float, float* %ptr2 + %val11 = load volatile float, float* %ptr2 + %val12 = load volatile float, float* %ptr2 + %val13 = load volatile float, float* %ptr2 + %val14 = load volatile float, float* %ptr2 + %val15 = load volatile float, float* %ptr2 + %val16 = load volatile float, float* %ptr2 + %ext0 = fpext float %val0 to double + %ext1 = fpext float %val1 to double + %ext2 = fpext float %val2 to double + %ext3 = fpext float %val3 to double + %ext4 = fpext float %val4 to double + %ext5 = fpext float %val5 to double + %ext6 = fpext float %val6 to double + %ext7 = fpext float %val7 to double + %ext8 = fpext float %val8 to double + %ext9 = fpext float %val9 to double + %ext10 = fpext float %val10 to double + %ext11 = fpext float %val11 to double + %ext12 = fpext float %val12 to double + %ext13 = fpext float %val13 to double + %ext14 = fpext float %val14 to double + %ext15 = fpext float %val15 to double + %ext16 = fpext float %val16 to double + store volatile float %val0, float* %ptr2 + store volatile float %val1, float* %ptr2 + store volatile float %val2, float* %ptr2 + store volatile float %val3, float* %ptr2 + store volatile float %val4, float* %ptr2 + store volatile float %val5, float* %ptr2 + store volatile float %val6, float* %ptr2 + store volatile float %val7, float* %ptr2 + store volatile float %val8, float* %ptr2 + store volatile float %val9, float* %ptr2 + store volatile float %val10, float* %ptr2 + store volatile float %val11, float* %ptr2 + store volatile float %val12, float* %ptr2 + store volatile float %val13, float* %ptr2 + store volatile float %val14, float* %ptr2 + store volatile float %val15, float* %ptr2 + store volatile float %val16, float* %ptr2 + store volatile double %ext0, double* %ptr1 + store volatile double %ext1, double* %ptr1 + store volatile double %ext2, double* %ptr1 + store volatile double %ext3, double* %ptr1 + store volatile double %ext4, double* %ptr1 + store volatile double %ext5, double* %ptr1 + store volatile double %ext6, double* %ptr1 + store volatile double %ext7, double* %ptr1 + store volatile double %ext8, double* %ptr1 + store volatile double %ext9, double* %ptr1 + store volatile double %ext10, double* %ptr1 + store volatile double %ext11, double* %ptr1 + store volatile double %ext12, double* %ptr1 + store volatile double %ext13, double* %ptr1 + store volatile double %ext14, double* %ptr1 + store volatile double %ext15, double* %ptr1 + store volatile double %ext16, double* %ptr1 + ret void + } + +... + +# CHECK-LABEL: f0: +# CHECK: ldeb {{%f[0-9]+}}, 16{{[04]}}(%r15) +# CHECK: br %r14 + +--- +name: f0 +alignment: 2 +tracksRegLiveness: true +registers: + - { id: 0, class: addr64bit } + - { id: 1, class: addr64bit } + - { id: 2, class: fp32bit } + - { id: 3, class: fp32bit } + - { id: 4, class: fp32bit } + - { id: 5, class: fp32bit } + - { id: 6, class: fp32bit } + - { id: 7, class: fp32bit } + - { id: 8, class: fp32bit } + - { id: 9, class: fp32bit } + - { id: 10, class: fp32bit } + - { id: 11, class: fp32bit } + - { id: 12, class: fp32bit } + - { id: 13, class: fp32bit } + - { id: 14, class: fp32bit } + - { id: 15, class: fp32bit } + - { id: 16, class: fp32bit } + - { id: 17, class: fp32bit } + - { id: 18, class: fp32bit } + - { id: 19, class: fp64bit } + - { id: 20, class: fp64bit } + - { id: 21, class: fp64bit } + - { id: 22, class: fp64bit } + - { id: 23, class: fp64bit } + - { id: 24, class: fp64bit } + - { id: 25, class: fp64bit } + - { id: 26, class: fp64bit } + - { id: 27, class: fp64bit } + - { id: 28, class: fp64bit } + - { id: 29, class: fp64bit } + - { id: 30, class: fp64bit } + - { id: 31, class: fp64bit } + - { id: 32, class: fp64bit } + - { id: 33, class: fp64bit } + - { id: 34, class: fp64bit } + - { id: 35, class: fp64bit } +liveins: + - { reg: '%r2d', virtual-reg: '%0' } + - { reg: '%r3d', virtual-reg: '%1' } +body: | + bb.0 (%ir-block.0): + liveins: %r2d, %r3d + + %1 = COPY %r3d + %0 = COPY %r2d + %2 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %3 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %4 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %5 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %6 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %7 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %8 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %9 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %10 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %11 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %12 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %13 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %14 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %15 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %16 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %17 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + %18 = LE %1, 0, _ :: (volatile load 4 from %ir.ptr2) + STE %2, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %3, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %4, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %5, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %6, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %7, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %8, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %9, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %10, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %11, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %12, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %13, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %14, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %15, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %16, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %17, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + STE %18, %1, 0, _ :: (volatile store 4 into %ir.ptr2) + %19 = LDEBR %2 + STD %19, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %20 = LDEBR %3 + STD %20, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %21 = LDEBR %4 + STD %21, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %22 = LDEBR %5 + STD %22, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %23 = LDEBR %6 + STD %23, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %24 = LDEBR %7 + STD %24, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %25 = LDEBR %8 + STD %25, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %26 = LDEBR %9 + STD %26, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %27 = LDEBR %10 + STD %27, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %28 = LDEBR %11 + STD %28, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %29 = LDEBR %12 + STD %29, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %30 = LDEBR %13 + STD %30, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %31 = LDEBR %14 + STD %31, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %32 = LDEBR %15 + STD %32, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %33 = LDEBR %16 + STD %33, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %34 = LDEBR %17 + STD %34, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + %35 = LDEBR %18 + STD %35, %0, 0, _ :: (volatile store 8 into %ir.ptr1) + Return + +... Index: test/CodeGen/SystemZ/fp-copysign-02.ll =================================================================== --- test/CodeGen/SystemZ/fp-copysign-02.ll +++ test/CodeGen/SystemZ/fp-copysign-02.ll @@ -36,9 +36,9 @@ ; CHECK-LABEL: f7: ; CHECK: vl [[REG1:%v[0-7]+]], 0(%r3) ; CHECK: tmlh -; CHECK: wflnxb [[REG1]], [[REG1]] -; CHECK: wflpxb [[REG1]], [[REG1]] -; CHECK: vst [[REG1]], 0(%r2) +; CHECK: wflnxb [[REG2:%v[0-9]+]], [[REG1]] +; CHECK: wflpxb [[REG2]], [[REG1]] +; CHECK: vst [[REG2]], 0(%r2) ; CHECK: br %r14 %a = load volatile fp128, fp128 *%aptr %b = fpext float %bf to fp128 @@ -52,9 +52,9 @@ ; CHECK-LABEL: f8: ; CHECK: vl [[REG1:%v[0-7]+]], 0(%r3) ; CHECK: tmhh -; CHECK: wflnxb [[REG1]], [[REG1]] -; CHECK: wflpxb [[REG1]], [[REG1]] -; CHECK: vst [[REG1]], 0(%r2) +; CHECK: wflnxb [[REG2:%v[0-9]+]], [[REG1]] +; CHECK: wflpxb [[REG2]], [[REG1]] +; CHECK: vst [[REG2]], 0(%r2) ; CHECK: br %r14 %a = load volatile fp128, fp128 *%aptr %b = fpext double %bd to fp128 Index: test/CodeGen/SystemZ/fp-div-03.ll =================================================================== --- test/CodeGen/SystemZ/fp-div-03.ll +++ test/CodeGen/SystemZ/fp-div-03.ll @@ -5,9 +5,9 @@ ; There is no memory form of 128-bit division. define void @f1(fp128 *%ptr, float %f2) { ; CHECK-LABEL: f1: -; CHECK: lxebr %f0, %f0 -; CHECK: ld %f1, 0(%r2) -; CHECK: ld %f3, 8(%r2) +; CHECK-DAG: lxebr %f0, %f0 +; CHECK-DAG: ld %f1, 0(%r2) +; CHECK-DAG: ld %f3, 8(%r2) ; CHECK: dxbr %f1, %f0 ; CHECK: std %f1, 0(%r2) ; CHECK: std %f3, 8(%r2) Index: test/CodeGen/SystemZ/fp-mul-05.ll =================================================================== --- test/CodeGen/SystemZ/fp-mul-05.ll +++ test/CodeGen/SystemZ/fp-mul-05.ll @@ -5,12 +5,12 @@ ; There is no memory form of 128-bit multiplication. define void @f1(fp128 *%ptr, float %f2) { ; CHECK-LABEL: f1: -; CHECK: lxebr %f0, %f0 -; CHECK: ld %f1, 0(%r2) -; CHECK: ld %f3, 8(%r2) -; CHECK: mxbr %f1, %f0 -; CHECK: std %f1, 0(%r2) -; CHECK: std %f3, 8(%r2) +; CHECK-DAG: lxebr %f0, %f0 +; CHECK-DAG: ld %f1, 0(%r2) +; CHECK-DAG: ld %f3, 8(%r2) +; CHECK: mxbr %f0, %f1 +; CHECK: std %f0, 0(%r2) +; CHECK: std %f2, 8(%r2) ; CHECK: br %r14 %f1 = load fp128 , fp128 *%ptr %f2x = fpext float %f2 to fp128 Index: test/CodeGen/SystemZ/fp-sub-03.ll =================================================================== --- test/CodeGen/SystemZ/fp-sub-03.ll +++ test/CodeGen/SystemZ/fp-sub-03.ll @@ -5,9 +5,9 @@ ; There is no memory form of 128-bit subtraction. define void @f1(fp128 *%ptr, float %f2) { ; CHECK-LABEL: f1: -; CHECK: lxebr %f0, %f0 -; CHECK: ld %f1, 0(%r2) -; CHECK: ld %f3, 8(%r2) +; CHECK-DAG: lxebr %f0, %f0 +; CHECK-DAG: ld %f1, 0(%r2) +; CHECK-DAG: ld %f3, 8(%r2) ; CHECK: sxbr %f1, %f0 ; CHECK: std %f1, 0(%r2) ; CHECK: std %f3, 8(%r2) Index: test/CodeGen/SystemZ/int-cmp-44.ll =================================================================== --- test/CodeGen/SystemZ/int-cmp-44.ll +++ test/CodeGen/SystemZ/int-cmp-44.ll @@ -733,11 +733,11 @@ ; we need. define i32 @f36(i32 %val, i32 %dummy, i32 *%dest) { ; CHECK-LABEL: f36: -; CHECK: ltr %r3, %r2 -; CHECK-NEXT: #APP -; CHECK-NEXT: blah %r3 -; CHECK-NEXT: #NO_APP -; CHECK-NEXT: blr %r14 +; _XFAIL_CHECK: ltr %r3, %r2 +; _XFAIL_CHECK-NEXT: #APP +; _XFAIL_CHECK-NEXT: blah %r3 +; _XFAIL_CHECK-NEXT: #NO_APP +; _XFAIL_CHECK-NEXT: blr %r14 ; CHECK: br %r14 entry: call void asm sideeffect "blah $0", "{r3}"(i32 %val) @@ -756,11 +756,11 @@ ; we need. define i64 @f37(i64 %val, i64 %dummy, i64 *%dest) { ; CHECK-LABEL: f37: -; CHECK: ltgr %r3, %r2 -; CHECK-NEXT: #APP -; CHECK-NEXT: blah %r3 -; CHECK-NEXT: #NO_APP -; CHECK-NEXT: blr %r14 +; _XFAIL_CHECK: ltgr %r3, %r2 +; _XFAIL_CHECK-NEXT: #APP +; _XFAIL_CHECK-NEXT: blah %r3 +; _XFAIL_CHECK-NEXT: #NO_APP +; _XFAIL_CHECK-NEXT: blr %r14 ; CHECK: br %r14 entry: call void asm sideeffect "blah $0", "{r3}"(i64 %val) Index: test/CodeGen/SystemZ/pr32505.ll =================================================================== --- test/CodeGen/SystemZ/pr32505.ll +++ test/CodeGen/SystemZ/pr32505.ll @@ -6,9 +6,9 @@ define <2 x float> @pr32505(<2 x i8> * %a) { ; CHECK-LABEL: pr32505: ; CHECK: # BB#0: -; CHECK-NEXT: lbh %r0, 0(%r2) -; CHECK-NEXT: ldgr %f0, %r0 ; CHECK-NEXT: lbh %r0, 1(%r2) +; CHECK-NEXT: lbh %r1, 0(%r2) +; CHECK-NEXT: ldgr %f0, %r1 ; CHECK-NEXT: ldgr %f2, %r0 ; CHECK-NEXT: # kill: %F0S %F0S %F0D ; CHECK-NEXT: # kill: %F2S %F2S %F2D Index: test/CodeGen/SystemZ/swift-return.ll =================================================================== --- test/CodeGen/SystemZ/swift-return.ll +++ test/CodeGen/SystemZ/swift-return.ll @@ -8,9 +8,9 @@ ; CHECK-LABEL: test: ; CHECK: st %r2 ; CHECK: brasl %r14, gen -; CHECK-DAG: lhr %r2, %r2 -; CHECK-DAG: lbr %[[REG1:r[0-9]+]], %r3 -; CHECK: ar %r2, %[[REG1]] +; CHECK-DAG: lhr %{{r[0,2]+}}, %r2 +; CHECK-DAG: lbr %{{r[0,2]+}}, %r3 +; CHECK: ar %r2, %r0 ; CHECK-O0-LABEL: test ; CHECK-O0: st %r2 ; CHECK-O0: brasl %r14, gen Index: test/CodeGen/SystemZ/tdc-06.ll =================================================================== --- test/CodeGen/SystemZ/tdc-06.ll +++ test/CodeGen/SystemZ/tdc-06.ll @@ -10,30 +10,30 @@ define i32 @fpc(double %x) { entry: ; CHECK-LABEL: fpc -; CHECK: lhi %r2, 5 -; CHECK: ltdbr %f0, %f0 +; CHECK-DAG: lhi %r2, 5 +; CHECK-DAG: ltdbr %f0, %f0 ; CHECK: je [[RET:.L.*]] %testeq = fcmp oeq double %x, 0.000000e+00 br i1 %testeq, label %ret, label %nonzero, !prof !1 nonzero: -; CHECK: lhi %r2, 1 -; CHECK: cdbr %f0, %f0 +; CHECK-DAG: lhi %r2, 1 +; CHECK-DAG: cdbr %f0, %f0 ; CHECK: jo [[RET]] %testnan = fcmp uno double %x, 0.000000e+00 br i1 %testnan, label %ret, label %nonzeroord, !prof !1 nonzeroord: -; CHECK: lhi %r2, 2 -; CHECK: tcdb %f0, 48 +; CHECK-DAG: lhi %r2, 2 +; CHECK-DAG: tcdb %f0, 48 ; CHECK: jl [[RET]] %abs = tail call double @llvm.fabs.f64(double %x) %testinf = fcmp oeq double %abs, 0x7FF0000000000000 br i1 %testinf, label %ret, label %finite, !prof !1 finite: -; CHECK: lhi %r2, 3 -; CHECK: tcdb %f0, 831 +; CHECK-DAG: lhi %r2, 3 +; CHECK-DAG: tcdb %f0, 831 ; CHECK: blr %r14 ; CHECK: lhi %r2, 4 %testnormal = fcmp uge double %abs, 0x10000000000000 Index: test/CodeGen/SystemZ/tls-01.ll =================================================================== --- test/CodeGen/SystemZ/tls-01.ll +++ test/CodeGen/SystemZ/tls-01.ll @@ -14,8 +14,8 @@ ; CHECK-MAIN-LABEL: foo: ; CHECK-MAIN: ear [[HIGH:%r[0-5]]], %a0 ; CHECK-MAIN: sllg %r2, [[HIGH]], 32 -; CHECK-MAIN: ear %r2, %a1 -; CHECK-MAIN: larl %r1, .LCP{{.*}} +; CHECK-MAIN-DAG: ear %r2, %a1 +; CHECK-MAIN-DAG: larl %r1, .LCP{{.*}} ; CHECK-MAIN: ag %r2, 0(%r1) ; CHECK-MAIN: br %r14 ret i32 *@x Index: test/CodeGen/SystemZ/tls-02.ll =================================================================== --- test/CodeGen/SystemZ/tls-02.ll +++ test/CodeGen/SystemZ/tls-02.ll @@ -10,8 +10,8 @@ ; CHECK-MAIN-LABEL: foo: ; CHECK-MAIN: ear [[HIGH:%r[0-5]]], %a0 ; CHECK-MAIN: sllg %r2, [[HIGH]], 32 -; CHECK-MAIN: ear %r2, %a1 -; CHECK-MAIN: larl %r1, x@INDNTPOFF +; CHECK-MAIN-DAG: ear %r2, %a1 +; CHECK-MAIN-DAG: larl %r1, x@INDNTPOFF ; CHECK-MAIN: ag %r2, 0(%r1) ; CHECK-MAIN: br %r14 ret i32 *@x Index: test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll =================================================================== --- test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll +++ test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll @@ -10,9 +10,9 @@ define <2 x i8> @fun0(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { ; CHECK-LABEL: fun0: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -25,9 +25,9 @@ define <2 x i16> @fun1(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun1: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -57,11 +57,11 @@ define <2 x i32> @fun3(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun3: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -74,12 +74,12 @@ define <2 x i32> @fun4(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun4: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -92,21 +92,21 @@ define <2 x i16> @fun5(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun5: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vpkf %v0, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -119,12 +119,12 @@ define <2 x i64> @fun6(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun6: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -137,9 +137,9 @@ define <2 x i8> @fun7(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { ; CHECK-LABEL: fun7: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -153,9 +153,9 @@ define <2 x i16> @fun8(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun8: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i16> %val1, %val2 @@ -168,9 +168,9 @@ define <2 x i32> @fun9(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun9: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -202,11 +202,11 @@ ; CHECK-LABEL: fun11: ; CHECK: # BB#0: ; CHECK-NEXT: larl %r1, .LCPI11_0 -; CHECK-NEXT: vl %v1, 0(%r1) -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vperm %v1, %v1, %v0, %v2 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -220,20 +220,20 @@ define <2 x double> @fun12(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { ; CHECK-LABEL: fun12: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vuphf %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -248,11 +248,11 @@ ; CHECK-LABEL: fun13: ; CHECK: # BB#0: ; CHECK-NEXT: larl %r1, .LCPI13_0 -; CHECK-NEXT: vl %v1, 0(%r1) -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vperm %v1, %v1, %v0, %v2 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i16> %val1, %val2 @@ -265,9 +265,9 @@ define <2 x i16> @fun14(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun14: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -281,9 +281,9 @@ define <2 x i32> @fun15(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun15: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i32> %val1, %val2 @@ -296,9 +296,9 @@ define <2 x i64> @fun16(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun16: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vuphf %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -312,10 +312,10 @@ define <2 x i64> @fun17(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun17: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i32> %val1, %val2 @@ -328,19 +328,19 @@ define <2 x i16> @fun18(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun18: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -370,10 +370,10 @@ define <2 x i16> @fun20(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun20: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 ; CHECK-NEXT: larl %r1, .LCPI20_0 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 @@ -388,9 +388,9 @@ define <2 x i64> @fun21(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun21: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i64> %val1, %val2 @@ -403,20 +403,20 @@ define <2 x i64> @fun22(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun22: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i64> %val1, %val2 @@ -429,10 +429,10 @@ define <2 x i16> @fun23(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun23: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 ; CHECK-NEXT: larl %r1, .LCPI23_0 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 @@ -447,29 +447,29 @@ define <2 x float> @fun24(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { ; CHECK-LABEL: fun24: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <2 x float> %val1, %val2 @@ -508,9 +508,9 @@ define <4 x i16> @fun26(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun26: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -524,9 +524,9 @@ define <4 x i32> @fun27(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun27: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 @@ -539,14 +539,14 @@ define <4 x i64> @fun28(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun28: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 %cmp1 = icmp eq <4 x i32> %val3, %val4 @@ -558,11 +558,11 @@ define <4 x i32> @fun29(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun29: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v30, %v27 -; CHECK-NEXT: vceqg %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v27 +; CHECK-NEXT: vceqg %v2, %v28, %v25 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 @@ -575,19 +575,19 @@ define <4 x i16> @fun30(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun30: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -601,12 +601,12 @@ define <4 x i8> @fun31(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { ; CHECK-LABEL: fun31: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v27 -; CHECK-NEXT: vfchdb %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v30, %v27 +; CHECK-NEXT: vfchdb %v2, %v28, %v25 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v2, %v1 ; CHECK-NEXT: larl %r1, .LCPI31_0 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 @@ -621,16 +621,16 @@ define <4 x i32> @fun32(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun32: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v29 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vceqg %v4, %v25, %v29 +; CHECK-NEXT: vceqg %v5, %v27, %v31 +; CHECK-NEXT: vn %v3, %v3, %v5 +; CHECK-NEXT: vn %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = icmp eq <4 x i64> %val3, %val4 @@ -642,18 +642,18 @@ define <4 x i64> @fun33(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun33: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v25, %v29 -; CHECK-NEXT: vceqg %v1, %v24, %v28 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqg %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v4, %v24, %v28 +; CHECK-NEXT: vceqg %v5, %v26, %v30 +; CHECK-NEXT: vceqg %v6, %v25, %v29 +; CHECK-NEXT: vceqg %v7, %v27, %v31 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vn %v5, %v5, %v7 +; CHECK-NEXT: vn %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = icmp eq <4 x i64> %val3, %val4 @@ -665,28 +665,28 @@ define <4 x i64> @fun34(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun34: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrlf %v5, %v25, %v25 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v27, %v27 +; CHECK-NEXT: vmrhf %v6, %v25, %v25 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v4, %v4, %v4 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vn %v3, %v3, %v4 +; CHECK-NEXT: vn %v2, %v2, %v5 +; CHECK-NEXT: vsel %v24, %v29, %v1, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = fcmp ogt <4 x float> %val3, %val4 @@ -698,16 +698,16 @@ define <4 x float> @fun35(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { ; CHECK-LABEL: fun35: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v29 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vfchdb %v4, %v25, %v29 +; CHECK-NEXT: vfchdb %v5, %v27, %v31 +; CHECK-NEXT: vn %v3, %v3, %v5 +; CHECK-NEXT: vn %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = fcmp ogt <4 x double> %val3, %val4 @@ -719,29 +719,29 @@ define <4 x i16> @fun36(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun36: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -755,29 +755,29 @@ define <4 x float> @fun37(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { ; CHECK-LABEL: fun37: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <4 x float> %val1, %val2 @@ -790,34 +790,34 @@ define <4 x double> @fun38(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { ; CHECK-LABEL: fun38: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <4 x float> %val1, %val2 %cmp1 = fcmp ogt <4 x float> %val3, %val4 @@ -829,22 +829,22 @@ define <4 x i8> @fun39(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { ; CHECK-LABEL: fun39: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v27 -; CHECK-NEXT: vfchdb %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 ; CHECK-NEXT: larl %r1, .LCPI39_0 ; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v30, %v27 +; CHECK-NEXT: vfchdb %v2, %v28, %v25 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 @@ -859,9 +859,9 @@ define <8 x i8> @fun40(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { ; CHECK-LABEL: fun40: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -875,9 +875,9 @@ define <8 x i16> @fun41(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { ; CHECK-LABEL: fun41: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 @@ -890,14 +890,14 @@ define <8 x i32> @fun42(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun42: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i16> %val3, %val4 @@ -909,30 +909,30 @@ define <8 x i64> @fun43(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { ; CHECK-LABEL: fun43: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vceqf %v0, %v28, %v25 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 -; CHECK-NEXT: vceqf %v0, %v30, %v27 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v6, %v24, %v26 +; CHECK-NEXT: vuphh %v7, %v6 +; CHECK-NEXT: vmrlg %v6, %v6, %v6 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vceqf %v16, %v28, %v25 +; CHECK-NEXT: vceqf %v17, %v30, %v27 +; CHECK-NEXT: vn %v6, %v6, %v17 +; CHECK-NEXT: vn %v7, %v7, %v16 +; CHECK-NEXT: vmrlg %v17, %v6, %v6 +; CHECK-NEXT: vmrlg %v16, %v7, %v7 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) ; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vuphf %v17, %v17 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vuphf %v16, %v16 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vsel %v24, %v29, %v5, %v7 +; CHECK-NEXT: vsel %v26, %v31, %v4, %v16 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v6 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v17 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i32> %val3, %val4 @@ -944,21 +944,21 @@ define <8 x i8> @fun44(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { ; CHECK-LABEL: fun44: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v30, %v31 -; CHECK-NEXT: vceqg %v2, %v28, %v29 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vlrepg %v1, 200(%r15) -; CHECK-NEXT: vlrepg %v2, 192(%r15) -; CHECK-NEXT: vpkh %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vceqg %v3, %v27, %v3 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqg %v3, %v30, %v31 +; CHECK-NEXT: vceqg %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v3, %v5, %v3 +; CHECK-NEXT: vceqh %v4, %v24, %v26 +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vn %v2, %v4, %v2 +; CHECK-NEXT: vlrepg %v0, 200(%r15) +; CHECK-NEXT: vlrepg %v1, 192(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i64> %val3, %val4 @@ -970,31 +970,31 @@ define <8 x i16> @fun45(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { ; CHECK-LABEL: fun45: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vmrhf %v4, %v28, %v28 +; CHECK-NEXT: vceqh %v0, %v24, %v26 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vmrlf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v25, %v25 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 @@ -1007,26 +1007,26 @@ define <8 x i32> @fun46(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun46: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vceqh %v6, %v24, %v26 +; CHECK-NEXT: vuphh %v7, %v6 +; CHECK-NEXT: vmrlg %v6, %v6, %v6 +; CHECK-NEXT: vfchdb %v16, %v30, %v31 +; CHECK-NEXT: vfchdb %v17, %v28, %v29 +; CHECK-NEXT: vfchdb %v5, %v27, %v5 +; CHECK-NEXT: vfchdb %v4, %v25, %v4 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vpkg %v16, %v17, %v16 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) ; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vn %v4, %v6, %v4 +; CHECK-NEXT: vn %v5, %v7, %v16 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -1038,26 +1038,26 @@ define <8 x i32> @fun47(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun47: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vl %v6, 160(%r15) +; CHECK-NEXT: vl %v7, 176(%r15) +; CHECK-NEXT: vceqg %v7, %v27, %v7 +; CHECK-NEXT: vceqg %v6, %v25, %v6 +; CHECK-NEXT: vceqg %v5, %v31, %v5 +; CHECK-NEXT: vceqg %v4, %v29, %v4 +; CHECK-NEXT: vceqf %v16, %v24, %v28 +; CHECK-NEXT: vceqf %v17, %v26, %v30 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vn %v4, %v17, %v4 +; CHECK-NEXT: vn %v5, %v16, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = icmp eq <8 x i64> %val3, %val4 @@ -1069,50 +1069,50 @@ define <8 x double> @fun48(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { ; CHECK-LABEL: fun48: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v29, %v29 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v29, %v29 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v31, %v31 -; CHECK-NEXT: vmrlf %v2, %v27, %v27 -; CHECK-NEXT: vmrhf %v3, %v27, %v27 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v31, %v31 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vceqf %v2, %v26, %v30 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vmrlf %v18, %v29, %v29 +; CHECK-NEXT: vmrlf %v19, %v25, %v25 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vmrhf %v19, %v29, %v29 +; CHECK-NEXT: vmrhf %v20, %v25, %v25 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 240(%r15) ; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vpkg %v18, %v19, %v18 +; CHECK-NEXT: vmrlf %v19, %v31, %v31 +; CHECK-NEXT: vmrlf %v20, %v27, %v27 +; CHECK-NEXT: vmrhf %v21, %v27, %v27 +; CHECK-NEXT: vceqf %v16, %v24, %v28 +; CHECK-NEXT: vceqf %v17, %v26, %v30 +; CHECK-NEXT: vn %v16, %v16, %v18 +; CHECK-NEXT: vmrlg %v18, %v16, %v16 +; CHECK-NEXT: vuphf %v18, %v18 +; CHECK-NEXT: vuphf %v16, %v16 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vmrhf %v20, %v31, %v31 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vpkg %v19, %v20, %v19 +; CHECK-NEXT: vn %v17, %v17, %v19 +; CHECK-NEXT: vmrlg %v19, %v17, %v17 +; CHECK-NEXT: vuphf %v19, %v19 +; CHECK-NEXT: vuphf %v17, %v17 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v19 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = fcmp ogt <8 x float> %val3, %val4 @@ -1124,38 +1124,38 @@ define <8 x double> @fun49(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { ; CHECK-LABEL: fun49: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vfchdb %v0, %v25, %v0 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 224(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vceqf %v2, %v26, %v30 -; CHECK-NEXT: vfchdb %v0, %v29, %v0 -; CHECK-NEXT: vuphf %v3, %v2 -; CHECK-NEXT: vn %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vceqf %v20, %v24, %v28 +; CHECK-NEXT: vceqf %v22, %v26, %v30 +; CHECK-NEXT: vl %v16, 208(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 160(%r15) +; CHECK-NEXT: vuphf %v21, %v20 +; CHECK-NEXT: vuphf %v23, %v22 +; CHECK-NEXT: vmrlg %v20, %v20, %v20 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vfchdb %v19, %v25, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v31, %v16 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) ; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vl %v7, 224(%r15) +; CHECK-NEXT: vn %v16, %v22, %v16 +; CHECK-NEXT: vn %v17, %v20, %v17 +; CHECK-NEXT: vn %v18, %v23, %v18 +; CHECK-NEXT: vn %v19, %v21, %v19 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -1167,58 +1167,58 @@ define <8 x i64> @fun50(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { ; CHECK-LABEL: fun50: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 224(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vn %v1, %v1, %v2 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vfchdb %v3, %v29, %v3 -; CHECK-NEXT: vn %v2, %v2, %v3 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vfchdb %v2, %v27, %v2 -; CHECK-NEXT: vn %v0, %v0, %v2 +; CHECK-NEXT: vmrlf %v20, %v28, %v28 +; CHECK-NEXT: vmrlf %v21, %v24, %v24 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vmrhf %v21, %v28, %v28 +; CHECK-NEXT: vmrhf %v22, %v24, %v24 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vl %v16, 208(%r15) +; CHECK-NEXT: vldeb %v22, %v22 +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 160(%r15) +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vfchdb %v21, %v22, %v21 ; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vfchdb %v1, %v31, %v1 -; CHECK-NEXT: vn %v0, %v0, %v1 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vmrlf %v22, %v30, %v30 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vmrlf %v23, %v26, %v26 +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vl %v7, 224(%r15) +; CHECK-NEXT: vldeb %v22, %v22 +; CHECK-NEXT: vmrhf %v24, %v26, %v26 +; CHECK-NEXT: vpkg %v20, %v21, %v20 +; CHECK-NEXT: vuphf %v21, %v20 +; CHECK-NEXT: vmrlg %v20, %v20, %v20 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v25, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v31, %v16 +; CHECK-NEXT: vn %v17, %v20, %v17 +; CHECK-NEXT: vn %v19, %v21, %v19 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vldeb %v23, %v23 +; CHECK-NEXT: vfchdb %v22, %v23, %v22 +; CHECK-NEXT: vmrhf %v23, %v30, %v30 +; CHECK-NEXT: vldeb %v23, %v23 +; CHECK-NEXT: vldeb %v24, %v24 +; CHECK-NEXT: vfchdb %v23, %v24, %v23 +; CHECK-NEXT: vpkg %v22, %v23, %v22 +; CHECK-NEXT: vuphf %v23, %v22 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vn %v16, %v22, %v16 +; CHECK-NEXT: vn %v18, %v23, %v18 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <8 x float> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -1230,9 +1230,9 @@ define <16 x i8> @fun51(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun51: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 @@ -1245,14 +1245,14 @@ define <16 x i16> @fun52(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun52: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i8> %val3, %val4 @@ -1264,59 +1264,70 @@ define <16 x i64> @fun53(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun53: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vceqh %v0, %v28, %v25 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vuphh %v2, %v0 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v3, 288(%r15) -; CHECK-NEXT: vl %v4, 160(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vceqh %v2, %v30, %v27 -; CHECK-NEXT: vlr %v30, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vn %v1, %v1, %v2 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 -; CHECK-NEXT: vl %v3, 336(%r15) -; CHECK-NEXT: vl %v4, 208(%r15) -; CHECK-NEXT: vpkg %v2, %v1, %v1 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vmrlg %v2, %v1, %v1 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi0: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi1: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi2: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vceqb %v22, %v24, %v26 +; CHECK-NEXT: vuphb %v23, %v22 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphb %v22, %v22 +; CHECK-NEXT: vceqh %v24, %v28, %v25 +; CHECK-NEXT: vceqh %v25, %v30, %v27 +; CHECK-NEXT: vn %v22, %v22, %v25 +; CHECK-NEXT: vsldb %v25, %v22, %v22, 12 +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vuphf %v8, %v25 +; CHECK-NEXT: vmrlg %v25, %v22, %v22 +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vn %v23, %v23, %v24 +; CHECK-NEXT: vl %v0, 544(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vpkg %v25, %v22, %v22 +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 432(%r15) +; CHECK-NEXT: vsldb %v24, %v23, %v23, 12 +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vl %v6, 496(%r15) +; CHECK-NEXT: vl %v7, 368(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v16, 480(%r15) +; CHECK-NEXT: vl %v17, 352(%r15) +; CHECK-NEXT: vuphf %v27, %v25 +; CHECK-NEXT: vl %v18, 464(%r15) +; CHECK-NEXT: vl %v19, 336(%r15) +; CHECK-NEXT: vuphf %v25, %v24 +; CHECK-NEXT: vmrlg %v24, %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphf %v28, %v24 +; CHECK-NEXT: vpkg %v24, %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vuphh %v22, %v22 +; CHECK-NEXT: vuphf %v26, %v24 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vsel %v24, %v29, %v21, %v23 +; CHECK-NEXT: vsel %v26, %v31, %v20, %v26 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v9 +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v31, %v1, %v0, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vsel %v30, %v17, %v16, %v25 +; CHECK-NEXT: vsel %v25, %v7, %v6, %v22 +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -1328,64 +1339,84 @@ define <16 x i64> @fun54(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun54: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vceqf %v0, %v28, %v29 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vl %v3, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vpkg %v2, %v1, %v1 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vl %v5, 256(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vmrlg %v3, %v1, %v1 -; CHECK-NEXT: vuphb %v3, %v3 -; CHECK-NEXT: vceqf %v2, %v25, %v2 -; CHECK-NEXT: vuphh %v3, %v3 -; CHECK-NEXT: vn %v2, %v3, %v2 -; CHECK-NEXT: vuphf %v3, %v2 -; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 -; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vl %v4, 416(%r15) -; CHECK-NEXT: vl %v5, 288(%r15) -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vceqf %v3, %v27, %v3 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v1, %v1, %v3 -; CHECK-NEXT: vuphf %v3, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vl %v4, 240(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi3: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi4: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi5: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi6: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi7: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vceqb %v24, %v24, %v26 +; CHECK-NEXT: vuphb %v26, %v24 +; CHECK-NEXT: vpkg %v10, %v24, %v24 +; CHECK-NEXT: vmrlg %v11, %v24, %v24 +; CHECK-NEXT: vsldb %v24, %v24, %v24, 12 +; CHECK-NEXT: vl %v8, 368(%r15) +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vl %v9, 352(%r15) +; CHECK-NEXT: vuphb %v10, %v10 +; CHECK-NEXT: vuphb %v11, %v11 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vceqf %v27, %v27, %v8 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vuphh %v10, %v10 +; CHECK-NEXT: vuphh %v11, %v11 +; CHECK-NEXT: vceqf %v28, %v28, %v29 +; CHECK-NEXT: vceqf %v29, %v30, %v31 +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vl %v7, 480(%r15) +; CHECK-NEXT: vceqf %v25, %v25, %v9 +; CHECK-NEXT: vl %v18, 544(%r15) +; CHECK-NEXT: vl %v19, 416(%r15) +; CHECK-NEXT: vn %v24, %v24, %v27 +; CHECK-NEXT: vl %v0, 624(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vmrlg %v27, %v24, %v24 +; CHECK-NEXT: vl %v2, 592(%r15) +; CHECK-NEXT: vl %v3, 464(%r15) +; CHECK-NEXT: vn %v25, %v11, %v25 +; CHECK-NEXT: vl %v4, 560(%r15) +; CHECK-NEXT: vl %v5, 432(%r15) +; CHECK-NEXT: vn %v29, %v10, %v29 +; CHECK-NEXT: vl %v16, 576(%r15) +; CHECK-NEXT: vl %v17, 448(%r15) +; CHECK-NEXT: vuphf %v8, %v24 +; CHECK-NEXT: vl %v20, 528(%r15) +; CHECK-NEXT: vl %v21, 400(%r15) +; CHECK-NEXT: vn %v24, %v26, %v28 +; CHECK-NEXT: vl %v22, 512(%r15) +; CHECK-NEXT: vl %v23, 384(%r15) +; CHECK-NEXT: vuphf %v31, %v27 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vmrlg %v27, %v25, %v25 +; CHECK-NEXT: vmrlg %v30, %v29, %v29 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vuphf %v29, %v29 +; CHECK-NEXT: vmrlg %v26, %v24, %v24 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v30, %v30 +; CHECK-NEXT: vuphf %v25, %v25 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v19, %v18, %v29 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v8 +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v25, %v17, %v16, %v25 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v30 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v27 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i32> %val3, %val4 @@ -1397,88 +1428,88 @@ define <16 x i64> @fun55(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun55: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vceqg %v1, %v28, %v0 -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v4, %v1 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v28, %v3 +; CHECK-NEXT: vuphf %v4, %v4 ; CHECK-NEXT: vl %v2, 448(%r15) -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vpkf %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v30, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vn %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vsel %v24, %v4, %v2, %v3 +; CHECK-NEXT: vpkf %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v30, %v3 +; CHECK-NEXT: vuphf %v4, %v4 ; CHECK-NEXT: vl %v2, 464(%r15) -; CHECK-NEXT: vl %v3, 336(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vn %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 336(%r15) +; CHECK-NEXT: vsel %v26, %v4, %v2, %v3 +; CHECK-NEXT: vpkg %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vl %v3, 224(%r15) ; CHECK-NEXT: vl %v2, 480(%r15) -; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v27, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vl %v0, 544(%r15) +; CHECK-NEXT: vceqg %v3, %v25, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vn %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 352(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) ; CHECK-NEXT: vl %v2, 496(%r15) -; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v3, 384(%r15) -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v4, %v1, %v1, 6 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v27, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vn %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vsel %v30, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 256(%r15) ; CHECK-NEXT: vl %v2, 512(%r15) -; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v3, 400(%r15) -; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v31, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vmrlg %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vn %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v25, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 272(%r15) ; CHECK-NEXT: vl %v2, 528(%r15) -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 288(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vl %v3, 416(%r15) -; CHECK-NEXT: vceqg %v1, %v2, %v1 -; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 544(%r15) -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vsldb %v4, %v1, %v1, 10 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v31, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vn %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 400(%r15) +; CHECK-NEXT: vsel %v27, %v4, %v2, %v3 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vsldb %v3, %v1, %v1, 12 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 14 +; CHECK-NEXT: vn %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsel %v29, %v3, %v0, %v2 +; CHECK-NEXT: vl %v0, 304(%r15) ; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 432(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vn %v0, %v0, %v1 -; CHECK-NEXT: vl %v1, 560(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 560(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v2, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i64> %val3, %val4 @@ -1490,66 +1521,66 @@ define <16 x i16> @fun56(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun56: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vmrlf %v4, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v29, %v29 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrlf %v7, %v30, %v30 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vmrhf %v7, %v31, %v31 +; CHECK-NEXT: vmrhf %v16, %v30, %v30 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vmrlf %v2, %v0, %v0 -; CHECK-NEXT: vmrlf %v3, %v27, %v27 -; CHECK-NEXT: vmrhf %v0, %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vmrhf %v3, %v27, %v27 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v0, %v3, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v2 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vpkf %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vpkg %v6, %v7, %v6 +; CHECK-NEXT: vmrlf %v7, %v29, %v29 +; CHECK-NEXT: vmrlf %v16, %v28, %v28 +; CHECK-NEXT: vmrhf %v17, %v28, %v28 +; CHECK-NEXT: vmrlf %v18, %v25, %v25 +; CHECK-NEXT: vceqb %v4, %v24, %v26 +; CHECK-NEXT: vuphb %v5, %v4 +; CHECK-NEXT: vmrlg %v4, %v4, %v4 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vmrhf %v16, %v29, %v29 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vpkg %v7, %v16, %v7 +; CHECK-NEXT: vpkf %v6, %v7, %v6 +; CHECK-NEXT: vl %v7, 176(%r15) +; CHECK-NEXT: vmrlf %v16, %v7, %v7 +; CHECK-NEXT: vmrlf %v17, %v27, %v27 +; CHECK-NEXT: vmrhf %v7, %v7, %v7 +; CHECK-NEXT: vn %v5, %v5, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vmrhf %v17, %v27, %v27 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v7, %v17, %v7 +; CHECK-NEXT: vpkg %v7, %v7, %v16 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vmrlf %v17, %v16, %v16 +; CHECK-NEXT: vmrhf %v16, %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vmrhf %v18, %v25, %v25 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v16, %v18, %v16 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkf %v7, %v16, %v7 +; CHECK-NEXT: vn %v4, %v4, %v7 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = fcmp ogt <16 x float> %val3, %val4 @@ -1561,36 +1592,36 @@ define <16 x i8> @fun57(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun57: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 288(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v31, %v1 -; CHECK-NEXT: vfchdb %v2, %v29, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vfchdb %v1, %v27, %v1 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vfchdb %v2, %v30, %v2 -; CHECK-NEXT: vfchdb %v3, %v28, %v3 -; CHECK-NEXT: vpkg %v2, %v3, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vl %v6, 256(%r15) +; CHECK-NEXT: vl %v7, 272(%r15) +; CHECK-NEXT: vl %v16, 288(%r15) +; CHECK-NEXT: vl %v17, 160(%r15) +; CHECK-NEXT: vl %v18, 304(%r15) +; CHECK-NEXT: vl %v19, 176(%r15) +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vfchdb %v7, %v31, %v7 +; CHECK-NEXT: vfchdb %v6, %v29, %v6 +; CHECK-NEXT: vfchdb %v5, %v27, %v5 +; CHECK-NEXT: vfchdb %v4, %v25, %v4 +; CHECK-NEXT: vfchdb %v3, %v30, %v3 +; CHECK-NEXT: vfchdb %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v6, %v6, %v16 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vpkf %v2, %v2, %v4 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqb %v20, %v24, %v26 +; CHECK-NEXT: vpkh %v2, %v2, %v6 +; CHECK-NEXT: vn %v2, %v20, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = fcmp ogt <16 x double> %val3, %val4 @@ -1602,16 +1633,16 @@ define <16 x i8> @fun58(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun58: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v27, %v31 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v25, %v29 ; CHECK-NEXT: vceqh %v2, %v24, %v28 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vceqh %v4, %v25, %v29 +; CHECK-NEXT: vceqh %v5, %v27, %v31 +; CHECK-NEXT: vn %v3, %v3, %v5 +; CHECK-NEXT: vn %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -1623,18 +1654,18 @@ define <16 x i16> @fun59(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun59: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v25, %v29 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqh %v0, %v27, %v31 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v4, %v24, %v28 +; CHECK-NEXT: vceqh %v5, %v26, %v30 +; CHECK-NEXT: vceqh %v6, %v25, %v29 +; CHECK-NEXT: vceqh %v7, %v27, %v31 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vn %v5, %v5, %v7 +; CHECK-NEXT: vn %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -1646,30 +1677,30 @@ define <16 x i32> @fun60(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun60: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v25, %v29 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v27, %v31 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vceqh %v16, %v24, %v28 +; CHECK-NEXT: vceqh %v17, %v26, %v30 +; CHECK-NEXT: vceqh %v18, %v25, %v29 +; CHECK-NEXT: vceqh %v19, %v27, %v31 +; CHECK-NEXT: vn %v17, %v17, %v19 +; CHECK-NEXT: vn %v16, %v16, %v18 +; CHECK-NEXT: vmrlg %v19, %v17, %v17 +; CHECK-NEXT: vmrlg %v18, %v16, %v16 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 240(%r15) ; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vuphh %v19, %v19 +; CHECK-NEXT: vuphh %v18, %v18 +; CHECK-NEXT: vuphh %v17, %v17 +; CHECK-NEXT: vuphh %v16, %v16 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v17 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v18 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v19 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -1681,24 +1712,24 @@ define <16 x i8> @fun61(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun61: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqf %v0, %v31, %v0 -; CHECK-NEXT: vceqf %v1, %v29, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqf %v1, %v27, %v1 -; CHECK-NEXT: vceqf %v2, %v25, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vceqh %v2, %v24, %v28 -; CHECK-NEXT: vn %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vceqf %v5, %v27, %v5 +; CHECK-NEXT: vceqf %v4, %v25, %v4 +; CHECK-NEXT: vceqf %v3, %v31, %v3 +; CHECK-NEXT: vceqf %v2, %v29, %v2 +; CHECK-NEXT: vceqh %v6, %v24, %v28 +; CHECK-NEXT: vceqh %v7, %v26, %v30 +; CHECK-NEXT: vpkf %v4, %v4, %v5 +; CHECK-NEXT: vpkf %v2, %v2, %v3 +; CHECK-NEXT: vn %v2, %v7, %v2 +; CHECK-NEXT: vn %v3, %v6, %v4 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vpkh %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i32> %val3, %val4 @@ -1710,54 +1741,74 @@ define <16 x i32> @fun62(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun62: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 416(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqg %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vceqg %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vuphh %v3, %v2 -; CHECK-NEXT: vn %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 448(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v3, %v29, %v3 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v3, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 336(%r15) -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vceqg %v1, %v3, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi8: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi9: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi10: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi11: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi12: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v16, 512(%r15) +; CHECK-NEXT: vl %v17, 384(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 464(%r15) +; CHECK-NEXT: vl %v22, 480(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vl %v23, 352(%r15) +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vceqg %v27, %v27, %v11 +; CHECK-NEXT: vl %v8, 496(%r15) +; CHECK-NEXT: vceqg %v25, %v25, %v10 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vl %v9, 368(%r15) +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vpkg %v25, %v25, %v27 +; CHECK-NEXT: vceqg %v27, %v9, %v8 +; CHECK-NEXT: vceqg %v22, %v23, %v22 +; CHECK-NEXT: vceqg %v21, %v31, %v21 +; CHECK-NEXT: vceqg %v20, %v29, %v20 +; CHECK-NEXT: vceqg %v18, %v19, %v18 +; CHECK-NEXT: vceqg %v16, %v17, %v16 +; CHECK-NEXT: vl %v0, 656(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v1, 592(%r15) +; CHECK-NEXT: vl %v2, 624(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v3, 560(%r15) +; CHECK-NEXT: vl %v4, 640(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v27 +; CHECK-NEXT: vl %v5, 576(%r15) +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vl %v7, 544(%r15) +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vn %v16, %v26, %v16 +; CHECK-NEXT: vn %v17, %v24, %v20 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vn %v18, %v30, %v22 +; CHECK-NEXT: vn %v19, %v28, %v25 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i64> %val3, %val4 @@ -1769,102 +1820,118 @@ define <16 x double> @fun63(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { ; CHECK-LABEL: fun63: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vmrlf %v1, %v0, %v0 -; CHECK-NEXT: vmrlf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v0, %v0, %v0 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vl %v5, 416(%r15) -; CHECK-NEXT: vl %v6, 288(%r15) -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrlf %v4, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v27, %v27 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vl %v3, 384(%r15) -; CHECK-NEXT: vn %v1, %v1, %v2 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrlf %v4, %v29, %v29 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vceqh %v3, %v26, %v30 -; CHECK-NEXT: vuphh %v4, %v3 -; CHECK-NEXT: vn %v2, %v4, %v2 -; CHECK-NEXT: vuphf %v4, %v2 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vl %v4, 208(%r15) -; CHECK-NEXT: vmrlf %v5, %v4, %v4 -; CHECK-NEXT: vmrlf %v6, %v31, %v31 -; CHECK-NEXT: vmrhf %v4, %v4, %v4 -; CHECK-NEXT: vmrlg %v3, %v3, %v3 -; CHECK-NEXT: vuphh %v3, %v3 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v5, %v6, %v5 -; CHECK-NEXT: vmrhf %v6, %v31, %v31 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v4, %v6, %v4 -; CHECK-NEXT: vl %v6, 320(%r15) -; CHECK-NEXT: vpkg %v4, %v4, %v5 -; CHECK-NEXT: vl %v5, 448(%r15) -; CHECK-NEXT: vn %v3, %v3, %v4 -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 -; CHECK-NEXT: vl %v4, 368(%r15) -; CHECK-NEXT: vl %v5, 240(%r15) -; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 -; CHECK-NEXT: vl %v4, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vmrlg %v0, %v2, %v2 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vmrlg %v0, %v3, %v3 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -184 +; CHECK-NEXT: .Lcfi13: +; CHECK-NEXT: .cfi_def_cfa_offset 344 +; CHECK-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi14: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi15: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi16: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: vl %v8, 344(%r15) +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v25, %v25 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v25, %v25, %v25 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v25, %v25 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vl %v2, 616(%r15) +; CHECK-NEXT: vl %v3, 488(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v8 +; CHECK-NEXT: vl %v8, 360(%r15) +; CHECK-NEXT: vl %v4, 584(%r15) +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vl %v5, 456(%r15) +; CHECK-NEXT: vl %v6, 552(%r15) +; CHECK-NEXT: vpkg %v25, %v25, %v9 +; CHECK-NEXT: vl %v7, 424(%r15) +; CHECK-NEXT: vl %v16, 632(%r15) +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vl %v17, 504(%r15) +; CHECK-NEXT: vl %v18, 600(%r15) +; CHECK-NEXT: vmrlf %v10, %v27, %v27 +; CHECK-NEXT: vl %v19, 472(%r15) +; CHECK-NEXT: vl %v0, 648(%r15) +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vl %v1, 520(%r15) +; CHECK-NEXT: vl %v20, 568(%r15) +; CHECK-NEXT: vmrhf %v27, %v27, %v27 +; CHECK-NEXT: vl %v21, 440(%r15) +; CHECK-NEXT: vl %v22, 536(%r15) +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vl %v23, 408(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vn %v25, %v28, %v25 +; CHECK-NEXT: vmrlg %v28, %v25, %v25 +; CHECK-NEXT: vldeb %v27, %v27 +; CHECK-NEXT: vfchdb %v27, %v27, %v8 +; CHECK-NEXT: vl %v8, 376(%r15) +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vpkg %v27, %v27, %v9 +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v29, %v29 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v29, %v29, %v29 +; CHECK-NEXT: vn %v24, %v24, %v27 +; CHECK-NEXT: vmrlg %v27, %v24, %v24 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vfchdb %v29, %v29, %v8 +; CHECK-NEXT: vl %v8, 392(%r15) +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vpkg %v29, %v29, %v9 +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v31, %v31 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v31, %v31, %v31 +; CHECK-NEXT: vn %v29, %v30, %v29 +; CHECK-NEXT: vmrlg %v30, %v29, %v29 +; CHECK-NEXT: vuphf %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v31, %v31 +; CHECK-NEXT: vfchdb %v31, %v31, %v8 +; CHECK-NEXT: vpkg %v31, %v31, %v9 +; CHECK-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vn %v26, %v26, %v31 +; CHECK-NEXT: vmrlg %v31, %v26, %v26 +; CHECK-NEXT: vuphf %v8, %v30 +; CHECK-NEXT: vuphf %v30, %v28 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vuphf %v28, %v24 +; CHECK-NEXT: vuphf %v24, %v25 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v29 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v30 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v28 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 184 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = fcmp ogt <16 x float> %val3, %val4 @@ -1876,54 +1943,74 @@ define <16 x i32> @fun64(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun64: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vn %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 416(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vuphh %v3, %v2 -; CHECK-NEXT: vn %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 448(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v3, %v29, %v3 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v3, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 336(%r15) -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vfchdb %v1, %v3, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vn %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi17: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi18: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi19: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi20: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi21: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v16, 512(%r15) +; CHECK-NEXT: vl %v17, 384(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 464(%r15) +; CHECK-NEXT: vl %v22, 480(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vl %v23, 352(%r15) +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vfchdb %v27, %v27, %v11 +; CHECK-NEXT: vl %v8, 496(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v10 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vl %v9, 368(%r15) +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vpkg %v25, %v25, %v27 +; CHECK-NEXT: vfchdb %v27, %v9, %v8 +; CHECK-NEXT: vfchdb %v22, %v23, %v22 +; CHECK-NEXT: vfchdb %v21, %v31, %v21 +; CHECK-NEXT: vfchdb %v20, %v29, %v20 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vl %v0, 656(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v1, 592(%r15) +; CHECK-NEXT: vl %v2, 624(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v3, 560(%r15) +; CHECK-NEXT: vl %v4, 640(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v27 +; CHECK-NEXT: vl %v5, 576(%r15) +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vl %v7, 544(%r15) +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vn %v16, %v26, %v16 +; CHECK-NEXT: vn %v17, %v24, %v20 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vn %v18, %v30, %v22 +; CHECK-NEXT: vn %v19, %v28, %v25 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = fcmp ogt <16 x double> %val3, %val4 @@ -1935,9 +2022,9 @@ define <2 x i8> @fun65(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { ; CHECK-LABEL: fun65: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -1950,9 +2037,9 @@ define <2 x i16> @fun66(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun66: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -1982,11 +2069,11 @@ define <2 x i32> @fun68(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun68: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -1999,12 +2086,12 @@ define <2 x i32> @fun69(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun69: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -2017,39 +2104,39 @@ define <2 x i16> @fun70(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun70: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vpkf %v0, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 -; CHECK-NEXT: br %r14 - %cmp0 = icmp eq <2 x i8> %val1, %val2 - %cmp1 = fcmp ogt <2 x float> %val3, %val4 - %and = or <2 x i1> %cmp0, %cmp1 - %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 - ret <2 x i16> %sel -} +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} define <2 x i64> @fun71(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun71: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -2062,9 +2149,9 @@ define <2 x i8> @fun72(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { ; CHECK-LABEL: fun72: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2078,9 +2165,9 @@ define <2 x i16> @fun73(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun73: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i16> %val1, %val2 @@ -2093,9 +2180,9 @@ define <2 x i32> @fun74(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun74: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2127,11 +2214,11 @@ ; CHECK-LABEL: fun76: ; CHECK: # BB#0: ; CHECK-NEXT: larl %r1, .LCPI76_0 -; CHECK-NEXT: vl %v1, 0(%r1) -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vperm %v1, %v1, %v0, %v2 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2145,20 +2232,20 @@ define <2 x double> @fun77(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { ; CHECK-LABEL: fun77: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vuphf %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2173,11 +2260,11 @@ ; CHECK-LABEL: fun78: ; CHECK: # BB#0: ; CHECK-NEXT: larl %r1, .LCPI78_0 -; CHECK-NEXT: vl %v1, 0(%r1) -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vperm %v1, %v1, %v0, %v2 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i16> %val1, %val2 @@ -2190,9 +2277,9 @@ define <2 x i16> @fun79(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun79: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2206,9 +2293,9 @@ define <2 x i32> @fun80(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun80: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i32> %val1, %val2 @@ -2221,9 +2308,9 @@ define <2 x i64> @fun81(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun81: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vuphf %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2237,10 +2324,10 @@ define <2 x i64> @fun82(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun82: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i32> %val1, %val2 @@ -2253,19 +2340,19 @@ define <2 x i16> @fun83(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun83: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2295,10 +2382,10 @@ define <2 x i16> @fun85(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun85: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 ; CHECK-NEXT: larl %r1, .LCPI85_0 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 @@ -2313,9 +2400,9 @@ define <2 x i64> @fun86(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun86: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i64> %val1, %val2 @@ -2328,20 +2415,20 @@ define <2 x i64> @fun87(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun87: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i64> %val1, %val2 @@ -2354,10 +2441,10 @@ define <2 x i16> @fun88(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun88: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 ; CHECK-NEXT: larl %r1, .LCPI88_0 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 @@ -2372,29 +2459,29 @@ define <2 x float> @fun89(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { ; CHECK-LABEL: fun89: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <2 x float> %val1, %val2 @@ -2433,9 +2520,9 @@ define <4 x i16> @fun91(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun91: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2449,9 +2536,9 @@ define <4 x i32> @fun92(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun92: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 @@ -2464,14 +2551,14 @@ define <4 x i64> @fun93(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun93: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 %cmp1 = icmp eq <4 x i32> %val3, %val4 @@ -2483,11 +2570,11 @@ define <4 x i32> @fun94(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun94: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v30, %v27 -; CHECK-NEXT: vceqg %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v27 +; CHECK-NEXT: vceqg %v2, %v28, %v25 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 @@ -2500,19 +2587,19 @@ define <4 x i16> @fun95(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun95: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2526,12 +2613,12 @@ define <4 x i8> @fun96(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { ; CHECK-LABEL: fun96: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v27 -; CHECK-NEXT: vfchdb %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v30, %v27 +; CHECK-NEXT: vfchdb %v2, %v28, %v25 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v2, %v1 ; CHECK-NEXT: larl %r1, .LCPI96_0 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 @@ -2546,16 +2633,16 @@ define <4 x i32> @fun97(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun97: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v29 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vceqg %v4, %v25, %v29 +; CHECK-NEXT: vceqg %v5, %v27, %v31 +; CHECK-NEXT: vo %v3, %v3, %v5 +; CHECK-NEXT: vo %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = icmp eq <4 x i64> %val3, %val4 @@ -2567,18 +2654,18 @@ define <4 x i64> @fun98(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun98: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v25, %v29 -; CHECK-NEXT: vceqg %v1, %v24, %v28 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqg %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v4, %v24, %v28 +; CHECK-NEXT: vceqg %v5, %v26, %v30 +; CHECK-NEXT: vceqg %v6, %v25, %v29 +; CHECK-NEXT: vceqg %v7, %v27, %v31 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vo %v5, %v5, %v7 +; CHECK-NEXT: vo %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = icmp eq <4 x i64> %val3, %val4 @@ -2590,28 +2677,28 @@ define <4 x i64> @fun99(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun99: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrlf %v5, %v25, %v25 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v27, %v27 +; CHECK-NEXT: vmrhf %v6, %v25, %v25 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v4, %v4, %v4 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vo %v3, %v3, %v4 +; CHECK-NEXT: vo %v2, %v2, %v5 +; CHECK-NEXT: vsel %v24, %v29, %v1, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = fcmp ogt <4 x float> %val3, %val4 @@ -2623,16 +2710,16 @@ define <4 x float> @fun100(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { ; CHECK-LABEL: fun100: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v29 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vfchdb %v4, %v25, %v29 +; CHECK-NEXT: vfchdb %v5, %v27, %v31 +; CHECK-NEXT: vo %v3, %v3, %v5 +; CHECK-NEXT: vo %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = fcmp ogt <4 x double> %val3, %val4 @@ -2644,29 +2731,29 @@ define <4 x i16> @fun101(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun101: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2680,29 +2767,29 @@ define <4 x float> @fun102(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { ; CHECK-LABEL: fun102: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <4 x float> %val1, %val2 @@ -2715,34 +2802,34 @@ define <4 x double> @fun103(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { ; CHECK-LABEL: fun103: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <4 x float> %val1, %val2 %cmp1 = fcmp ogt <4 x float> %val3, %val4 @@ -2754,22 +2841,22 @@ define <4 x i8> @fun104(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { ; CHECK-LABEL: fun104: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v27 -; CHECK-NEXT: vfchdb %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 ; CHECK-NEXT: larl %r1, .LCPI104_0 ; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v30, %v27 +; CHECK-NEXT: vfchdb %v2, %v28, %v25 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 @@ -2784,9 +2871,9 @@ define <8 x i8> @fun105(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { ; CHECK-LABEL: fun105: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -2800,9 +2887,9 @@ define <8 x i16> @fun106(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { ; CHECK-LABEL: fun106: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 @@ -2815,14 +2902,14 @@ define <8 x i32> @fun107(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun107: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i16> %val3, %val4 @@ -2834,30 +2921,30 @@ define <8 x i64> @fun108(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { ; CHECK-LABEL: fun108: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vceqf %v0, %v28, %v25 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 -; CHECK-NEXT: vceqf %v0, %v30, %v27 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v6, %v24, %v26 +; CHECK-NEXT: vuphh %v7, %v6 +; CHECK-NEXT: vmrlg %v6, %v6, %v6 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vceqf %v16, %v28, %v25 +; CHECK-NEXT: vceqf %v17, %v30, %v27 +; CHECK-NEXT: vo %v6, %v6, %v17 +; CHECK-NEXT: vo %v7, %v7, %v16 +; CHECK-NEXT: vmrlg %v17, %v6, %v6 +; CHECK-NEXT: vmrlg %v16, %v7, %v7 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) ; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vuphf %v17, %v17 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vuphf %v16, %v16 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vsel %v24, %v29, %v5, %v7 +; CHECK-NEXT: vsel %v26, %v31, %v4, %v16 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v6 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v17 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i32> %val3, %val4 @@ -2869,21 +2956,21 @@ define <8 x i8> @fun109(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { ; CHECK-LABEL: fun109: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v30, %v31 -; CHECK-NEXT: vceqg %v2, %v28, %v29 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vlrepg %v1, 200(%r15) -; CHECK-NEXT: vlrepg %v2, 192(%r15) -; CHECK-NEXT: vpkh %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vceqg %v3, %v27, %v3 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqg %v3, %v30, %v31 +; CHECK-NEXT: vceqg %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v3, %v5, %v3 +; CHECK-NEXT: vceqh %v4, %v24, %v26 +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vo %v2, %v4, %v2 +; CHECK-NEXT: vlrepg %v0, 200(%r15) +; CHECK-NEXT: vlrepg %v1, 192(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i64> %val3, %val4 @@ -2895,31 +2982,31 @@ define <8 x i16> @fun110(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { ; CHECK-LABEL: fun110: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vmrhf %v4, %v28, %v28 +; CHECK-NEXT: vceqh %v0, %v24, %v26 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vmrlf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v25, %v25 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 @@ -2932,26 +3019,26 @@ define <8 x i32> @fun111(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun111: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vceqh %v6, %v24, %v26 +; CHECK-NEXT: vuphh %v7, %v6 +; CHECK-NEXT: vmrlg %v6, %v6, %v6 +; CHECK-NEXT: vfchdb %v16, %v30, %v31 +; CHECK-NEXT: vfchdb %v17, %v28, %v29 +; CHECK-NEXT: vfchdb %v5, %v27, %v5 +; CHECK-NEXT: vfchdb %v4, %v25, %v4 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vpkg %v16, %v17, %v16 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) ; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vo %v4, %v6, %v4 +; CHECK-NEXT: vo %v5, %v7, %v16 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -2963,26 +3050,26 @@ define <8 x i32> @fun112(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun112: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vl %v6, 160(%r15) +; CHECK-NEXT: vl %v7, 176(%r15) +; CHECK-NEXT: vceqg %v7, %v27, %v7 +; CHECK-NEXT: vceqg %v6, %v25, %v6 +; CHECK-NEXT: vceqg %v5, %v31, %v5 +; CHECK-NEXT: vceqg %v4, %v29, %v4 +; CHECK-NEXT: vceqf %v16, %v24, %v28 +; CHECK-NEXT: vceqf %v17, %v26, %v30 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vo %v4, %v17, %v4 +; CHECK-NEXT: vo %v5, %v16, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = icmp eq <8 x i64> %val3, %val4 @@ -2994,50 +3081,50 @@ define <8 x double> @fun113(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { ; CHECK-LABEL: fun113: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v29, %v29 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v29, %v29 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v31, %v31 -; CHECK-NEXT: vmrlf %v2, %v27, %v27 -; CHECK-NEXT: vmrhf %v3, %v27, %v27 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v31, %v31 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vceqf %v2, %v26, %v30 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vmrlf %v18, %v29, %v29 +; CHECK-NEXT: vmrlf %v19, %v25, %v25 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vmrhf %v19, %v29, %v29 +; CHECK-NEXT: vmrhf %v20, %v25, %v25 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 240(%r15) ; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vpkg %v18, %v19, %v18 +; CHECK-NEXT: vmrlf %v19, %v31, %v31 +; CHECK-NEXT: vmrlf %v20, %v27, %v27 +; CHECK-NEXT: vmrhf %v21, %v27, %v27 +; CHECK-NEXT: vceqf %v16, %v24, %v28 +; CHECK-NEXT: vceqf %v17, %v26, %v30 +; CHECK-NEXT: vo %v16, %v16, %v18 +; CHECK-NEXT: vmrlg %v18, %v16, %v16 +; CHECK-NEXT: vuphf %v18, %v18 +; CHECK-NEXT: vuphf %v16, %v16 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vmrhf %v20, %v31, %v31 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vpkg %v19, %v20, %v19 +; CHECK-NEXT: vo %v17, %v17, %v19 +; CHECK-NEXT: vmrlg %v19, %v17, %v17 +; CHECK-NEXT: vuphf %v19, %v19 +; CHECK-NEXT: vuphf %v17, %v17 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v19 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = fcmp ogt <8 x float> %val3, %val4 @@ -3049,38 +3136,38 @@ define <8 x double> @fun114(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { ; CHECK-LABEL: fun114: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vfchdb %v0, %v25, %v0 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 224(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vceqf %v2, %v26, %v30 -; CHECK-NEXT: vfchdb %v0, %v29, %v0 -; CHECK-NEXT: vuphf %v3, %v2 -; CHECK-NEXT: vo %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vceqf %v20, %v24, %v28 +; CHECK-NEXT: vceqf %v22, %v26, %v30 +; CHECK-NEXT: vl %v16, 208(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 160(%r15) +; CHECK-NEXT: vuphf %v21, %v20 +; CHECK-NEXT: vuphf %v23, %v22 +; CHECK-NEXT: vmrlg %v20, %v20, %v20 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vfchdb %v19, %v25, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v31, %v16 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) ; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vl %v7, 224(%r15) +; CHECK-NEXT: vo %v16, %v22, %v16 +; CHECK-NEXT: vo %v17, %v20, %v17 +; CHECK-NEXT: vo %v18, %v23, %v18 +; CHECK-NEXT: vo %v19, %v21, %v19 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -3092,58 +3179,58 @@ define <8 x i64> @fun115(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { ; CHECK-LABEL: fun115: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 224(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vo %v1, %v1, %v2 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vfchdb %v3, %v29, %v3 -; CHECK-NEXT: vo %v2, %v2, %v3 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vfchdb %v2, %v27, %v2 -; CHECK-NEXT: vo %v0, %v0, %v2 +; CHECK-NEXT: vmrlf %v20, %v28, %v28 +; CHECK-NEXT: vmrlf %v21, %v24, %v24 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vmrhf %v21, %v28, %v28 +; CHECK-NEXT: vmrhf %v22, %v24, %v24 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vl %v16, 208(%r15) +; CHECK-NEXT: vldeb %v22, %v22 +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 160(%r15) +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vfchdb %v21, %v22, %v21 ; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vfchdb %v1, %v31, %v1 -; CHECK-NEXT: vo %v0, %v0, %v1 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vmrlf %v22, %v30, %v30 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vmrlf %v23, %v26, %v26 +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vl %v7, 224(%r15) +; CHECK-NEXT: vldeb %v22, %v22 +; CHECK-NEXT: vmrhf %v24, %v26, %v26 +; CHECK-NEXT: vpkg %v20, %v21, %v20 +; CHECK-NEXT: vuphf %v21, %v20 +; CHECK-NEXT: vmrlg %v20, %v20, %v20 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v25, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v31, %v16 +; CHECK-NEXT: vo %v17, %v20, %v17 +; CHECK-NEXT: vo %v19, %v21, %v19 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vldeb %v23, %v23 +; CHECK-NEXT: vfchdb %v22, %v23, %v22 +; CHECK-NEXT: vmrhf %v23, %v30, %v30 +; CHECK-NEXT: vldeb %v23, %v23 +; CHECK-NEXT: vldeb %v24, %v24 +; CHECK-NEXT: vfchdb %v23, %v24, %v23 +; CHECK-NEXT: vpkg %v22, %v23, %v22 +; CHECK-NEXT: vuphf %v23, %v22 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vo %v16, %v22, %v16 +; CHECK-NEXT: vo %v18, %v23, %v18 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <8 x float> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -3155,9 +3242,9 @@ define <16 x i8> @fun116(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun116: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 @@ -3170,14 +3257,14 @@ define <16 x i16> @fun117(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun117: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i8> %val3, %val4 @@ -3189,59 +3276,70 @@ define <16 x i64> @fun118(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun118: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vceqh %v0, %v28, %v25 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vuphh %v2, %v0 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v3, 288(%r15) -; CHECK-NEXT: vl %v4, 160(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vceqh %v2, %v30, %v27 -; CHECK-NEXT: vlr %v30, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vo %v1, %v1, %v2 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 -; CHECK-NEXT: vl %v3, 336(%r15) -; CHECK-NEXT: vl %v4, 208(%r15) -; CHECK-NEXT: vpkg %v2, %v1, %v1 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vmrlg %v2, %v1, %v1 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi22: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi23: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi24: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vceqb %v22, %v24, %v26 +; CHECK-NEXT: vuphb %v23, %v22 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphb %v22, %v22 +; CHECK-NEXT: vceqh %v24, %v28, %v25 +; CHECK-NEXT: vceqh %v25, %v30, %v27 +; CHECK-NEXT: vo %v22, %v22, %v25 +; CHECK-NEXT: vsldb %v25, %v22, %v22, 12 +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vuphf %v8, %v25 +; CHECK-NEXT: vmrlg %v25, %v22, %v22 +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vo %v23, %v23, %v24 +; CHECK-NEXT: vl %v0, 544(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vpkg %v25, %v22, %v22 +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 432(%r15) +; CHECK-NEXT: vsldb %v24, %v23, %v23, 12 +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vl %v6, 496(%r15) +; CHECK-NEXT: vl %v7, 368(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v16, 480(%r15) +; CHECK-NEXT: vl %v17, 352(%r15) +; CHECK-NEXT: vuphf %v27, %v25 +; CHECK-NEXT: vl %v18, 464(%r15) +; CHECK-NEXT: vl %v19, 336(%r15) +; CHECK-NEXT: vuphf %v25, %v24 +; CHECK-NEXT: vmrlg %v24, %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphf %v28, %v24 +; CHECK-NEXT: vpkg %v24, %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vuphh %v22, %v22 +; CHECK-NEXT: vuphf %v26, %v24 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vsel %v24, %v29, %v21, %v23 +; CHECK-NEXT: vsel %v26, %v31, %v20, %v26 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v9 +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v31, %v1, %v0, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vsel %v30, %v17, %v16, %v25 +; CHECK-NEXT: vsel %v25, %v7, %v6, %v22 +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -3253,64 +3351,84 @@ define <16 x i64> @fun119(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun119: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vceqf %v0, %v28, %v29 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vl %v3, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vpkg %v2, %v1, %v1 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vl %v5, 256(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vmrlg %v3, %v1, %v1 -; CHECK-NEXT: vuphb %v3, %v3 -; CHECK-NEXT: vceqf %v2, %v25, %v2 -; CHECK-NEXT: vuphh %v3, %v3 -; CHECK-NEXT: vo %v2, %v3, %v2 -; CHECK-NEXT: vuphf %v3, %v2 -; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 -; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vl %v4, 416(%r15) -; CHECK-NEXT: vl %v5, 288(%r15) -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vceqf %v3, %v27, %v3 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v1, %v1, %v3 -; CHECK-NEXT: vuphf %v3, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vl %v4, 240(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi25: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi26: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi27: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi28: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi29: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vceqb %v24, %v24, %v26 +; CHECK-NEXT: vuphb %v26, %v24 +; CHECK-NEXT: vpkg %v10, %v24, %v24 +; CHECK-NEXT: vmrlg %v11, %v24, %v24 +; CHECK-NEXT: vsldb %v24, %v24, %v24, 12 +; CHECK-NEXT: vl %v8, 368(%r15) +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vl %v9, 352(%r15) +; CHECK-NEXT: vuphb %v10, %v10 +; CHECK-NEXT: vuphb %v11, %v11 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vceqf %v27, %v27, %v8 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vuphh %v10, %v10 +; CHECK-NEXT: vuphh %v11, %v11 +; CHECK-NEXT: vceqf %v28, %v28, %v29 +; CHECK-NEXT: vceqf %v29, %v30, %v31 +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vl %v7, 480(%r15) +; CHECK-NEXT: vceqf %v25, %v25, %v9 +; CHECK-NEXT: vl %v18, 544(%r15) +; CHECK-NEXT: vl %v19, 416(%r15) +; CHECK-NEXT: vo %v24, %v24, %v27 +; CHECK-NEXT: vl %v0, 624(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vmrlg %v27, %v24, %v24 +; CHECK-NEXT: vl %v2, 592(%r15) +; CHECK-NEXT: vl %v3, 464(%r15) +; CHECK-NEXT: vo %v25, %v11, %v25 +; CHECK-NEXT: vl %v4, 560(%r15) +; CHECK-NEXT: vl %v5, 432(%r15) +; CHECK-NEXT: vo %v29, %v10, %v29 +; CHECK-NEXT: vl %v16, 576(%r15) +; CHECK-NEXT: vl %v17, 448(%r15) +; CHECK-NEXT: vuphf %v8, %v24 +; CHECK-NEXT: vl %v20, 528(%r15) +; CHECK-NEXT: vl %v21, 400(%r15) +; CHECK-NEXT: vo %v24, %v26, %v28 +; CHECK-NEXT: vl %v22, 512(%r15) +; CHECK-NEXT: vl %v23, 384(%r15) +; CHECK-NEXT: vuphf %v31, %v27 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vmrlg %v27, %v25, %v25 +; CHECK-NEXT: vmrlg %v30, %v29, %v29 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vuphf %v29, %v29 +; CHECK-NEXT: vmrlg %v26, %v24, %v24 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v30, %v30 +; CHECK-NEXT: vuphf %v25, %v25 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v19, %v18, %v29 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v8 +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v25, %v17, %v16, %v25 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v30 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v27 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i32> %val3, %val4 @@ -3322,88 +3440,88 @@ define <16 x i64> @fun120(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun120: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vceqg %v1, %v28, %v0 -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v4, %v1 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v28, %v3 +; CHECK-NEXT: vuphf %v4, %v4 ; CHECK-NEXT: vl %v2, 448(%r15) -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vpkf %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v30, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vo %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vsel %v24, %v4, %v2, %v3 +; CHECK-NEXT: vpkf %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v30, %v3 +; CHECK-NEXT: vuphf %v4, %v4 ; CHECK-NEXT: vl %v2, 464(%r15) -; CHECK-NEXT: vl %v3, 336(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vo %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 336(%r15) +; CHECK-NEXT: vsel %v26, %v4, %v2, %v3 +; CHECK-NEXT: vpkg %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vl %v3, 224(%r15) ; CHECK-NEXT: vl %v2, 480(%r15) -; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v27, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vl %v0, 544(%r15) +; CHECK-NEXT: vceqg %v3, %v25, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vo %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 352(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) ; CHECK-NEXT: vl %v2, 496(%r15) -; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v3, 384(%r15) -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v4, %v1, %v1, 6 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v27, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vo %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vsel %v30, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 256(%r15) ; CHECK-NEXT: vl %v2, 512(%r15) -; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v3, 400(%r15) -; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v31, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vmrlg %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vo %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v25, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 272(%r15) ; CHECK-NEXT: vl %v2, 528(%r15) -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 288(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsldb %v4, %v1, %v1, 10 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v31, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vo %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 400(%r15) +; CHECK-NEXT: vsel %v27, %v4, %v2, %v3 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vsldb %v3, %v1, %v1, 12 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 14 +; CHECK-NEXT: vo %v2, %v3, %v2 ; CHECK-NEXT: vl %v3, 416(%r15) -; CHECK-NEXT: vceqg %v1, %v2, %v1 -; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 544(%r15) -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsel %v29, %v3, %v0, %v2 +; CHECK-NEXT: vl %v0, 304(%r15) ; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 432(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vo %v0, %v0, %v1 -; CHECK-NEXT: vl %v1, 560(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 560(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v2, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i64> %val3, %val4 @@ -3415,66 +3533,66 @@ define <16 x i16> @fun121(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun121: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vmrlf %v4, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v29, %v29 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrlf %v7, %v30, %v30 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vmrhf %v7, %v31, %v31 +; CHECK-NEXT: vmrhf %v16, %v30, %v30 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vmrlf %v2, %v0, %v0 -; CHECK-NEXT: vmrlf %v3, %v27, %v27 -; CHECK-NEXT: vmrhf %v0, %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vmrhf %v3, %v27, %v27 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v0, %v3, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v2 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vpkf %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vpkg %v6, %v7, %v6 +; CHECK-NEXT: vmrlf %v7, %v29, %v29 +; CHECK-NEXT: vmrlf %v16, %v28, %v28 +; CHECK-NEXT: vmrhf %v17, %v28, %v28 +; CHECK-NEXT: vmrlf %v18, %v25, %v25 +; CHECK-NEXT: vceqb %v4, %v24, %v26 +; CHECK-NEXT: vuphb %v5, %v4 +; CHECK-NEXT: vmrlg %v4, %v4, %v4 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vmrhf %v16, %v29, %v29 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vpkg %v7, %v16, %v7 +; CHECK-NEXT: vpkf %v6, %v7, %v6 +; CHECK-NEXT: vl %v7, 176(%r15) +; CHECK-NEXT: vmrlf %v16, %v7, %v7 +; CHECK-NEXT: vmrlf %v17, %v27, %v27 +; CHECK-NEXT: vmrhf %v7, %v7, %v7 +; CHECK-NEXT: vo %v5, %v5, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vmrhf %v17, %v27, %v27 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v7, %v17, %v7 +; CHECK-NEXT: vpkg %v7, %v7, %v16 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vmrlf %v17, %v16, %v16 +; CHECK-NEXT: vmrhf %v16, %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vmrhf %v18, %v25, %v25 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v16, %v18, %v16 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkf %v7, %v16, %v7 +; CHECK-NEXT: vo %v4, %v4, %v7 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = fcmp ogt <16 x float> %val3, %val4 @@ -3486,36 +3604,36 @@ define <16 x i8> @fun122(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun122: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 288(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v31, %v1 -; CHECK-NEXT: vfchdb %v2, %v29, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vfchdb %v1, %v27, %v1 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vfchdb %v2, %v30, %v2 -; CHECK-NEXT: vfchdb %v3, %v28, %v3 -; CHECK-NEXT: vpkg %v2, %v3, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vl %v6, 256(%r15) +; CHECK-NEXT: vl %v7, 272(%r15) +; CHECK-NEXT: vl %v16, 288(%r15) +; CHECK-NEXT: vl %v17, 160(%r15) +; CHECK-NEXT: vl %v18, 304(%r15) +; CHECK-NEXT: vl %v19, 176(%r15) +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vfchdb %v7, %v31, %v7 +; CHECK-NEXT: vfchdb %v6, %v29, %v6 +; CHECK-NEXT: vfchdb %v5, %v27, %v5 +; CHECK-NEXT: vfchdb %v4, %v25, %v4 +; CHECK-NEXT: vfchdb %v3, %v30, %v3 +; CHECK-NEXT: vfchdb %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v6, %v6, %v16 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vpkf %v2, %v2, %v4 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqb %v20, %v24, %v26 +; CHECK-NEXT: vpkh %v2, %v2, %v6 +; CHECK-NEXT: vo %v2, %v20, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = fcmp ogt <16 x double> %val3, %val4 @@ -3527,16 +3645,16 @@ define <16 x i8> @fun123(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun123: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v27, %v31 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v25, %v29 ; CHECK-NEXT: vceqh %v2, %v24, %v28 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vceqh %v4, %v25, %v29 +; CHECK-NEXT: vceqh %v5, %v27, %v31 +; CHECK-NEXT: vo %v3, %v3, %v5 +; CHECK-NEXT: vo %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -3548,18 +3666,18 @@ define <16 x i16> @fun124(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun124: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v25, %v29 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqh %v0, %v27, %v31 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v4, %v24, %v28 +; CHECK-NEXT: vceqh %v5, %v26, %v30 +; CHECK-NEXT: vceqh %v6, %v25, %v29 +; CHECK-NEXT: vceqh %v7, %v27, %v31 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vo %v5, %v5, %v7 +; CHECK-NEXT: vo %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -3571,30 +3689,30 @@ define <16 x i32> @fun125(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun125: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v25, %v29 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v27, %v31 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vceqh %v16, %v24, %v28 +; CHECK-NEXT: vceqh %v17, %v26, %v30 +; CHECK-NEXT: vceqh %v18, %v25, %v29 +; CHECK-NEXT: vceqh %v19, %v27, %v31 +; CHECK-NEXT: vo %v17, %v17, %v19 +; CHECK-NEXT: vo %v16, %v16, %v18 +; CHECK-NEXT: vmrlg %v19, %v17, %v17 +; CHECK-NEXT: vmrlg %v18, %v16, %v16 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 240(%r15) ; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vuphh %v19, %v19 +; CHECK-NEXT: vuphh %v18, %v18 +; CHECK-NEXT: vuphh %v17, %v17 +; CHECK-NEXT: vuphh %v16, %v16 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v17 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v18 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v19 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -3606,24 +3724,24 @@ define <16 x i8> @fun126(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun126: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqf %v0, %v31, %v0 -; CHECK-NEXT: vceqf %v1, %v29, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqf %v1, %v27, %v1 -; CHECK-NEXT: vceqf %v2, %v25, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vceqh %v2, %v24, %v28 -; CHECK-NEXT: vo %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vceqf %v5, %v27, %v5 +; CHECK-NEXT: vceqf %v4, %v25, %v4 +; CHECK-NEXT: vceqf %v3, %v31, %v3 +; CHECK-NEXT: vceqf %v2, %v29, %v2 +; CHECK-NEXT: vceqh %v6, %v24, %v28 +; CHECK-NEXT: vceqh %v7, %v26, %v30 +; CHECK-NEXT: vpkf %v4, %v4, %v5 +; CHECK-NEXT: vpkf %v2, %v2, %v3 +; CHECK-NEXT: vo %v2, %v7, %v2 +; CHECK-NEXT: vo %v3, %v6, %v4 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vpkh %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i32> %val3, %val4 @@ -3635,54 +3753,74 @@ define <16 x i32> @fun127(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun127: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 416(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqg %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vceqg %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vuphh %v3, %v2 -; CHECK-NEXT: vo %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 448(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v3, %v29, %v3 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v3, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 336(%r15) -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vceqg %v1, %v3, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi30: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi31: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi32: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi33: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi34: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v16, 512(%r15) +; CHECK-NEXT: vl %v17, 384(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 464(%r15) +; CHECK-NEXT: vl %v22, 480(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vl %v23, 352(%r15) +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vceqg %v27, %v27, %v11 +; CHECK-NEXT: vl %v8, 496(%r15) +; CHECK-NEXT: vceqg %v25, %v25, %v10 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vl %v9, 368(%r15) +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vpkg %v25, %v25, %v27 +; CHECK-NEXT: vceqg %v27, %v9, %v8 +; CHECK-NEXT: vceqg %v22, %v23, %v22 +; CHECK-NEXT: vceqg %v21, %v31, %v21 +; CHECK-NEXT: vceqg %v20, %v29, %v20 +; CHECK-NEXT: vceqg %v18, %v19, %v18 +; CHECK-NEXT: vceqg %v16, %v17, %v16 +; CHECK-NEXT: vl %v0, 656(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v1, 592(%r15) +; CHECK-NEXT: vl %v2, 624(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v3, 560(%r15) +; CHECK-NEXT: vl %v4, 640(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v27 +; CHECK-NEXT: vl %v5, 576(%r15) +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vl %v7, 544(%r15) +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vo %v16, %v26, %v16 +; CHECK-NEXT: vo %v17, %v24, %v20 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vo %v18, %v30, %v22 +; CHECK-NEXT: vo %v19, %v28, %v25 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i64> %val3, %val4 @@ -3694,102 +3832,118 @@ define <16 x double> @fun128(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { ; CHECK-LABEL: fun128: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vmrlf %v1, %v0, %v0 -; CHECK-NEXT: vmrlf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v0, %v0, %v0 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vl %v5, 416(%r15) -; CHECK-NEXT: vl %v6, 288(%r15) -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrlf %v4, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v27, %v27 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vl %v3, 384(%r15) -; CHECK-NEXT: vo %v1, %v1, %v2 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrlf %v4, %v29, %v29 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vceqh %v3, %v26, %v30 -; CHECK-NEXT: vuphh %v4, %v3 -; CHECK-NEXT: vo %v2, %v4, %v2 -; CHECK-NEXT: vuphf %v4, %v2 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vl %v4, 208(%r15) -; CHECK-NEXT: vmrlf %v5, %v4, %v4 -; CHECK-NEXT: vmrlf %v6, %v31, %v31 -; CHECK-NEXT: vmrhf %v4, %v4, %v4 -; CHECK-NEXT: vmrlg %v3, %v3, %v3 -; CHECK-NEXT: vuphh %v3, %v3 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v5, %v6, %v5 -; CHECK-NEXT: vmrhf %v6, %v31, %v31 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v4, %v6, %v4 -; CHECK-NEXT: vl %v6, 320(%r15) -; CHECK-NEXT: vpkg %v4, %v4, %v5 -; CHECK-NEXT: vl %v5, 448(%r15) -; CHECK-NEXT: vo %v3, %v3, %v4 -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 -; CHECK-NEXT: vl %v4, 368(%r15) -; CHECK-NEXT: vl %v5, 240(%r15) -; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 -; CHECK-NEXT: vl %v4, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vmrlg %v0, %v2, %v2 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vmrlg %v0, %v3, %v3 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -184 +; CHECK-NEXT: .Lcfi35: +; CHECK-NEXT: .cfi_def_cfa_offset 344 +; CHECK-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi36: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi37: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi38: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: vl %v8, 344(%r15) +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v25, %v25 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v25, %v25, %v25 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v25, %v25 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vl %v2, 616(%r15) +; CHECK-NEXT: vl %v3, 488(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v8 +; CHECK-NEXT: vl %v8, 360(%r15) +; CHECK-NEXT: vl %v4, 584(%r15) +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vl %v5, 456(%r15) +; CHECK-NEXT: vl %v6, 552(%r15) +; CHECK-NEXT: vpkg %v25, %v25, %v9 +; CHECK-NEXT: vl %v7, 424(%r15) +; CHECK-NEXT: vl %v16, 632(%r15) +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vl %v17, 504(%r15) +; CHECK-NEXT: vl %v18, 600(%r15) +; CHECK-NEXT: vmrlf %v10, %v27, %v27 +; CHECK-NEXT: vl %v19, 472(%r15) +; CHECK-NEXT: vl %v0, 648(%r15) +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vl %v1, 520(%r15) +; CHECK-NEXT: vl %v20, 568(%r15) +; CHECK-NEXT: vmrhf %v27, %v27, %v27 +; CHECK-NEXT: vl %v21, 440(%r15) +; CHECK-NEXT: vl %v22, 536(%r15) +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vl %v23, 408(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vo %v25, %v28, %v25 +; CHECK-NEXT: vmrlg %v28, %v25, %v25 +; CHECK-NEXT: vldeb %v27, %v27 +; CHECK-NEXT: vfchdb %v27, %v27, %v8 +; CHECK-NEXT: vl %v8, 376(%r15) +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vpkg %v27, %v27, %v9 +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v29, %v29 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v29, %v29, %v29 +; CHECK-NEXT: vo %v24, %v24, %v27 +; CHECK-NEXT: vmrlg %v27, %v24, %v24 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vfchdb %v29, %v29, %v8 +; CHECK-NEXT: vl %v8, 392(%r15) +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vpkg %v29, %v29, %v9 +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v31, %v31 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v31, %v31, %v31 +; CHECK-NEXT: vo %v29, %v30, %v29 +; CHECK-NEXT: vmrlg %v30, %v29, %v29 +; CHECK-NEXT: vuphf %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v31, %v31 +; CHECK-NEXT: vfchdb %v31, %v31, %v8 +; CHECK-NEXT: vpkg %v31, %v31, %v9 +; CHECK-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vo %v26, %v26, %v31 +; CHECK-NEXT: vmrlg %v31, %v26, %v26 +; CHECK-NEXT: vuphf %v8, %v30 +; CHECK-NEXT: vuphf %v30, %v28 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vuphf %v28, %v24 +; CHECK-NEXT: vuphf %v24, %v25 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v29 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v30 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v28 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 184 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = fcmp ogt <16 x float> %val3, %val4 @@ -3801,54 +3955,74 @@ define <16 x i32> @fun129(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun129: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vo %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 416(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vuphh %v3, %v2 -; CHECK-NEXT: vo %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 448(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v3, %v29, %v3 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v3, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 336(%r15) -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vfchdb %v1, %v3, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vo %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi39: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi40: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi41: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi42: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi43: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v16, 512(%r15) +; CHECK-NEXT: vl %v17, 384(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 464(%r15) +; CHECK-NEXT: vl %v22, 480(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vl %v23, 352(%r15) +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vfchdb %v27, %v27, %v11 +; CHECK-NEXT: vl %v8, 496(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v10 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vl %v9, 368(%r15) +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vpkg %v25, %v25, %v27 +; CHECK-NEXT: vfchdb %v27, %v9, %v8 +; CHECK-NEXT: vfchdb %v22, %v23, %v22 +; CHECK-NEXT: vfchdb %v21, %v31, %v21 +; CHECK-NEXT: vfchdb %v20, %v29, %v20 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vl %v0, 656(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v1, 592(%r15) +; CHECK-NEXT: vl %v2, 624(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v3, 560(%r15) +; CHECK-NEXT: vl %v4, 640(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v27 +; CHECK-NEXT: vl %v5, 576(%r15) +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vl %v7, 544(%r15) +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vo %v16, %v26, %v16 +; CHECK-NEXT: vo %v17, %v24, %v20 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vo %v18, %v30, %v22 +; CHECK-NEXT: vo %v19, %v28, %v25 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = fcmp ogt <16 x double> %val3, %val4 @@ -3860,9 +4034,9 @@ define <2 x i8> @fun130(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { ; CHECK-LABEL: fun130: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -3875,9 +4049,9 @@ define <2 x i16> @fun131(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun131: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -3907,11 +4081,11 @@ define <2 x i32> @fun133(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun133: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -3924,12 +4098,12 @@ define <2 x i32> @fun134(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun134: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -3942,21 +4116,21 @@ define <2 x i16> @fun135(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun135: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vpkf %v0, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -3969,12 +4143,12 @@ define <2 x i64> @fun136(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun136: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i8> %val1, %val2 @@ -3987,9 +4161,9 @@ define <2 x i8> @fun137(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { ; CHECK-LABEL: fun137: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4003,9 +4177,9 @@ define <2 x i16> @fun138(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun138: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i16> %val1, %val2 @@ -4018,9 +4192,9 @@ define <2 x i32> @fun139(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun139: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4052,11 +4226,11 @@ ; CHECK-LABEL: fun141: ; CHECK: # BB#0: ; CHECK-NEXT: larl %r1, .LCPI141_0 -; CHECK-NEXT: vl %v1, 0(%r1) -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vperm %v1, %v1, %v0, %v2 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4070,20 +4244,20 @@ define <2 x double> @fun142(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { ; CHECK-LABEL: fun142: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vuphf %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4098,11 +4272,11 @@ ; CHECK-LABEL: fun143: ; CHECK: # BB#0: ; CHECK-NEXT: larl %r1, .LCPI143_0 -; CHECK-NEXT: vl %v1, 0(%r1) -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vperm %v1, %v1, %v0, %v2 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i16> %val1, %val2 @@ -4115,9 +4289,9 @@ define <2 x i16> @fun144(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun144: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4131,9 +4305,9 @@ define <2 x i32> @fun145(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { ; CHECK-LABEL: fun145: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i32> %val1, %val2 @@ -4146,9 +4320,9 @@ define <2 x i64> @fun146(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun146: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vuphf %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4162,10 +4336,10 @@ define <2 x i64> @fun147(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun147: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i32> %val1, %val2 @@ -4178,19 +4352,19 @@ define <2 x i16> @fun148(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun148: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4220,10 +4394,10 @@ define <2 x i16> @fun150(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun150: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 ; CHECK-NEXT: larl %r1, .LCPI150_0 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 @@ -4238,9 +4412,9 @@ define <2 x i64> @fun151(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun151: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vceqg %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i64> %val1, %val2 @@ -4253,20 +4427,20 @@ define <2 x i64> @fun152(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { ; CHECK-LABEL: fun152: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <2 x i64> %val1, %val2 @@ -4279,10 +4453,10 @@ define <2 x i16> @fun153(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { ; CHECK-LABEL: fun153: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v28, %v30 -; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 ; CHECK-NEXT: larl %r1, .LCPI153_0 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 @@ -4297,29 +4471,29 @@ define <2 x float> @fun154(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { ; CHECK-LABEL: fun154: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <2 x float> %val1, %val2 @@ -4358,9 +4532,9 @@ define <4 x i16> @fun156(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun156: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4374,9 +4548,9 @@ define <4 x i32> @fun157(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun157: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 @@ -4389,14 +4563,14 @@ define <4 x i64> @fun158(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun158: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v28, %v30 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 %cmp1 = icmp eq <4 x i32> %val3, %val4 @@ -4408,11 +4582,11 @@ define <4 x i32> @fun159(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun159: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v30, %v27 -; CHECK-NEXT: vceqg %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v27 +; CHECK-NEXT: vceqg %v2, %v28, %v25 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i32> %val1, %val2 @@ -4425,19 +4599,19 @@ define <4 x i16> @fun160(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun160: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4451,12 +4625,12 @@ define <4 x i8> @fun161(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { ; CHECK-LABEL: fun161: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v27 -; CHECK-NEXT: vfchdb %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vfchdb %v1, %v30, %v27 +; CHECK-NEXT: vfchdb %v2, %v28, %v25 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v2, %v1 ; CHECK-NEXT: larl %r1, .LCPI161_0 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 @@ -4471,16 +4645,16 @@ define <4 x i32> @fun162(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { ; CHECK-LABEL: fun162: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v29 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vceqg %v4, %v25, %v29 +; CHECK-NEXT: vceqg %v5, %v27, %v31 +; CHECK-NEXT: vx %v3, %v3, %v5 +; CHECK-NEXT: vx %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = icmp eq <4 x i64> %val3, %val4 @@ -4492,18 +4666,18 @@ define <4 x i64> @fun163(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun163: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v25, %v29 -; CHECK-NEXT: vceqg %v1, %v24, %v28 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqg %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v4, %v24, %v28 +; CHECK-NEXT: vceqg %v5, %v26, %v30 +; CHECK-NEXT: vceqg %v6, %v25, %v29 +; CHECK-NEXT: vceqg %v7, %v27, %v31 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vx %v5, %v5, %v7 +; CHECK-NEXT: vx %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = icmp eq <4 x i64> %val3, %val4 @@ -4515,28 +4689,28 @@ define <4 x i64> @fun164(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { ; CHECK-LABEL: fun164: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrlf %v5, %v25, %v25 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v27, %v27 +; CHECK-NEXT: vmrhf %v6, %v25, %v25 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v4, %v4, %v4 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vx %v3, %v3, %v4 +; CHECK-NEXT: vx %v2, %v2, %v5 +; CHECK-NEXT: vsel %v24, %v29, %v1, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = fcmp ogt <4 x float> %val3, %val4 @@ -4548,16 +4722,16 @@ define <4 x float> @fun165(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { ; CHECK-LABEL: fun165: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v27, %v31 -; CHECK-NEXT: vceqg %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v29 ; CHECK-NEXT: vceqg %v2, %v24, %v28 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v3, %v26, %v30 +; CHECK-NEXT: vfchdb %v4, %v25, %v29 +; CHECK-NEXT: vfchdb %v5, %v27, %v31 +; CHECK-NEXT: vx %v3, %v3, %v5 +; CHECK-NEXT: vx %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <4 x i64> %val1, %val2 %cmp1 = fcmp ogt <4 x double> %val3, %val4 @@ -4569,29 +4743,29 @@ define <4 x i16> @fun166(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { ; CHECK-LABEL: fun166: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkf %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4605,29 +4779,29 @@ define <4 x float> @fun167(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { ; CHECK-LABEL: fun167: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <4 x float> %val1, %val2 @@ -4640,34 +4814,34 @@ define <4 x double> @fun168(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { ; CHECK-LABEL: fun168: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <4 x float> %val1, %val2 %cmp1 = fcmp ogt <4 x float> %val3, %val4 @@ -4679,22 +4853,22 @@ define <4 x i8> @fun169(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { ; CHECK-LABEL: fun169: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v27 -; CHECK-NEXT: vfchdb %v1, %v28, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 ; CHECK-NEXT: larl %r1, .LCPI169_0 ; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v30, %v27 +; CHECK-NEXT: vfchdb %v2, %v28, %v25 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vl %v1, 0(%r1) ; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 @@ -4709,9 +4883,9 @@ define <8 x i8> @fun170(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { ; CHECK-LABEL: fun170: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vpkh %v0, %v0, %v0 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 @@ -4725,9 +4899,9 @@ define <8 x i16> @fun171(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { ; CHECK-LABEL: fun171: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 @@ -4740,14 +4914,14 @@ define <8 x i32> @fun172(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun172: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v28, %v30 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i16> %val3, %val4 @@ -4759,30 +4933,30 @@ define <8 x i64> @fun173(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { ; CHECK-LABEL: fun173: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vceqf %v0, %v28, %v25 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 -; CHECK-NEXT: vceqf %v0, %v30, %v27 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v6, %v24, %v26 +; CHECK-NEXT: vuphh %v7, %v6 +; CHECK-NEXT: vmrlg %v6, %v6, %v6 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vceqf %v16, %v28, %v25 +; CHECK-NEXT: vceqf %v17, %v30, %v27 +; CHECK-NEXT: vx %v6, %v6, %v17 +; CHECK-NEXT: vx %v7, %v7, %v16 +; CHECK-NEXT: vmrlg %v17, %v6, %v6 +; CHECK-NEXT: vmrlg %v16, %v7, %v7 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) ; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vuphf %v17, %v17 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vuphf %v16, %v16 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vsel %v24, %v29, %v5, %v7 +; CHECK-NEXT: vsel %v26, %v31, %v4, %v16 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v6 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v17 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i32> %val3, %val4 @@ -4794,21 +4968,21 @@ define <8 x i8> @fun174(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { ; CHECK-LABEL: fun174: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v30, %v31 -; CHECK-NEXT: vceqg %v2, %v28, %v29 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vlrepg %v1, 200(%r15) -; CHECK-NEXT: vlrepg %v2, 192(%r15) -; CHECK-NEXT: vpkh %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vceqg %v3, %v27, %v3 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqg %v3, %v30, %v31 +; CHECK-NEXT: vceqg %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v3, %v5, %v3 +; CHECK-NEXT: vceqh %v4, %v24, %v26 +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vx %v2, %v4, %v2 +; CHECK-NEXT: vlrepg %v0, 200(%r15) +; CHECK-NEXT: vlrepg %v1, 192(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = icmp eq <8 x i64> %val3, %val4 @@ -4820,31 +4994,31 @@ define <8 x i16> @fun175(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { ; CHECK-LABEL: fun175: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v30, %v30 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vmrhf %v4, %v28, %v28 +; CHECK-NEXT: vceqh %v0, %v24, %v26 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vmrlf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v25, %v25 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 @@ -4857,26 +5031,26 @@ define <8 x i32> @fun176(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun176: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v26 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vceqh %v6, %v24, %v26 +; CHECK-NEXT: vuphh %v7, %v6 +; CHECK-NEXT: vmrlg %v6, %v6, %v6 +; CHECK-NEXT: vfchdb %v16, %v30, %v31 +; CHECK-NEXT: vfchdb %v17, %v28, %v29 +; CHECK-NEXT: vfchdb %v5, %v27, %v5 +; CHECK-NEXT: vfchdb %v4, %v25, %v4 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vpkg %v16, %v17, %v16 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) ; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vx %v4, %v6, %v4 +; CHECK-NEXT: vx %v5, %v7, %v16 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i16> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -4888,26 +5062,26 @@ define <8 x i32> @fun177(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { ; CHECK-LABEL: fun177: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vl %v6, 160(%r15) +; CHECK-NEXT: vl %v7, 176(%r15) +; CHECK-NEXT: vceqg %v7, %v27, %v7 +; CHECK-NEXT: vceqg %v6, %v25, %v6 +; CHECK-NEXT: vceqg %v5, %v31, %v5 +; CHECK-NEXT: vceqg %v4, %v29, %v4 +; CHECK-NEXT: vceqf %v16, %v24, %v28 +; CHECK-NEXT: vceqf %v17, %v26, %v30 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vx %v4, %v17, %v4 +; CHECK-NEXT: vx %v5, %v16, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = icmp eq <8 x i64> %val3, %val4 @@ -4919,50 +5093,50 @@ define <8 x double> @fun178(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { ; CHECK-LABEL: fun178: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v29, %v29 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v29, %v29 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v31, %v31 -; CHECK-NEXT: vmrlf %v2, %v27, %v27 -; CHECK-NEXT: vmrhf %v3, %v27, %v27 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v31, %v31 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vceqf %v2, %v26, %v30 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vmrlf %v18, %v29, %v29 +; CHECK-NEXT: vmrlf %v19, %v25, %v25 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vmrhf %v19, %v29, %v29 +; CHECK-NEXT: vmrhf %v20, %v25, %v25 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 240(%r15) ; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vpkg %v18, %v19, %v18 +; CHECK-NEXT: vmrlf %v19, %v31, %v31 +; CHECK-NEXT: vmrlf %v20, %v27, %v27 +; CHECK-NEXT: vmrhf %v21, %v27, %v27 +; CHECK-NEXT: vceqf %v16, %v24, %v28 +; CHECK-NEXT: vceqf %v17, %v26, %v30 +; CHECK-NEXT: vx %v16, %v16, %v18 +; CHECK-NEXT: vmrlg %v18, %v16, %v16 +; CHECK-NEXT: vuphf %v18, %v18 +; CHECK-NEXT: vuphf %v16, %v16 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vmrhf %v20, %v31, %v31 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vpkg %v19, %v20, %v19 +; CHECK-NEXT: vx %v17, %v17, %v19 +; CHECK-NEXT: vmrlg %v19, %v17, %v17 +; CHECK-NEXT: vuphf %v19, %v19 +; CHECK-NEXT: vuphf %v17, %v17 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v19 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = fcmp ogt <8 x float> %val3, %val4 @@ -4974,38 +5148,38 @@ define <8 x double> @fun179(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { ; CHECK-LABEL: fun179: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vceqf %v1, %v24, %v28 -; CHECK-NEXT: vfchdb %v0, %v25, %v0 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 224(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vceqf %v2, %v26, %v30 -; CHECK-NEXT: vfchdb %v0, %v29, %v0 -; CHECK-NEXT: vuphf %v3, %v2 -; CHECK-NEXT: vx %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vceqf %v20, %v24, %v28 +; CHECK-NEXT: vceqf %v22, %v26, %v30 +; CHECK-NEXT: vl %v16, 208(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 160(%r15) +; CHECK-NEXT: vuphf %v21, %v20 +; CHECK-NEXT: vuphf %v23, %v22 +; CHECK-NEXT: vmrlg %v20, %v20, %v20 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vfchdb %v19, %v25, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v31, %v16 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) ; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vl %v7, 224(%r15) +; CHECK-NEXT: vx %v16, %v22, %v16 +; CHECK-NEXT: vx %v17, %v20, %v17 +; CHECK-NEXT: vx %v18, %v23, %v18 +; CHECK-NEXT: vx %v19, %v21, %v19 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <8 x i32> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -5017,58 +5191,58 @@ define <8 x i64> @fun180(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { ; CHECK-LABEL: fun180: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 224(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vx %v1, %v1, %v2 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vfchdb %v3, %v29, %v3 -; CHECK-NEXT: vx %v2, %v2, %v3 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vfchdb %v2, %v27, %v2 -; CHECK-NEXT: vx %v0, %v0, %v2 +; CHECK-NEXT: vmrlf %v20, %v28, %v28 +; CHECK-NEXT: vmrlf %v21, %v24, %v24 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vmrhf %v21, %v28, %v28 +; CHECK-NEXT: vmrhf %v22, %v24, %v24 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vl %v16, 208(%r15) +; CHECK-NEXT: vldeb %v22, %v22 +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 160(%r15) +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vfchdb %v21, %v22, %v21 ; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vfchdb %v1, %v31, %v1 -; CHECK-NEXT: vx %v0, %v0, %v1 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vmrlf %v22, %v30, %v30 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vmrlf %v23, %v26, %v26 +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vl %v7, 224(%r15) +; CHECK-NEXT: vldeb %v22, %v22 +; CHECK-NEXT: vmrhf %v24, %v26, %v26 +; CHECK-NEXT: vpkg %v20, %v21, %v20 +; CHECK-NEXT: vuphf %v21, %v20 +; CHECK-NEXT: vmrlg %v20, %v20, %v20 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v25, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v31, %v16 +; CHECK-NEXT: vx %v17, %v20, %v17 +; CHECK-NEXT: vx %v19, %v21, %v19 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vldeb %v23, %v23 +; CHECK-NEXT: vfchdb %v22, %v23, %v22 +; CHECK-NEXT: vmrhf %v23, %v30, %v30 +; CHECK-NEXT: vldeb %v23, %v23 +; CHECK-NEXT: vldeb %v24, %v24 +; CHECK-NEXT: vfchdb %v23, %v24, %v23 +; CHECK-NEXT: vpkg %v22, %v23, %v22 +; CHECK-NEXT: vuphf %v23, %v22 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vx %v16, %v22, %v16 +; CHECK-NEXT: vx %v18, %v23, %v18 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp0 = fcmp ogt <8 x float> %val1, %val2 %cmp1 = fcmp ogt <8 x double> %val3, %val4 @@ -5080,9 +5254,9 @@ define <16 x i8> @fun181(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun181: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 ; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 @@ -5095,14 +5269,14 @@ define <16 x i16> @fun182(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun182: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v28, %v30 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vceqb %v1, %v28, %v30 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v1 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i8> %val3, %val4 @@ -5114,59 +5288,70 @@ define <16 x i64> @fun183(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun183: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vceqh %v0, %v28, %v25 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vuphh %v2, %v0 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v3, 288(%r15) -; CHECK-NEXT: vl %v4, 160(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vceqh %v2, %v30, %v27 -; CHECK-NEXT: vlr %v30, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vx %v1, %v1, %v2 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 -; CHECK-NEXT: vl %v3, 336(%r15) -; CHECK-NEXT: vl %v4, 208(%r15) -; CHECK-NEXT: vpkg %v2, %v1, %v1 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vmrlg %v2, %v1, %v1 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi44: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi45: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi46: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vceqb %v22, %v24, %v26 +; CHECK-NEXT: vuphb %v23, %v22 +; CHECK-NEXT: vmrlg %v22, %v22, %v22 +; CHECK-NEXT: vuphb %v22, %v22 +; CHECK-NEXT: vceqh %v24, %v28, %v25 +; CHECK-NEXT: vceqh %v25, %v30, %v27 +; CHECK-NEXT: vx %v22, %v22, %v25 +; CHECK-NEXT: vsldb %v25, %v22, %v22, 12 +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vuphf %v8, %v25 +; CHECK-NEXT: vmrlg %v25, %v22, %v22 +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vx %v23, %v23, %v24 +; CHECK-NEXT: vl %v0, 544(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vpkg %v25, %v22, %v22 +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 432(%r15) +; CHECK-NEXT: vsldb %v24, %v23, %v23, 12 +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vuphh %v25, %v25 +; CHECK-NEXT: vl %v6, 496(%r15) +; CHECK-NEXT: vl %v7, 368(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v16, 480(%r15) +; CHECK-NEXT: vl %v17, 352(%r15) +; CHECK-NEXT: vuphf %v27, %v25 +; CHECK-NEXT: vl %v18, 464(%r15) +; CHECK-NEXT: vl %v19, 336(%r15) +; CHECK-NEXT: vuphf %v25, %v24 +; CHECK-NEXT: vmrlg %v24, %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphf %v28, %v24 +; CHECK-NEXT: vpkg %v24, %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vuphh %v22, %v22 +; CHECK-NEXT: vuphf %v26, %v24 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vsel %v24, %v29, %v21, %v23 +; CHECK-NEXT: vsel %v26, %v31, %v20, %v26 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v9 +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v31, %v1, %v0, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vsel %v30, %v17, %v16, %v25 +; CHECK-NEXT: vsel %v25, %v7, %v6, %v22 +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -5178,64 +5363,84 @@ define <16 x i64> @fun184(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun184: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vceqf %v0, %v28, %v29 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vl %v3, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vpkg %v2, %v1, %v1 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vl %v5, 256(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vmrlg %v3, %v1, %v1 -; CHECK-NEXT: vuphb %v3, %v3 -; CHECK-NEXT: vceqf %v2, %v25, %v2 -; CHECK-NEXT: vuphh %v3, %v3 -; CHECK-NEXT: vx %v2, %v3, %v2 -; CHECK-NEXT: vuphf %v3, %v2 -; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 -; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vl %v4, 416(%r15) -; CHECK-NEXT: vl %v5, 288(%r15) -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vceqf %v3, %v27, %v3 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v1, %v1, %v3 -; CHECK-NEXT: vuphf %v3, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vl %v4, 240(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi47: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi48: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi49: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi50: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi51: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vceqb %v24, %v24, %v26 +; CHECK-NEXT: vuphb %v26, %v24 +; CHECK-NEXT: vpkg %v10, %v24, %v24 +; CHECK-NEXT: vmrlg %v11, %v24, %v24 +; CHECK-NEXT: vsldb %v24, %v24, %v24, 12 +; CHECK-NEXT: vl %v8, 368(%r15) +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vl %v9, 352(%r15) +; CHECK-NEXT: vuphb %v10, %v10 +; CHECK-NEXT: vuphb %v11, %v11 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vceqf %v27, %v27, %v8 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vuphh %v10, %v10 +; CHECK-NEXT: vuphh %v11, %v11 +; CHECK-NEXT: vceqf %v28, %v28, %v29 +; CHECK-NEXT: vceqf %v29, %v30, %v31 +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vl %v7, 480(%r15) +; CHECK-NEXT: vceqf %v25, %v25, %v9 +; CHECK-NEXT: vl %v18, 544(%r15) +; CHECK-NEXT: vl %v19, 416(%r15) +; CHECK-NEXT: vx %v24, %v24, %v27 +; CHECK-NEXT: vl %v0, 624(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vmrlg %v27, %v24, %v24 +; CHECK-NEXT: vl %v2, 592(%r15) +; CHECK-NEXT: vl %v3, 464(%r15) +; CHECK-NEXT: vx %v25, %v11, %v25 +; CHECK-NEXT: vl %v4, 560(%r15) +; CHECK-NEXT: vl %v5, 432(%r15) +; CHECK-NEXT: vx %v29, %v10, %v29 +; CHECK-NEXT: vl %v16, 576(%r15) +; CHECK-NEXT: vl %v17, 448(%r15) +; CHECK-NEXT: vuphf %v8, %v24 +; CHECK-NEXT: vl %v20, 528(%r15) +; CHECK-NEXT: vl %v21, 400(%r15) +; CHECK-NEXT: vx %v24, %v26, %v28 +; CHECK-NEXT: vl %v22, 512(%r15) +; CHECK-NEXT: vl %v23, 384(%r15) +; CHECK-NEXT: vuphf %v31, %v27 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vmrlg %v27, %v25, %v25 +; CHECK-NEXT: vmrlg %v30, %v29, %v29 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vuphf %v29, %v29 +; CHECK-NEXT: vmrlg %v26, %v24, %v24 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v30, %v30 +; CHECK-NEXT: vuphf %v25, %v25 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v19, %v18, %v29 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v8 +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v25, %v17, %v16, %v25 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v30 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v27 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i32> %val3, %val4 @@ -5247,88 +5452,88 @@ define <16 x i64> @fun185(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { ; CHECK-LABEL: fun185: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vceqg %v1, %v28, %v0 -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v4, %v1 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v28, %v3 +; CHECK-NEXT: vuphf %v4, %v4 ; CHECK-NEXT: vl %v2, 448(%r15) -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vpkf %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v30, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vx %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 320(%r15) +; CHECK-NEXT: vsel %v24, %v4, %v2, %v3 +; CHECK-NEXT: vpkf %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v30, %v3 +; CHECK-NEXT: vuphf %v4, %v4 ; CHECK-NEXT: vl %v2, 464(%r15) -; CHECK-NEXT: vl %v3, 336(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vx %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 336(%r15) +; CHECK-NEXT: vsel %v26, %v4, %v2, %v3 +; CHECK-NEXT: vpkg %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vl %v3, 224(%r15) ; CHECK-NEXT: vl %v2, 480(%r15) -; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v27, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vl %v0, 544(%r15) +; CHECK-NEXT: vceqg %v3, %v25, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vx %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 352(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) ; CHECK-NEXT: vl %v2, 496(%r15) -; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v3, 384(%r15) -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v4, %v1, %v1, 6 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v27, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vx %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vsel %v30, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 256(%r15) ; CHECK-NEXT: vl %v2, 512(%r15) -; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v3, 400(%r15) -; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vceqg %v1, %v31, %v1 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vmrlg %v4, %v1, %v1 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vx %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v25, %v4, %v2, %v3 +; CHECK-NEXT: vl %v3, 272(%r15) ; CHECK-NEXT: vl %v2, 528(%r15) -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 288(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsldb %v4, %v1, %v1, 10 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vceqg %v3, %v31, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vx %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 400(%r15) +; CHECK-NEXT: vsel %v27, %v4, %v2, %v3 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vsldb %v3, %v1, %v1, 12 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 14 +; CHECK-NEXT: vx %v2, %v3, %v2 ; CHECK-NEXT: vl %v3, 416(%r15) -; CHECK-NEXT: vceqg %v1, %v2, %v1 -; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 -; CHECK-NEXT: vuphb %v2, %v2 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 544(%r15) -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsel %v29, %v3, %v0, %v2 +; CHECK-NEXT: vl %v0, 304(%r15) ; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vceqg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 432(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vx %v0, %v0, %v1 -; CHECK-NEXT: vl %v1, 560(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 560(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v2, %v0 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = icmp eq <16 x i64> %val3, %val4 @@ -5340,66 +5545,66 @@ define <16 x i16> @fun186(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun186: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vmrlf %v4, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v29, %v29 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vuphb %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrlf %v7, %v30, %v30 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vmrhf %v7, %v31, %v31 +; CHECK-NEXT: vmrhf %v16, %v30, %v30 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vmrlf %v2, %v0, %v0 -; CHECK-NEXT: vmrlf %v3, %v27, %v27 -; CHECK-NEXT: vmrhf %v0, %v0, %v0 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vmrhf %v3, %v27, %v27 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v0, %v3, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v2 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vpkf %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vpkg %v6, %v7, %v6 +; CHECK-NEXT: vmrlf %v7, %v29, %v29 +; CHECK-NEXT: vmrlf %v16, %v28, %v28 +; CHECK-NEXT: vmrhf %v17, %v28, %v28 +; CHECK-NEXT: vmrlf %v18, %v25, %v25 +; CHECK-NEXT: vceqb %v4, %v24, %v26 +; CHECK-NEXT: vuphb %v5, %v4 +; CHECK-NEXT: vmrlg %v4, %v4, %v4 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vmrhf %v16, %v29, %v29 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vpkg %v7, %v16, %v7 +; CHECK-NEXT: vpkf %v6, %v7, %v6 +; CHECK-NEXT: vl %v7, 176(%r15) +; CHECK-NEXT: vmrlf %v16, %v7, %v7 +; CHECK-NEXT: vmrlf %v17, %v27, %v27 +; CHECK-NEXT: vmrhf %v7, %v7, %v7 +; CHECK-NEXT: vx %v5, %v5, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vmrhf %v17, %v27, %v27 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v7, %v17, %v7 +; CHECK-NEXT: vpkg %v7, %v7, %v16 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vmrlf %v17, %v16, %v16 +; CHECK-NEXT: vmrhf %v16, %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vmrhf %v18, %v25, %v25 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v16, %v18, %v16 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkf %v7, %v16, %v7 +; CHECK-NEXT: vx %v4, %v4, %v7 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = fcmp ogt <16 x float> %val3, %val4 @@ -5411,36 +5616,36 @@ define <16 x i8> @fun187(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun187: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 288(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v31, %v1 -; CHECK-NEXT: vfchdb %v2, %v29, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vfchdb %v1, %v27, %v1 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vfchdb %v2, %v30, %v2 -; CHECK-NEXT: vfchdb %v3, %v28, %v3 -; CHECK-NEXT: vpkg %v2, %v3, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vceqb %v1, %v24, %v26 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vl %v6, 256(%r15) +; CHECK-NEXT: vl %v7, 272(%r15) +; CHECK-NEXT: vl %v16, 288(%r15) +; CHECK-NEXT: vl %v17, 160(%r15) +; CHECK-NEXT: vl %v18, 304(%r15) +; CHECK-NEXT: vl %v19, 176(%r15) +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vfchdb %v7, %v31, %v7 +; CHECK-NEXT: vfchdb %v6, %v29, %v6 +; CHECK-NEXT: vfchdb %v5, %v27, %v5 +; CHECK-NEXT: vfchdb %v4, %v25, %v4 +; CHECK-NEXT: vfchdb %v3, %v30, %v3 +; CHECK-NEXT: vfchdb %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v6, %v6, %v16 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vpkf %v2, %v2, %v4 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqb %v20, %v24, %v26 +; CHECK-NEXT: vpkh %v2, %v2, %v6 +; CHECK-NEXT: vx %v2, %v20, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i8> %val1, %val2 %cmp1 = fcmp ogt <16 x double> %val3, %val4 @@ -5452,16 +5657,16 @@ define <16 x i8> @fun188(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun188: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v27, %v31 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v25, %v29 ; CHECK-NEXT: vceqh %v2, %v24, %v28 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vceqh %v4, %v25, %v29 +; CHECK-NEXT: vceqh %v5, %v27, %v31 +; CHECK-NEXT: vx %v3, %v3, %v5 +; CHECK-NEXT: vx %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v3 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -5473,18 +5678,18 @@ define <16 x i16> @fun189(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { ; CHECK-LABEL: fun189: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v25, %v29 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqh %v0, %v27, %v31 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v4, %v24, %v28 +; CHECK-NEXT: vceqh %v5, %v26, %v30 +; CHECK-NEXT: vceqh %v6, %v25, %v29 +; CHECK-NEXT: vceqh %v7, %v27, %v31 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vx %v5, %v5, %v7 +; CHECK-NEXT: vx %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -5496,30 +5701,30 @@ define <16 x i32> @fun190(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun190: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v25, %v29 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v27, %v31 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vceqh %v16, %v24, %v28 +; CHECK-NEXT: vceqh %v17, %v26, %v30 +; CHECK-NEXT: vceqh %v18, %v25, %v29 +; CHECK-NEXT: vceqh %v19, %v27, %v31 +; CHECK-NEXT: vx %v17, %v17, %v19 +; CHECK-NEXT: vx %v16, %v16, %v18 +; CHECK-NEXT: vmrlg %v19, %v17, %v17 +; CHECK-NEXT: vmrlg %v18, %v16, %v16 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) ; CHECK-NEXT: vl %v2, 240(%r15) ; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vl %v5, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vuphh %v19, %v19 +; CHECK-NEXT: vuphh %v18, %v18 +; CHECK-NEXT: vuphh %v17, %v17 +; CHECK-NEXT: vuphh %v16, %v16 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v17 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v18 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v19 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i16> %val3, %val4 @@ -5531,24 +5736,24 @@ define <16 x i8> @fun191(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { ; CHECK-LABEL: fun191: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqf %v0, %v31, %v0 -; CHECK-NEXT: vceqf %v1, %v29, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqf %v1, %v27, %v1 -; CHECK-NEXT: vceqf %v2, %v25, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vceqh %v2, %v24, %v28 -; CHECK-NEXT: vx %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vceqf %v5, %v27, %v5 +; CHECK-NEXT: vceqf %v4, %v25, %v4 +; CHECK-NEXT: vceqf %v3, %v31, %v3 +; CHECK-NEXT: vceqf %v2, %v29, %v2 +; CHECK-NEXT: vceqh %v6, %v24, %v28 +; CHECK-NEXT: vceqh %v7, %v26, %v30 +; CHECK-NEXT: vpkf %v4, %v4, %v5 +; CHECK-NEXT: vpkf %v2, %v2, %v3 +; CHECK-NEXT: vx %v2, %v7, %v2 +; CHECK-NEXT: vx %v3, %v6, %v4 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vpkh %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i32> %val3, %val4 @@ -5560,54 +5765,74 @@ define <16 x i32> @fun192(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun192: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 416(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqg %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vceqg %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vuphh %v3, %v2 -; CHECK-NEXT: vx %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 448(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v3, %v29, %v3 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v3, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 336(%r15) -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vceqg %v1, %v3, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi52: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi53: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi54: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi55: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi56: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v16, 512(%r15) +; CHECK-NEXT: vl %v17, 384(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 464(%r15) +; CHECK-NEXT: vl %v22, 480(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vl %v23, 352(%r15) +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vceqg %v27, %v27, %v11 +; CHECK-NEXT: vl %v8, 496(%r15) +; CHECK-NEXT: vceqg %v25, %v25, %v10 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vl %v9, 368(%r15) +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vpkg %v25, %v25, %v27 +; CHECK-NEXT: vceqg %v27, %v9, %v8 +; CHECK-NEXT: vceqg %v22, %v23, %v22 +; CHECK-NEXT: vceqg %v21, %v31, %v21 +; CHECK-NEXT: vceqg %v20, %v29, %v20 +; CHECK-NEXT: vceqg %v18, %v19, %v18 +; CHECK-NEXT: vceqg %v16, %v17, %v16 +; CHECK-NEXT: vl %v0, 656(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v1, 592(%r15) +; CHECK-NEXT: vl %v2, 624(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v3, 560(%r15) +; CHECK-NEXT: vl %v4, 640(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v27 +; CHECK-NEXT: vl %v5, 576(%r15) +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vl %v7, 544(%r15) +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vx %v16, %v26, %v16 +; CHECK-NEXT: vx %v17, %v24, %v20 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vx %v18, %v30, %v22 +; CHECK-NEXT: vx %v19, %v28, %v25 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = icmp eq <16 x i64> %val3, %val4 @@ -5619,102 +5844,118 @@ define <16 x double> @fun193(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { ; CHECK-LABEL: fun193: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vmrlf %v1, %v0, %v0 -; CHECK-NEXT: vmrlf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v0, %v0, %v0 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vl %v4, 224(%r15) -; CHECK-NEXT: vl %v5, 416(%r15) -; CHECK-NEXT: vl %v6, 288(%r15) -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v1 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vuphf %v2, %v0 -; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrlf %v4, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v27, %v27 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vl %v4, 256(%r15) -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vl %v3, 384(%r15) -; CHECK-NEXT: vx %v1, %v1, %v2 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vmrlf %v3, %v2, %v2 -; CHECK-NEXT: vmrlf %v4, %v29, %v29 -; CHECK-NEXT: vmrhf %v2, %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v2, %v4, %v2 -; CHECK-NEXT: vpkg %v2, %v2, %v3 -; CHECK-NEXT: vceqh %v3, %v26, %v30 -; CHECK-NEXT: vuphh %v4, %v3 -; CHECK-NEXT: vx %v2, %v4, %v2 -; CHECK-NEXT: vuphf %v4, %v2 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vl %v4, 208(%r15) -; CHECK-NEXT: vmrlf %v5, %v4, %v4 -; CHECK-NEXT: vmrlf %v6, %v31, %v31 -; CHECK-NEXT: vmrhf %v4, %v4, %v4 -; CHECK-NEXT: vmrlg %v3, %v3, %v3 -; CHECK-NEXT: vuphh %v3, %v3 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v5, %v6, %v5 -; CHECK-NEXT: vmrhf %v6, %v31, %v31 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v4, %v6, %v4 -; CHECK-NEXT: vl %v6, 320(%r15) -; CHECK-NEXT: vpkg %v4, %v4, %v5 -; CHECK-NEXT: vl %v5, 448(%r15) -; CHECK-NEXT: vx %v3, %v3, %v4 -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 -; CHECK-NEXT: vl %v4, 368(%r15) -; CHECK-NEXT: vl %v5, 240(%r15) -; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 -; CHECK-NEXT: vl %v4, 272(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vmrlg %v0, %v2, %v2 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vmrlg %v0, %v3, %v3 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -184 +; CHECK-NEXT: .Lcfi57: +; CHECK-NEXT: .cfi_def_cfa_offset 344 +; CHECK-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi58: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi59: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi60: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: vl %v8, 344(%r15) +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v25, %v25 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v25, %v25, %v25 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v25, %v25 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vl %v2, 616(%r15) +; CHECK-NEXT: vl %v3, 488(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v8 +; CHECK-NEXT: vl %v8, 360(%r15) +; CHECK-NEXT: vl %v4, 584(%r15) +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vl %v5, 456(%r15) +; CHECK-NEXT: vl %v6, 552(%r15) +; CHECK-NEXT: vpkg %v25, %v25, %v9 +; CHECK-NEXT: vl %v7, 424(%r15) +; CHECK-NEXT: vl %v16, 632(%r15) +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vl %v17, 504(%r15) +; CHECK-NEXT: vl %v18, 600(%r15) +; CHECK-NEXT: vmrlf %v10, %v27, %v27 +; CHECK-NEXT: vl %v19, 472(%r15) +; CHECK-NEXT: vl %v0, 648(%r15) +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vl %v1, 520(%r15) +; CHECK-NEXT: vl %v20, 568(%r15) +; CHECK-NEXT: vmrhf %v27, %v27, %v27 +; CHECK-NEXT: vl %v21, 440(%r15) +; CHECK-NEXT: vl %v22, 536(%r15) +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vl %v23, 408(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vx %v25, %v28, %v25 +; CHECK-NEXT: vmrlg %v28, %v25, %v25 +; CHECK-NEXT: vldeb %v27, %v27 +; CHECK-NEXT: vfchdb %v27, %v27, %v8 +; CHECK-NEXT: vl %v8, 376(%r15) +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vpkg %v27, %v27, %v9 +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v29, %v29 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v29, %v29, %v29 +; CHECK-NEXT: vx %v24, %v24, %v27 +; CHECK-NEXT: vmrlg %v27, %v24, %v24 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vfchdb %v29, %v29, %v8 +; CHECK-NEXT: vl %v8, 392(%r15) +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: vpkg %v29, %v29, %v9 +; CHECK-NEXT: vmrlf %v9, %v8, %v8 +; CHECK-NEXT: vmrlf %v10, %v31, %v31 +; CHECK-NEXT: vmrhf %v8, %v8, %v8 +; CHECK-NEXT: vmrhf %v31, %v31, %v31 +; CHECK-NEXT: vx %v29, %v30, %v29 +; CHECK-NEXT: vmrlg %v30, %v29, %v29 +; CHECK-NEXT: vuphf %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v10, %v10 +; CHECK-NEXT: vfchdb %v9, %v10, %v9 +; CHECK-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v31, %v31 +; CHECK-NEXT: vfchdb %v31, %v31, %v8 +; CHECK-NEXT: vpkg %v31, %v31, %v9 +; CHECK-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vx %v26, %v26, %v31 +; CHECK-NEXT: vmrlg %v31, %v26, %v26 +; CHECK-NEXT: vuphf %v8, %v30 +; CHECK-NEXT: vuphf %v30, %v28 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vuphf %v28, %v24 +; CHECK-NEXT: vuphf %v24, %v25 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v29 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v30 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v28 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 184 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = fcmp ogt <16 x float> %val3, %val4 @@ -5726,54 +5967,74 @@ define <16 x i32> @fun194(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { ; CHECK-LABEL: fun194: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqh %v1, %v24, %v28 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vx %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 416(%r15) -; CHECK-NEXT: vl %v3, 352(%r15) -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vl %v0, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v0, %v2, %v0 -; CHECK-NEXT: vceqh %v2, %v26, %v30 -; CHECK-NEXT: vuphh %v3, %v2 -; CHECK-NEXT: vx %v0, %v3, %v0 -; CHECK-NEXT: vl %v3, 448(%r15) -; CHECK-NEXT: vl %v4, 384(%r15) -; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v3, %v29, %v3 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vpkg %v0, %v3, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v3, 368(%r15) -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 -; CHECK-NEXT: vl %v0, 336(%r15) -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vfchdb %v1, %v3, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vx %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -192 +; CHECK-NEXT: .Lcfi61: +; CHECK-NEXT: .cfi_def_cfa_offset 352 +; CHECK-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi62: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi63: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi64: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi65: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v16, 512(%r15) +; CHECK-NEXT: vl %v17, 384(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v20, 448(%r15) +; CHECK-NEXT: vl %v21, 464(%r15) +; CHECK-NEXT: vl %v22, 480(%r15) +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vl %v23, 352(%r15) +; CHECK-NEXT: vceqh %v26, %v26, %v30 +; CHECK-NEXT: vfchdb %v27, %v27, %v11 +; CHECK-NEXT: vl %v8, 496(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v10 +; CHECK-NEXT: vuphh %v28, %v24 +; CHECK-NEXT: vl %v9, 368(%r15) +; CHECK-NEXT: vuphh %v30, %v26 +; CHECK-NEXT: vmrlg %v24, %v24, %v24 +; CHECK-NEXT: vmrlg %v26, %v26, %v26 +; CHECK-NEXT: vpkg %v25, %v25, %v27 +; CHECK-NEXT: vfchdb %v27, %v9, %v8 +; CHECK-NEXT: vfchdb %v22, %v23, %v22 +; CHECK-NEXT: vfchdb %v21, %v31, %v21 +; CHECK-NEXT: vfchdb %v20, %v29, %v20 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vl %v0, 656(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v1, 592(%r15) +; CHECK-NEXT: vl %v2, 624(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v3, 560(%r15) +; CHECK-NEXT: vl %v4, 640(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v27 +; CHECK-NEXT: vl %v5, 576(%r15) +; CHECK-NEXT: vl %v6, 608(%r15) +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v16, %v16, %v18 +; CHECK-NEXT: vl %v7, 544(%r15) +; CHECK-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vx %v16, %v26, %v16 +; CHECK-NEXT: vx %v17, %v24, %v20 +; CHECK-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vx %v18, %v30, %v22 +; CHECK-NEXT: vx %v19, %v28, %v25 +; CHECK-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v28, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: aghi %r15, 192 ; CHECK-NEXT: br %r14 %cmp0 = icmp eq <16 x i16> %val1, %val2 %cmp1 = fcmp ogt <16 x double> %val3, %val4 Index: test/CodeGen/SystemZ/vec-cmpsel.ll =================================================================== --- test/CodeGen/SystemZ/vec-cmpsel.ll +++ test/CodeGen/SystemZ/vec-cmpsel.ll @@ -341,15 +341,15 @@ ; CHECK-LABEL: fun27: ; CHECK: # BB#0: ; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i8> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 @@ -373,15 +373,15 @@ ; CHECK-LABEL: fun29: ; CHECK: # BB#0: ; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i8> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 @@ -427,13 +427,13 @@ ; CHECK-LABEL: fun33: ; CHECK: # BB#0: ; CHECK-NEXT: vceqh %v0, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i16> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 @@ -456,13 +456,13 @@ ; CHECK-LABEL: fun35: ; CHECK: # BB#0: ; CHECK-NEXT: vceqh %v0, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 ; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i16> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 @@ -510,11 +510,11 @@ ; CHECK-LABEL: fun39: ; CHECK: # BB#0: ; CHECK-NEXT: vceqf %v0, %v24, %v26 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i32> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 @@ -536,11 +536,11 @@ ; CHECK-LABEL: fun41: ; CHECK: # BB#0: ; CHECK-NEXT: vceqf %v0, %v24, %v26 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i32> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 @@ -593,9 +593,9 @@ define <4 x i64> @fun45(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4) { ; CHECK-LABEL: fun45: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i64> %val1, %val2 @@ -619,9 +619,9 @@ define <4 x double> @fun47(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4) { ; CHECK-LABEL: fun47: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = icmp eq <4 x i64> %val1, %val2 @@ -656,13 +656,13 @@ ; CHECK-LABEL: fun50: ; CHECK: # BB#0: ; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i8> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 @@ -672,28 +672,28 @@ define <8 x i64> @fun51(<8 x i8> %val1, <8 x i8> %val2, <8 x i64> %val3, <8 x i64> %val4) { ; CHECK-LABEL: fun51: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 -; CHECK-NEXT: vpkf %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 6 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: vceqb %v2, %v24, %v26 +; CHECK-NEXT: vsldb %v3, %v2, %v2, 6 +; CHECK-NEXT: vpkg %v4, %v2, %v2 +; CHECK-NEXT: vpkf %v5, %v2, %v2 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphb %v5, %v5 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v2 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v5 +; CHECK-NEXT: vsel %v28, %v25, %v1, %v4 +; CHECK-NEXT: vsel %v30, %v27, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i8> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 @@ -704,13 +704,13 @@ ; CHECK-LABEL: fun52: ; CHECK: # BB#0: ; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 ; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i8> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 @@ -720,28 +720,28 @@ define <8 x double> @fun53(<8 x i8> %val1, <8 x i8> %val2, <8 x double> %val3, <8 x double> %val4) { ; CHECK-LABEL: fun53: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 -; CHECK-NEXT: vpkf %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 6 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: vceqb %v2, %v24, %v26 +; CHECK-NEXT: vsldb %v3, %v2, %v2, 6 +; CHECK-NEXT: vpkg %v4, %v2, %v2 +; CHECK-NEXT: vpkf %v5, %v2, %v2 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphb %v5, %v5 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v2 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v5 +; CHECK-NEXT: vsel %v28, %v25, %v1, %v4 +; CHECK-NEXT: vsel %v30, %v27, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i8> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 @@ -775,11 +775,11 @@ ; CHECK-LABEL: fun56: ; CHECK: # BB#0: ; CHECK-NEXT: vceqh %v0, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i16> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 @@ -789,24 +789,24 @@ define <8 x i64> @fun57(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4) { ; CHECK-LABEL: fun57: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 -; CHECK-NEXT: vmrlg %v1, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: vceqh %v2, %v24, %v26 +; CHECK-NEXT: vsldb %v3, %v2, %v2, 12 +; CHECK-NEXT: vmrlg %v4, %v2, %v2 +; CHECK-NEXT: vpkg %v5, %v2, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v2 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v5 +; CHECK-NEXT: vsel %v28, %v25, %v1, %v4 +; CHECK-NEXT: vsel %v30, %v27, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i16> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 @@ -817,11 +817,11 @@ ; CHECK-LABEL: fun58: ; CHECK: # BB#0: ; CHECK-NEXT: vceqh %v0, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 ; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i16> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 @@ -831,24 +831,24 @@ define <8 x double> @fun59(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4) { ; CHECK-LABEL: fun59: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v26 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 -; CHECK-NEXT: vmrlg %v1, %v0, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: vceqh %v2, %v24, %v26 +; CHECK-NEXT: vsldb %v3, %v2, %v2, 12 +; CHECK-NEXT: vmrlg %v4, %v2, %v2 +; CHECK-NEXT: vpkg %v5, %v2, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vuphf %v3, %v3 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v2 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v5 +; CHECK-NEXT: vsel %v28, %v25, %v1, %v4 +; CHECK-NEXT: vsel %v30, %v27, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i16> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 @@ -886,9 +886,9 @@ define <8 x i32> @fun62(<8 x i32> %val1, <8 x i32> %val2, <8 x i32> %val3, <8 x i32> %val4) { ; CHECK-LABEL: fun62: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i32> %val1, %val2 @@ -899,22 +899,22 @@ define <8 x i64> @fun63(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4) { ; CHECK-LABEL: fun63: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v24, %v28 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vceqf %v1, %v26, %v30 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: vceqf %v4, %v26, %v30 +; CHECK-NEXT: vceqf %v6, %v24, %v28 +; CHECK-NEXT: vmrlg %v5, %v4, %v4 +; CHECK-NEXT: vmrlg %v7, %v6, %v6 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vsel %v24, %v25, %v3, %v6 +; CHECK-NEXT: vsel %v28, %v29, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v27, %v1, %v7 +; CHECK-NEXT: vsel %v30, %v31, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i32> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 @@ -924,9 +924,9 @@ define <8 x float> @fun64(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4) { ; CHECK-LABEL: fun64: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i32> %val1, %val2 @@ -937,22 +937,22 @@ define <8 x double> @fun65(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4) { ; CHECK-LABEL: fun65: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v24, %v28 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vceqf %v1, %v26, %v30 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: vceqf %v4, %v26, %v30 +; CHECK-NEXT: vceqf %v6, %v24, %v28 +; CHECK-NEXT: vmrlg %v5, %v4, %v4 +; CHECK-NEXT: vmrlg %v7, %v6, %v6 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vsel %v24, %v25, %v3, %v6 +; CHECK-NEXT: vsel %v28, %v29, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v27, %v1, %v7 +; CHECK-NEXT: vsel %v30, %v31, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i32> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 @@ -962,18 +962,18 @@ define <8 x i8> @fun66(<8 x i64> %val1, <8 x i64> %val2, <8 x i8> %val3, <8 x i8> %val4) { ; CHECK-LABEL: fun66: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v30, %v31 -; CHECK-NEXT: vceqg %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v26, %v27 -; CHECK-NEXT: vceqg %v2, %v24, %v25 +; CHECK-NEXT: vceqg %v2, %v30, %v31 +; CHECK-NEXT: vceqg %v3, %v28, %v29 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vceqg %v3, %v26, %v27 +; CHECK-NEXT: vceqg %v4, %v24, %v25 ; CHECK-NEXT: larl %r1, .LCPI66_0 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 0(%r1) -; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 -; CHECK-NEXT: vlrepg %v1, 168(%r15) -; CHECK-NEXT: vlrepg %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 0(%r1) +; CHECK-NEXT: vlrepg %v0, 168(%r15) +; CHECK-NEXT: vlrepg %v1, 160(%r15) +; CHECK-NEXT: vperm %v2, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i64> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 @@ -983,16 +983,16 @@ define <8 x i16> @fun67(<8 x i64> %val1, <8 x i64> %val2, <8 x i16> %val3, <8 x i16> %val4) { ; CHECK-LABEL: fun67: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v30, %v31 -; CHECK-NEXT: vceqg %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vceqg %v1, %v26, %v27 -; CHECK-NEXT: vceqg %v2, %v24, %v25 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v30, %v31 +; CHECK-NEXT: vceqg %v3, %v28, %v29 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vceqg %v3, %v26, %v27 +; CHECK-NEXT: vceqg %v4, %v24, %v25 +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i64> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 @@ -1002,18 +1002,18 @@ define <8 x i32> @fun68(<8 x i64> %val1, <8 x i64> %val2, <8 x i32> %val3, <8 x i32> %val4) { ; CHECK-LABEL: fun68: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v26, %v27 -; CHECK-NEXT: vceqg %v1, %v24, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqg %v0, %v30, %v31 -; CHECK-NEXT: vceqg %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v4, %v30, %v31 +; CHECK-NEXT: vceqg %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vceqg %v5, %v26, %v27 +; CHECK-NEXT: vceqg %v6, %v24, %v25 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vpkg %v5, %v6, %v5 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i64> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 @@ -1023,22 +1023,22 @@ define <8 x i64> @fun69(<8 x i64> %val1, <8 x i64> %val2, <8 x i64> %val3, <8 x i64> %val4) { ; CHECK-LABEL: fun69: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v24, %v25 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqg %v0, %v26, %v27 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v28, %v29 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v31 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vceqg %v16, %v30, %v31 +; CHECK-NEXT: vceqg %v17, %v28, %v29 +; CHECK-NEXT: vceqg %v18, %v26, %v27 +; CHECK-NEXT: vceqg %v19, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i64> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 @@ -1048,18 +1048,18 @@ define <8 x float> @fun70(<8 x i64> %val1, <8 x i64> %val2, <8 x float> %val3, <8 x float> %val4) { ; CHECK-LABEL: fun70: ; CHECK: # BB#0: -; CHECK-NEXT: vceqg %v0, %v26, %v27 -; CHECK-NEXT: vceqg %v1, %v24, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqg %v0, %v30, %v31 -; CHECK-NEXT: vceqg %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v4, %v30, %v31 +; CHECK-NEXT: vceqg %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vceqg %v5, %v26, %v27 +; CHECK-NEXT: vceqg %v6, %v24, %v25 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vpkg %v5, %v6, %v5 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i64> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 @@ -1069,22 +1069,22 @@ define <8 x double> @fun71(<8 x i64> %val1, <8 x i64> %val2, <8 x double> %val3, <8 x double> %val4) { ; CHECK-LABEL: fun71: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v24, %v25 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqg %v0, %v26, %v27 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v28, %v29 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v31 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vceqg %v16, %v30, %v31 +; CHECK-NEXT: vceqg %v17, %v28, %v29 +; CHECK-NEXT: vceqg %v18, %v26, %v27 +; CHECK-NEXT: vceqg %v19, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = icmp eq <8 x i64> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 @@ -1106,11 +1106,11 @@ ; CHECK-LABEL: fun73: ; CHECK: # BB#0: ; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 ; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i8> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 @@ -1120,24 +1120,24 @@ define <16 x i32> @fun74(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4) { ; CHECK-LABEL: fun74: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 -; CHECK-NEXT: vmrlg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: vceqb %v2, %v24, %v26 +; CHECK-NEXT: vsldb %v3, %v2, %v2, 12 +; CHECK-NEXT: vmrlg %v4, %v2, %v2 +; CHECK-NEXT: vpkg %v5, %v2, %v2 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphb %v5, %v5 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v2 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v5 +; CHECK-NEXT: vsel %v28, %v25, %v1, %v4 +; CHECK-NEXT: vsel %v30, %v27, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i8> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 @@ -1147,56 +1147,64 @@ define <16 x i64> @fun75(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4) { ; CHECK-LABEL: fun75: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v2, %v1 -; CHECK-NEXT: vpkf %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v2, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v2, 240(%r15) -; CHECK-NEXT: vsldb %v1, %v0, %v0, 6 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v30, %v27, %v2, %v1 -; CHECK-NEXT: vl %v2, 256(%r15) -; CHECK-NEXT: vmrlg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v25, %v29, %v2, %v1 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vsldb %v1, %v0, %v0, 10 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v27, %v31, %v2, %v1 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsldb %v1, %v0, %v0, 12 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -168 +; CHECK-NEXT: .Lcfi0: +; CHECK-NEXT: .cfi_def_cfa_offset 328 +; CHECK-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi1: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: vceqb %v18, %v24, %v26 +; CHECK-NEXT: vpkg %v24, %v18, %v18 +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vsldb %v19, %v18, %v18, 14 +; CHECK-NEXT: vsldb %v20, %v18, %v18, 12 +; CHECK-NEXT: vsldb %v21, %v18, %v18, 10 +; CHECK-NEXT: vmrlg %v22, %v18, %v18 +; CHECK-NEXT: vsldb %v23, %v18, %v18, 6 +; CHECK-NEXT: vuphf %v8, %v24 +; CHECK-NEXT: vpkf %v24, %v18, %v18 +; CHECK-NEXT: vuphb %v18, %v18 +; CHECK-NEXT: vuphb %v19, %v19 +; CHECK-NEXT: vuphb %v20, %v20 +; CHECK-NEXT: vl %v7, 392(%r15) +; CHECK-NEXT: vl %v17, 360(%r15) +; CHECK-NEXT: vuphb %v21, %v21 +; CHECK-NEXT: vl %v0, 472(%r15) +; CHECK-NEXT: vl %v1, 344(%r15) +; CHECK-NEXT: vuphb %v22, %v22 +; CHECK-NEXT: vl %v2, 456(%r15) +; CHECK-NEXT: vl %v3, 328(%r15) +; CHECK-NEXT: vuphb %v23, %v23 +; CHECK-NEXT: vl %v4, 440(%r15) +; CHECK-NEXT: vl %v5, 424(%r15) +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vl %v6, 408(%r15) +; CHECK-NEXT: vl %v16, 376(%r15) +; CHECK-NEXT: vuphh %v18, %v18 +; CHECK-NEXT: vuphh %v19, %v19 +; CHECK-NEXT: vuphh %v20, %v20 +; CHECK-NEXT: vuphh %v21, %v21 +; CHECK-NEXT: vuphh %v22, %v22 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphf %v18, %v18 +; CHECK-NEXT: vuphf %v19, %v19 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v21, %v21 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v26, %v24 +; CHECK-NEXT: vsel %v24, %v28, %v17, %v18 +; CHECK-NEXT: vsel %v28, %v25, %v7, %v8 +; CHECK-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v26, %v30, %v16, %v26 +; CHECK-NEXT: vsel %v30, %v27, %v6, %v23 +; CHECK-NEXT: vsel %v25, %v29, %v5, %v22 +; CHECK-NEXT: vsel %v27, %v31, %v4, %v21 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v20 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v19 +; CHECK-NEXT: aghi %r15, 168 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i8> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 @@ -1206,24 +1214,24 @@ define <16 x float> @fun76(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4) { ; CHECK-LABEL: fun76: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 -; CHECK-NEXT: vmrlg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: vceqb %v2, %v24, %v26 +; CHECK-NEXT: vsldb %v3, %v2, %v2, 12 +; CHECK-NEXT: vmrlg %v4, %v2, %v2 +; CHECK-NEXT: vpkg %v5, %v2, %v2 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vuphb %v4, %v4 +; CHECK-NEXT: vuphb %v5, %v5 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v2 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v5 +; CHECK-NEXT: vsel %v28, %v25, %v1, %v4 +; CHECK-NEXT: vsel %v30, %v27, %v0, %v3 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i8> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 @@ -1233,56 +1241,64 @@ define <16 x double> @fun77(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4) { ; CHECK-LABEL: fun77: ; CHECK: # BB#0: -; CHECK-NEXT: vceqb %v0, %v24, %v26 -; CHECK-NEXT: vuphb %v1, %v0 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v28, %v2, %v1 -; CHECK-NEXT: vpkf %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v2, %v1 -; CHECK-NEXT: vpkg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 -; CHECK-NEXT: vl %v2, 240(%r15) -; CHECK-NEXT: vsldb %v1, %v0, %v0, 6 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v30, %v27, %v2, %v1 -; CHECK-NEXT: vl %v2, 256(%r15) -; CHECK-NEXT: vmrlg %v1, %v0, %v0 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v25, %v29, %v2, %v1 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vsldb %v1, %v0, %v0, 10 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v27, %v31, %v2, %v1 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsldb %v1, %v0, %v0, 12 -; CHECK-NEXT: vuphb %v1, %v1 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 -; CHECK-NEXT: vuphh %v1, %v1 -; CHECK-NEXT: vuphb %v0, %v0 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 -; CHECK-NEXT: vl %v1, 304(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -168 +; CHECK-NEXT: .Lcfi2: +; CHECK-NEXT: .cfi_def_cfa_offset 328 +; CHECK-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi3: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: vceqb %v18, %v24, %v26 +; CHECK-NEXT: vpkg %v24, %v18, %v18 +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vsldb %v19, %v18, %v18, 14 +; CHECK-NEXT: vsldb %v20, %v18, %v18, 12 +; CHECK-NEXT: vsldb %v21, %v18, %v18, 10 +; CHECK-NEXT: vmrlg %v22, %v18, %v18 +; CHECK-NEXT: vsldb %v23, %v18, %v18, 6 +; CHECK-NEXT: vuphf %v8, %v24 +; CHECK-NEXT: vpkf %v24, %v18, %v18 +; CHECK-NEXT: vuphb %v18, %v18 +; CHECK-NEXT: vuphb %v19, %v19 +; CHECK-NEXT: vuphb %v20, %v20 +; CHECK-NEXT: vl %v7, 392(%r15) +; CHECK-NEXT: vl %v17, 360(%r15) +; CHECK-NEXT: vuphb %v21, %v21 +; CHECK-NEXT: vl %v0, 472(%r15) +; CHECK-NEXT: vl %v1, 344(%r15) +; CHECK-NEXT: vuphb %v22, %v22 +; CHECK-NEXT: vl %v2, 456(%r15) +; CHECK-NEXT: vl %v3, 328(%r15) +; CHECK-NEXT: vuphb %v23, %v23 +; CHECK-NEXT: vl %v4, 440(%r15) +; CHECK-NEXT: vl %v5, 424(%r15) +; CHECK-NEXT: vuphb %v24, %v24 +; CHECK-NEXT: vl %v6, 408(%r15) +; CHECK-NEXT: vl %v16, 376(%r15) +; CHECK-NEXT: vuphh %v18, %v18 +; CHECK-NEXT: vuphh %v19, %v19 +; CHECK-NEXT: vuphh %v20, %v20 +; CHECK-NEXT: vuphh %v21, %v21 +; CHECK-NEXT: vuphh %v22, %v22 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vuphf %v18, %v18 +; CHECK-NEXT: vuphf %v19, %v19 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v21, %v21 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v26, %v24 +; CHECK-NEXT: vsel %v24, %v28, %v17, %v18 +; CHECK-NEXT: vsel %v28, %v25, %v7, %v8 +; CHECK-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v26, %v30, %v16, %v26 +; CHECK-NEXT: vsel %v30, %v27, %v6, %v23 +; CHECK-NEXT: vsel %v25, %v29, %v5, %v22 +; CHECK-NEXT: vsel %v27, %v31, %v4, %v21 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v20 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v19 +; CHECK-NEXT: aghi %r15, 168 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i8> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 @@ -1305,9 +1321,9 @@ define <16 x i16> @fun79(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4) { ; CHECK-LABEL: fun79: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vceqh %v0, %v26, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i16> %val1, %val2 @@ -1318,22 +1334,22 @@ define <16 x i32> @fun80(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4) { ; CHECK-LABEL: fun80: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v28 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: vceqh %v4, %v26, %v30 +; CHECK-NEXT: vceqh %v6, %v24, %v28 +; CHECK-NEXT: vmrlg %v5, %v4, %v4 +; CHECK-NEXT: vmrlg %v7, %v6, %v6 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v7, %v7 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vsel %v24, %v25, %v3, %v6 +; CHECK-NEXT: vsel %v28, %v29, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v27, %v1, %v7 +; CHECK-NEXT: vsel %v30, %v31, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i16> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 @@ -1343,50 +1359,50 @@ define <16 x i64> @fun81(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4) { ; CHECK-LABEL: fun81: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v28 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vl %v3, 288(%r15) -; CHECK-NEXT: vl %v4, 160(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v26, %v27, %v3, %v2 -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v2, %v0 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vceqh %v20, %v26, %v30 +; CHECK-NEXT: vsldb %v26, %v24, %v24, 12 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vuphf %v30, %v26 +; CHECK-NEXT: vmrlg %v26, %v24, %v24 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vsldb %v21, %v20, %v20, 12 +; CHECK-NEXT: vmrlg %v22, %v20, %v20 +; CHECK-NEXT: vpkg %v23, %v20, %v20 +; CHECK-NEXT: vuphf %v28, %v26 +; CHECK-NEXT: vpkg %v26, %v24, %v24 +; CHECK-NEXT: vuphh %v21, %v21 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v22, %v22 ; CHECK-NEXT: vl %v2, 320(%r15) ; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vsldb %v0, %v1, %v1, 12 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vl %v4, 304(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v6, 272(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vuphh %v20, %v20 +; CHECK-NEXT: vl %v16, 240(%r15) +; CHECK-NEXT: vl %v17, 288(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v18, 160(%r15) +; CHECK-NEXT: vl %v19, 224(%r15) +; CHECK-NEXT: vuphf %v21, %v21 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v24, %v25, %v19, %v24 +; CHECK-NEXT: vsel %v25, %v18, %v17, %v20 +; CHECK-NEXT: vsel %v26, %v27, %v16, %v26 +; CHECK-NEXT: vsel %v28, %v29, %v7, %v28 +; CHECK-NEXT: vsel %v30, %v31, %v6, %v30 +; CHECK-NEXT: vsel %v27, %v5, %v4, %v23 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v22 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v21 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i16> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 @@ -1396,22 +1412,22 @@ define <16 x float> @fun82(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4) { ; CHECK-LABEL: fun82: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v28 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: vceqh %v4, %v26, %v30 +; CHECK-NEXT: vceqh %v6, %v24, %v28 +; CHECK-NEXT: vmrlg %v5, %v4, %v4 +; CHECK-NEXT: vmrlg %v7, %v6, %v6 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v5, %v5 +; CHECK-NEXT: vuphh %v7, %v7 +; CHECK-NEXT: vuphh %v4, %v4 +; CHECK-NEXT: vuphh %v6, %v6 +; CHECK-NEXT: vsel %v24, %v25, %v3, %v6 +; CHECK-NEXT: vsel %v28, %v29, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v27, %v1, %v7 +; CHECK-NEXT: vsel %v30, %v31, %v0, %v5 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i16> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 @@ -1421,50 +1437,50 @@ define <16 x double> @fun83(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4) { ; CHECK-LABEL: fun83: ; CHECK: # BB#0: -; CHECK-NEXT: vceqh %v0, %v24, %v28 -; CHECK-NEXT: vuphh %v1, %v0 -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vceqh %v1, %v26, %v30 -; CHECK-NEXT: vuphh %v2, %v1 -; CHECK-NEXT: vl %v3, 288(%r15) -; CHECK-NEXT: vl %v4, 160(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 -; CHECK-NEXT: vpkg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vsel %v26, %v27, %v3, %v2 -; CHECK-NEXT: vmrlg %v2, %v0, %v0 -; CHECK-NEXT: vuphh %v2, %v2 -; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 -; CHECK-NEXT: vl %v3, 256(%r15) -; CHECK-NEXT: vuphf %v2, %v2 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 272(%r15) -; CHECK-NEXT: vl %v3, 176(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v2, %v0 -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vceqh %v24, %v24, %v28 +; CHECK-NEXT: vceqh %v20, %v26, %v30 +; CHECK-NEXT: vsldb %v26, %v24, %v24, 12 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vuphf %v30, %v26 +; CHECK-NEXT: vmrlg %v26, %v24, %v24 +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vsldb %v21, %v20, %v20, 12 +; CHECK-NEXT: vmrlg %v22, %v20, %v20 +; CHECK-NEXT: vpkg %v23, %v20, %v20 +; CHECK-NEXT: vuphf %v28, %v26 +; CHECK-NEXT: vpkg %v26, %v24, %v24 +; CHECK-NEXT: vuphh %v21, %v21 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v22, %v22 ; CHECK-NEXT: vl %v2, 320(%r15) ; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v29, %v3, %v2, %v0 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vsldb %v0, %v1, %v1, 12 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vuphh %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: vuphh %v23, %v23 +; CHECK-NEXT: vl %v4, 304(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vuphh %v26, %v26 +; CHECK-NEXT: vl %v6, 272(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vuphh %v20, %v20 +; CHECK-NEXT: vl %v16, 240(%r15) +; CHECK-NEXT: vl %v17, 288(%r15) +; CHECK-NEXT: vuphh %v24, %v24 +; CHECK-NEXT: vl %v18, 160(%r15) +; CHECK-NEXT: vl %v19, 224(%r15) +; CHECK-NEXT: vuphf %v21, %v21 +; CHECK-NEXT: vuphf %v22, %v22 +; CHECK-NEXT: vuphf %v23, %v23 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vuphf %v20, %v20 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v24, %v25, %v19, %v24 +; CHECK-NEXT: vsel %v25, %v18, %v17, %v20 +; CHECK-NEXT: vsel %v26, %v27, %v16, %v26 +; CHECK-NEXT: vsel %v28, %v29, %v7, %v28 +; CHECK-NEXT: vsel %v30, %v31, %v6, %v30 +; CHECK-NEXT: vsel %v27, %v5, %v4, %v23 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v22 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v21 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i16> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 @@ -1474,16 +1490,16 @@ define <16 x i8> @fun84(<16 x i32> %val1, <16 x i32> %val2, <16 x i8> %val3, <16 x i8> %val4) { ; CHECK-LABEL: fun84: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vceqf %v1, %v28, %v29 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vceqf %v1, %v26, %v27 -; CHECK-NEXT: vceqf %v2, %v24, %v25 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqf %v2, %v30, %v31 +; CHECK-NEXT: vceqf %v3, %v28, %v29 +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vceqf %v3, %v26, %v27 +; CHECK-NEXT: vceqf %v4, %v24, %v25 +; CHECK-NEXT: vpkf %v3, %v4, %v3 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkh %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i32> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 @@ -1493,18 +1509,18 @@ define <16 x i16> @fun85(<16 x i32> %val1, <16 x i32> %val2, <16 x i16> %val3, <16 x i16> %val4) { ; CHECK-LABEL: fun85: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v0, %v26, %v27 -; CHECK-NEXT: vceqf %v1, %v24, %v25 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vceqf %v1, %v28, %v29 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vceqf %v4, %v30, %v31 +; CHECK-NEXT: vceqf %v5, %v28, %v29 +; CHECK-NEXT: vpkf %v4, %v5, %v4 +; CHECK-NEXT: vceqf %v5, %v26, %v27 +; CHECK-NEXT: vceqf %v6, %v24, %v25 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vpkf %v5, %v6, %v5 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i32> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 @@ -1514,22 +1530,22 @@ define <16 x i32> @fun86(<16 x i32> %val1, <16 x i32> %val2, <16 x i32> %val3, <16 x i32> %val4) { ; CHECK-LABEL: fun86: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqf %v0, %v24, %v25 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqf %v0, %v26, %v27 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vceqf %v0, %v28, %v29 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vceqf %v16, %v30, %v31 +; CHECK-NEXT: vceqf %v17, %v28, %v29 +; CHECK-NEXT: vceqf %v18, %v26, %v27 +; CHECK-NEXT: vceqf %v19, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i32> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 @@ -1539,47 +1555,58 @@ define <16 x i64> @fun87(<16 x i32> %val1, <16 x i32> %val2, <16 x i64> %val3, <16 x i64> %val4) { ; CHECK-LABEL: fun87: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v1, %v24, %v25 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphf %v0, %v1 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vceqf %v2, %v26, %v27 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v0, %v2 -; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 -; CHECK-NEXT: vceqf %v3, %v28, %v29 -; CHECK-NEXT: vl %v5, 352(%r15) -; CHECK-NEXT: vl %v6, 224(%r15) -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vceqf %v4, %v30, %v31 -; CHECK-NEXT: vl %v6, 384(%r15) -; CHECK-NEXT: vl %v7, 256(%r15) -; CHECK-NEXT: vuphf %v5, %v4 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 -; CHECK-NEXT: vl %v5, 304(%r15) -; CHECK-NEXT: vl %v6, 176(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vl %v5, 208(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 -; CHECK-NEXT: vmrlg %v1, %v3, %v3 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vlr %v28, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v1, %v4, %v4 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi4: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi5: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi6: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vceqf %v28, %v28, %v29 +; CHECK-NEXT: vceqf %v26, %v26, %v27 +; CHECK-NEXT: vceqf %v24, %v24, %v25 +; CHECK-NEXT: vceqf %v30, %v30, %v31 +; CHECK-NEXT: vmrlg %v29, %v28, %v28 +; CHECK-NEXT: vmrlg %v27, %v26, %v26 +; CHECK-NEXT: vmrlg %v25, %v24, %v24 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vl %v6, 480(%r15) +; CHECK-NEXT: vl %v7, 352(%r15) +; CHECK-NEXT: vl %v20, 496(%r15) +; CHECK-NEXT: vl %v21, 368(%r15) +; CHECK-NEXT: vmrlg %v31, %v30, %v30 +; CHECK-NEXT: vuphf %v8, %v29 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vl %v0, 576(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v16, 560(%r15) +; CHECK-NEXT: vl %v17, 432(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v22, 464(%r15) +; CHECK-NEXT: vl %v23, 336(%r15) +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vuphf %v29, %v30 +; CHECK-NEXT: vuphf %v25, %v28 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v9 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v25 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v29 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i32> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 @@ -1589,22 +1616,22 @@ define <16 x float> @fun88(<16 x i32> %val1, <16 x i32> %val2, <16 x float> %val3, <16 x float> %val4) { ; CHECK-LABEL: fun88: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqf %v0, %v24, %v25 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vceqf %v0, %v26, %v27 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vceqf %v0, %v28, %v29 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vceqf %v0, %v30, %v31 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vceqf %v16, %v30, %v31 +; CHECK-NEXT: vceqf %v17, %v28, %v29 +; CHECK-NEXT: vceqf %v18, %v26, %v27 +; CHECK-NEXT: vceqf %v19, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i32> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 @@ -1614,47 +1641,58 @@ define <16 x double> @fun89(<16 x i32> %val1, <16 x i32> %val2, <16 x double> %val3, <16 x double> %val4) { ; CHECK-LABEL: fun89: ; CHECK: # BB#0: -; CHECK-NEXT: vceqf %v1, %v24, %v25 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vuphf %v0, %v1 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vceqf %v2, %v26, %v27 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vuphf %v0, %v2 -; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 -; CHECK-NEXT: vceqf %v3, %v28, %v29 -; CHECK-NEXT: vl %v5, 352(%r15) -; CHECK-NEXT: vl %v6, 224(%r15) -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vceqf %v4, %v30, %v31 -; CHECK-NEXT: vl %v6, 384(%r15) -; CHECK-NEXT: vl %v7, 256(%r15) -; CHECK-NEXT: vuphf %v5, %v4 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 -; CHECK-NEXT: vl %v5, 304(%r15) -; CHECK-NEXT: vl %v6, 176(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vl %v5, 208(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 -; CHECK-NEXT: vmrlg %v1, %v3, %v3 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vlr %v28, %v0 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v1, %v4, %v4 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi7: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi8: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi9: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vceqf %v28, %v28, %v29 +; CHECK-NEXT: vceqf %v26, %v26, %v27 +; CHECK-NEXT: vceqf %v24, %v24, %v25 +; CHECK-NEXT: vceqf %v30, %v30, %v31 +; CHECK-NEXT: vmrlg %v29, %v28, %v28 +; CHECK-NEXT: vmrlg %v27, %v26, %v26 +; CHECK-NEXT: vmrlg %v25, %v24, %v24 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vl %v6, 480(%r15) +; CHECK-NEXT: vl %v7, 352(%r15) +; CHECK-NEXT: vl %v20, 496(%r15) +; CHECK-NEXT: vl %v21, 368(%r15) +; CHECK-NEXT: vmrlg %v31, %v30, %v30 +; CHECK-NEXT: vuphf %v8, %v29 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vl %v0, 576(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v16, 560(%r15) +; CHECK-NEXT: vl %v17, 432(%r15) +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vl %v22, 464(%r15) +; CHECK-NEXT: vl %v23, 336(%r15) +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vuphf %v29, %v30 +; CHECK-NEXT: vuphf %v25, %v28 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v9 +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v25 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v29 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i32> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 @@ -1664,32 +1702,32 @@ define <16 x i8> @fun90(<16 x i64> %val1, <16 x i64> %val2, <16 x i8> %val3, <16 x i8> %val4) { ; CHECK-LABEL: fun90: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vceqg %v1, %v27, %v1 -; CHECK-NEXT: vceqg %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vceqg %v1, %v30, %v1 -; CHECK-NEXT: vceqg %v2, %v28, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vceqg %v2, %v26, %v2 -; CHECK-NEXT: vceqg %v3, %v24, %v3 -; CHECK-NEXT: vpkg %v2, %v3, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 304(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 240(%r15) +; CHECK-NEXT: vl %v16, 256(%r15) +; CHECK-NEXT: vl %v17, 272(%r15) +; CHECK-NEXT: vceqg %v17, %v31, %v17 +; CHECK-NEXT: vceqg %v16, %v29, %v16 +; CHECK-NEXT: vceqg %v7, %v27, %v7 +; CHECK-NEXT: vceqg %v6, %v25, %v6 +; CHECK-NEXT: vceqg %v5, %v30, %v5 +; CHECK-NEXT: vceqg %v4, %v28, %v4 +; CHECK-NEXT: vceqg %v3, %v26, %v3 +; CHECK-NEXT: vceqg %v2, %v24, %v2 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v6, %v6, %v16 +; CHECK-NEXT: vpkf %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v6 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i64> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 @@ -1699,34 +1737,34 @@ define <16 x i16> @fun91(<16 x i64> %val1, <16 x i64> %val2, <16 x i16> %val3, <16 x i16> %val4) { ; CHECK-LABEL: fun91: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v0 -; CHECK-NEXT: vceqg %v1, %v28, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vceqg %v1, %v26, %v1 -; CHECK-NEXT: vceqg %v2, %v24, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vceqg %v1, %v27, %v1 -; CHECK-NEXT: vceqg %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 192(%r15) +; CHECK-NEXT: vl %v7, 208(%r15) +; CHECK-NEXT: vl %v16, 224(%r15) +; CHECK-NEXT: vl %v17, 240(%r15) +; CHECK-NEXT: vl %v18, 256(%r15) +; CHECK-NEXT: vl %v19, 272(%r15) +; CHECK-NEXT: vceqg %v19, %v31, %v19 +; CHECK-NEXT: vceqg %v18, %v29, %v18 +; CHECK-NEXT: vceqg %v17, %v27, %v17 +; CHECK-NEXT: vceqg %v16, %v25, %v16 +; CHECK-NEXT: vceqg %v7, %v30, %v7 +; CHECK-NEXT: vceqg %v6, %v28, %v6 +; CHECK-NEXT: vceqg %v5, %v26, %v5 +; CHECK-NEXT: vceqg %v4, %v24, %v4 +; CHECK-NEXT: vpkg %v18, %v18, %v19 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vpkf %v16, %v16, %v18 +; CHECK-NEXT: vpkf %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i64> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 @@ -1736,38 +1774,38 @@ define <16 x i32> @fun92(<16 x i64> %val1, <16 x i64> %val2, <16 x i32> %val3, <16 x i32> %val4) { ; CHECK-LABEL: fun92: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v26, %v0 -; CHECK-NEXT: vceqg %v1, %v24, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 352(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v0 -; CHECK-NEXT: vceqg %v1, %v28, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 368(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 384(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 208(%r15) +; CHECK-NEXT: vl %v20, 224(%r15) +; CHECK-NEXT: vl %v21, 240(%r15) +; CHECK-NEXT: vl %v22, 256(%r15) +; CHECK-NEXT: vl %v23, 272(%r15) +; CHECK-NEXT: vceqg %v23, %v31, %v23 +; CHECK-NEXT: vceqg %v22, %v29, %v22 +; CHECK-NEXT: vceqg %v21, %v27, %v21 +; CHECK-NEXT: vceqg %v20, %v25, %v20 +; CHECK-NEXT: vceqg %v19, %v30, %v19 +; CHECK-NEXT: vceqg %v18, %v28, %v18 +; CHECK-NEXT: vceqg %v17, %v26, %v17 +; CHECK-NEXT: vceqg %v16, %v24, %v16 +; CHECK-NEXT: vl %v0, 400(%r15) +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 352(%r15) +; CHECK-NEXT: vl %v7, 288(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v23 +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v18, %v18, %v19 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v20 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v22 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i64> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 @@ -1777,46 +1815,82 @@ define <16 x i64> @fun93(<16 x i64> %val1, <16 x i64> %val2, <16 x i64> %val3, <16 x i64> %val4) { ; CHECK-LABEL: fun93: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vl %v1, 416(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vceqg %v0, %v24, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vceqg %v0, %v26, %v0 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vl %v1, 448(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vceqg %v0, %v28, %v0 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 224(%r15) -; CHECK-NEXT: vl %v1, 480(%r15) -; CHECK-NEXT: vl %v2, 352(%r15) -; CHECK-NEXT: vceqg %v0, %v25, %v0 -; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 496(%r15) -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v29, %v0 -; CHECK-NEXT: vl %v1, 512(%r15) -; CHECK-NEXT: vl %v2, 384(%r15) -; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vl %v1, 528(%r15) -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -224 +; CHECK-NEXT: .Lcfi10: +; CHECK-NEXT: .cfi_def_cfa_offset 384 +; CHECK-NEXT: std %f8, 216(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 208(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 200(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 192(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f12, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f13, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f14, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f15, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi11: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi12: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi13: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi14: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: .Lcfi15: +; CHECK-NEXT: .cfi_offset %f12, -200 +; CHECK-NEXT: .Lcfi16: +; CHECK-NEXT: .cfi_offset %f13, -208 +; CHECK-NEXT: .Lcfi17: +; CHECK-NEXT: .cfi_offset %f14, -216 +; CHECK-NEXT: .Lcfi18: +; CHECK-NEXT: .cfi_offset %f15, -224 +; CHECK-NEXT: vl %v8, 384(%r15) +; CHECK-NEXT: vl %v9, 400(%r15) +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v12, 448(%r15) +; CHECK-NEXT: vceqg %v25, %v25, %v12 +; CHECK-NEXT: vl %v13, 464(%r15) +; CHECK-NEXT: vceqg %v27, %v27, %v13 +; CHECK-NEXT: vceqg %v30, %v30, %v11 +; CHECK-NEXT: vl %v14, 480(%r15) +; CHECK-NEXT: vceqg %v29, %v29, %v14 +; CHECK-NEXT: vceqg %v28, %v28, %v10 +; CHECK-NEXT: vl %v15, 496(%r15) +; CHECK-NEXT: vceqg %v31, %v31, %v15 +; CHECK-NEXT: vceqg %v26, %v26, %v9 +; CHECK-NEXT: vl %v0, 752(%r15) +; CHECK-NEXT: vceqg %v24, %v24, %v8 +; CHECK-NEXT: vl %v1, 624(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: vl %v2, 736(%r15) +; CHECK-NEXT: vl %v3, 608(%r15) +; CHECK-NEXT: vsel %v29, %v3, %v2, %v29 +; CHECK-NEXT: vl %v4, 720(%r15) +; CHECK-NEXT: vl %v5, 592(%r15) +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: vl %v6, 704(%r15) +; CHECK-NEXT: vl %v7, 576(%r15) +; CHECK-NEXT: vsel %v25, %v7, %v6, %v25 +; CHECK-NEXT: vl %v16, 688(%r15) +; CHECK-NEXT: vl %v17, 560(%r15) +; CHECK-NEXT: vsel %v30, %v17, %v16, %v30 +; CHECK-NEXT: vl %v18, 672(%r15) +; CHECK-NEXT: vl %v19, 544(%r15) +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vl %v20, 656(%r15) +; CHECK-NEXT: vl %v21, 528(%r15) +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vl %v22, 640(%r15) +; CHECK-NEXT: vl %v23, 512(%r15) +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: ld %f8, 216(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f9, 208(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 200(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f11, 192(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f12, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f13, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f14, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f15, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: aghi %r15, 224 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i64> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 @@ -1826,38 +1900,38 @@ define <16 x float> @fun94(<16 x i64> %val1, <16 x i64> %val2, <16 x float> %val3, <16 x float> %val4) { ; CHECK-LABEL: fun94: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vceqg %v0, %v26, %v0 -; CHECK-NEXT: vceqg %v1, %v24, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 352(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v0 -; CHECK-NEXT: vceqg %v1, %v28, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 368(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vceqg %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 384(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vceqg %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 208(%r15) +; CHECK-NEXT: vl %v20, 224(%r15) +; CHECK-NEXT: vl %v21, 240(%r15) +; CHECK-NEXT: vl %v22, 256(%r15) +; CHECK-NEXT: vl %v23, 272(%r15) +; CHECK-NEXT: vceqg %v23, %v31, %v23 +; CHECK-NEXT: vceqg %v22, %v29, %v22 +; CHECK-NEXT: vceqg %v21, %v27, %v21 +; CHECK-NEXT: vceqg %v20, %v25, %v20 +; CHECK-NEXT: vceqg %v19, %v30, %v19 +; CHECK-NEXT: vceqg %v18, %v28, %v18 +; CHECK-NEXT: vceqg %v17, %v26, %v17 +; CHECK-NEXT: vceqg %v16, %v24, %v16 +; CHECK-NEXT: vl %v0, 400(%r15) +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 352(%r15) +; CHECK-NEXT: vl %v7, 288(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v23 +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v18, %v18, %v19 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v20 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v22 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i64> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 @@ -1867,46 +1941,82 @@ define <16 x double> @fun95(<16 x i64> %val1, <16 x i64> %val2, <16 x double> %val3, <16 x double> %val4) { ; CHECK-LABEL: fun95: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vl %v1, 416(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vceqg %v0, %v24, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vceqg %v0, %v26, %v0 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vl %v1, 448(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vceqg %v0, %v28, %v0 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vceqg %v0, %v30, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 224(%r15) -; CHECK-NEXT: vl %v1, 480(%r15) -; CHECK-NEXT: vl %v2, 352(%r15) -; CHECK-NEXT: vceqg %v0, %v25, %v0 -; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 496(%r15) -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vceqg %v0, %v27, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 256(%r15) -; CHECK-NEXT: vceqg %v0, %v29, %v0 -; CHECK-NEXT: vl %v1, 512(%r15) -; CHECK-NEXT: vl %v2, 384(%r15) -; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vceqg %v0, %v31, %v0 -; CHECK-NEXT: vl %v1, 528(%r15) -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -224 +; CHECK-NEXT: .Lcfi19: +; CHECK-NEXT: .cfi_def_cfa_offset 384 +; CHECK-NEXT: std %f8, 216(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 208(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 200(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 192(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f12, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f13, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f14, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f15, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi20: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi21: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi22: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi23: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: .Lcfi24: +; CHECK-NEXT: .cfi_offset %f12, -200 +; CHECK-NEXT: .Lcfi25: +; CHECK-NEXT: .cfi_offset %f13, -208 +; CHECK-NEXT: .Lcfi26: +; CHECK-NEXT: .cfi_offset %f14, -216 +; CHECK-NEXT: .Lcfi27: +; CHECK-NEXT: .cfi_offset %f15, -224 +; CHECK-NEXT: vl %v8, 384(%r15) +; CHECK-NEXT: vl %v9, 400(%r15) +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v12, 448(%r15) +; CHECK-NEXT: vceqg %v25, %v25, %v12 +; CHECK-NEXT: vl %v13, 464(%r15) +; CHECK-NEXT: vceqg %v27, %v27, %v13 +; CHECK-NEXT: vceqg %v30, %v30, %v11 +; CHECK-NEXT: vl %v14, 480(%r15) +; CHECK-NEXT: vceqg %v29, %v29, %v14 +; CHECK-NEXT: vceqg %v28, %v28, %v10 +; CHECK-NEXT: vl %v15, 496(%r15) +; CHECK-NEXT: vceqg %v31, %v31, %v15 +; CHECK-NEXT: vceqg %v26, %v26, %v9 +; CHECK-NEXT: vl %v0, 752(%r15) +; CHECK-NEXT: vceqg %v24, %v24, %v8 +; CHECK-NEXT: vl %v1, 624(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: vl %v2, 736(%r15) +; CHECK-NEXT: vl %v3, 608(%r15) +; CHECK-NEXT: vsel %v29, %v3, %v2, %v29 +; CHECK-NEXT: vl %v4, 720(%r15) +; CHECK-NEXT: vl %v5, 592(%r15) +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: vl %v6, 704(%r15) +; CHECK-NEXT: vl %v7, 576(%r15) +; CHECK-NEXT: vsel %v25, %v7, %v6, %v25 +; CHECK-NEXT: vl %v16, 688(%r15) +; CHECK-NEXT: vl %v17, 560(%r15) +; CHECK-NEXT: vsel %v30, %v17, %v16, %v30 +; CHECK-NEXT: vl %v18, 672(%r15) +; CHECK-NEXT: vl %v19, 544(%r15) +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vl %v20, 656(%r15) +; CHECK-NEXT: vl %v21, 528(%r15) +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vl %v22, 640(%r15) +; CHECK-NEXT: vl %v23, 512(%r15) +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: ld %f8, 216(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f9, 208(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 200(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f11, 192(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f12, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f13, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f14, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f15, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: aghi %r15, 224 ; CHECK-NEXT: br %r14 %cmp = icmp eq <16 x i64> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 @@ -2199,11 +2309,11 @@ ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <4 x float> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 @@ -2245,11 +2355,11 @@ ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 ; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 -; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v0 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v1 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <4 x float> %val1, %val2 %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 @@ -2302,9 +2412,9 @@ define <4 x i64> @fun117(<4 x double> %val1, <4 x double> %val2, <4 x i64> %val3, <4 x i64> %val4) { ; CHECK-LABEL: fun117: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <4 x double> %val1, %val2 @@ -2328,9 +2438,9 @@ define <4 x double> @fun119(<4 x double> %val1, <4 x double> %val2, <4 x double> %val3, <4 x double> %val4) { ; CHECK-LABEL: fun119: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v24, %v28 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <4 x double> %val1, %val2 @@ -2409,30 +2519,30 @@ define <8 x i32> @fun122(<8 x float> %val1, <8 x float> %val2, <8 x i32> %val3, <8 x i32> %val4) { ; CHECK-LABEL: fun122: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 ; CHECK-NEXT: vmrlf %v0, %v30, %v30 ; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 ; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 ; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 ; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 ; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x float> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 @@ -2442,75 +2552,75 @@ define <8 x i64> @fun123(<8 x float> %val1, <8 x float> %val2, <8 x i64> %val3, <8 x i64> %val4) { ; CHECK-LABEL: fun123: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vmrlf %v4, %v30, %v30 +; CHECK-NEXT: vmrlf %v5, %v26, %v26 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v30, %v30 +; CHECK-NEXT: vmrhf %v6, %v26, %v26 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrlf %v6, %v28, %v28 +; CHECK-NEXT: vmrlf %v7, %v24, %v24 +; CHECK-NEXT: vmrhf %v16, %v24, %v24 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vmrlg %v5, %v4, %v4 +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vsel %v30, %v31, %v0, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vmrhf %v7, %v28, %v28 +; CHECK-NEXT: vsel %v28, %v29, %v2, %v4 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vpkg %v6, %v7, %v6 +; CHECK-NEXT: vmrlg %v7, %v6, %v6 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vsel %v24, %v25, %v3, %v6 +; CHECK-NEXT: vsel %v26, %v27, %v1, %v7 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun124(<8 x float> %val1, <8 x float> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun124: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 ; CHECK-NEXT: vldeb %v0, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 ; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) ; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 ; CHECK-NEXT: vldeb %v1, %v1 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) ; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 -; CHECK-NEXT: br %r14 - %cmp = fcmp ogt <8 x float> %val1, %val2 - %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 - ret <8 x i64> %sel -} - -define <8 x float> @fun124(<8 x float> %val1, <8 x float> %val2, <8 x float> %val3, <8 x float> %val4) { -; CHECK-LABEL: fun124: -; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 -; CHECK-NEXT: vmrlf %v0, %v30, %v30 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x float> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 @@ -2520,42 +2630,42 @@ define <8 x double> @fun125(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4) { ; CHECK-LABEL: fun125: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v28, %v28 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vuphf %v1, %v0 -; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrlg %v0, %v0, %v0 -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 192(%r15) -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vuphf %v2, %v1 -; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 -; CHECK-NEXT: vmrlg %v0, %v1, %v1 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vuphf %v0, %v0 -; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: vmrlf %v4, %v30, %v30 +; CHECK-NEXT: vmrlf %v5, %v26, %v26 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v30, %v30 +; CHECK-NEXT: vmrhf %v6, %v26, %v26 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrlf %v6, %v28, %v28 +; CHECK-NEXT: vmrlf %v7, %v24, %v24 +; CHECK-NEXT: vmrhf %v16, %v24, %v24 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vmrlg %v5, %v4, %v4 +; CHECK-NEXT: vuphf %v5, %v5 +; CHECK-NEXT: vuphf %v4, %v4 +; CHECK-NEXT: vsel %v30, %v31, %v0, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vmrhf %v7, %v28, %v28 +; CHECK-NEXT: vsel %v28, %v29, %v2, %v4 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vpkg %v6, %v7, %v6 +; CHECK-NEXT: vmrlg %v7, %v6, %v6 +; CHECK-NEXT: vuphf %v7, %v7 +; CHECK-NEXT: vuphf %v6, %v6 +; CHECK-NEXT: vsel %v24, %v25, %v3, %v6 +; CHECK-NEXT: vsel %v26, %v27, %v1, %v7 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x float> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 @@ -2565,18 +2675,18 @@ define <8 x i8> @fun126(<8 x double> %val1, <8 x double> %val2, <8 x i8> %val3, <8 x i8> %val4) { ; CHECK-LABEL: fun126: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vfchdb %v1, %v26, %v27 -; CHECK-NEXT: vfchdb %v2, %v24, %v25 +; CHECK-NEXT: vfchdb %v2, %v30, %v31 +; CHECK-NEXT: vfchdb %v3, %v28, %v29 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vfchdb %v3, %v26, %v27 +; CHECK-NEXT: vfchdb %v4, %v24, %v25 ; CHECK-NEXT: larl %r1, .LCPI126_0 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 0(%r1) -; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 -; CHECK-NEXT: vlrepg %v1, 168(%r15) -; CHECK-NEXT: vlrepg %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vl %v4, 0(%r1) +; CHECK-NEXT: vlrepg %v0, 168(%r15) +; CHECK-NEXT: vlrepg %v1, 160(%r15) +; CHECK-NEXT: vperm %v2, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x double> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 @@ -2586,16 +2696,16 @@ define <8 x i16> @fun127(<8 x double> %val1, <8 x double> %val2, <8 x i16> %val3, <8 x i16> %val4) { ; CHECK-LABEL: fun127: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vfchdb %v1, %v26, %v27 -; CHECK-NEXT: vfchdb %v2, %v24, %v25 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v30, %v31 +; CHECK-NEXT: vfchdb %v3, %v28, %v29 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vfchdb %v3, %v26, %v27 +; CHECK-NEXT: vfchdb %v4, %v24, %v25 +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x double> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 @@ -2605,18 +2715,18 @@ define <8 x i32> @fun128(<8 x double> %val1, <8 x double> %val2, <8 x i32> %val3, <8 x i32> %val4) { ; CHECK-LABEL: fun128: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v26, %v27 -; CHECK-NEXT: vfchdb %v1, %v24, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v4, %v30, %v31 +; CHECK-NEXT: vfchdb %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vfchdb %v5, %v26, %v27 +; CHECK-NEXT: vfchdb %v6, %v24, %v25 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vpkg %v5, %v6, %v5 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x double> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 @@ -2626,22 +2736,22 @@ define <8 x i64> @fun129(<8 x double> %val1, <8 x double> %val2, <8 x i64> %val3, <8 x i64> %val4) { ; CHECK-LABEL: fun129: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v24, %v25 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v26, %v27 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v28, %v29 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vfchdb %v16, %v30, %v31 +; CHECK-NEXT: vfchdb %v17, %v28, %v29 +; CHECK-NEXT: vfchdb %v18, %v26, %v27 +; CHECK-NEXT: vfchdb %v19, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x double> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 @@ -2651,18 +2761,18 @@ define <8 x float> @fun130(<8 x double> %val1, <8 x double> %val2, <8 x float> %val3, <8 x float> %val4) { ; CHECK-LABEL: fun130: ; CHECK: # BB#0: -; CHECK-NEXT: vfchdb %v0, %v26, %v27 -; CHECK-NEXT: vfchdb %v1, %v24, %v25 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vfchdb %v1, %v28, %v29 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v4, %v30, %v31 +; CHECK-NEXT: vfchdb %v5, %v28, %v29 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vfchdb %v5, %v26, %v27 +; CHECK-NEXT: vfchdb %v6, %v24, %v25 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vpkg %v5, %v6, %v5 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x double> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 @@ -2672,22 +2782,22 @@ define <8 x double> @fun131(<8 x double> %val1, <8 x double> %val2, <8 x double> %val3, <8 x double> %val4) { ; CHECK-LABEL: fun131: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v24, %v25 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vfchdb %v0, %v26, %v27 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v28, %v29 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v31 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vfchdb %v16, %v30, %v31 +; CHECK-NEXT: vfchdb %v17, %v28, %v29 +; CHECK-NEXT: vfchdb %v18, %v26, %v27 +; CHECK-NEXT: vfchdb %v19, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <8 x double> %val1, %val2 %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 @@ -2697,56 +2807,56 @@ define <16 x i8> @fun132(<16 x float> %val1, <16 x float> %val2, <16 x i8> %val3, <16 x i8> %val4) { ; CHECK-LABEL: fun132: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vmrhf %v4, %v24, %v24 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v29, %v29 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v31, %v31 +; CHECK-NEXT: vmrlf %v3, %v30, %v30 ; CHECK-NEXT: vldeb %v2, %v2 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v27, %v27 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v27, %v27 -; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vmrhf %v3, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v30, %v30 ; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vmrlf %v2, %v25, %v25 -; CHECK-NEXT: vmrlf %v3, %v24, %v24 -; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vmrlf %v3, %v29, %v29 +; CHECK-NEXT: vmrlf %v4, %v28, %v28 +; CHECK-NEXT: vmrhf %v5, %v28, %v28 +; CHECK-NEXT: vmrhf %v6, %v24, %v24 ; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vmrhf %v3, %v25, %v25 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vpkf %v2, %v3, %v2 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrlf %v4, %v26, %v26 +; CHECK-NEXT: vmrhf %v5, %v26, %v26 ; CHECK-NEXT: vldeb %v3, %v3 ; CHECK-NEXT: vldeb %v4, %v4 ; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vpkg %v2, %v3, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vmrlf %v5, %v24, %v24 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v25, %v25 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vpkf %v3, %v4, %v3 +; CHECK-NEXT: vpkh %v2, %v3, %v2 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x float> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 @@ -2756,58 +2866,58 @@ define <16 x i16> @fun133(<16 x float> %val1, <16 x float> %val2, <16 x i16> %val3, <16 x i16> %val4) { ; CHECK-LABEL: fun133: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vmrhf %v3, %v24, %v24 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v25, %v25 -; CHECK-NEXT: vmrlf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v25, %v25 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vmrhf %v3, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vmrlf %v1, %v29, %v29 -; CHECK-NEXT: vmrlf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vmrhf %v2, %v29, %v29 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v4, %v31, %v31 +; CHECK-NEXT: vmrlf %v5, %v30, %v30 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v31, %v31 +; CHECK-NEXT: vmrhf %v6, %v30, %v30 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vmrlf %v5, %v29, %v29 +; CHECK-NEXT: vmrlf %v6, %v28, %v28 +; CHECK-NEXT: vmrhf %v7, %v28, %v28 +; CHECK-NEXT: vmrhf %v16, %v24, %v24 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v29, %v29 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vpkg %v5, %v6, %v5 +; CHECK-NEXT: vpkf %v4, %v5, %v4 +; CHECK-NEXT: vmrlf %v5, %v27, %v27 +; CHECK-NEXT: vmrlf %v6, %v26, %v26 +; CHECK-NEXT: vmrhf %v7, %v26, %v26 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v27, %v27 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vpkg %v5, %v6, %v5 +; CHECK-NEXT: vmrlf %v6, %v25, %v25 +; CHECK-NEXT: vmrlf %v7, %v24, %v24 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vfchdb %v6, %v7, %v6 +; CHECK-NEXT: vmrhf %v7, %v25, %v25 +; CHECK-NEXT: vldeb %v7, %v7 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vfchdb %v7, %v16, %v7 +; CHECK-NEXT: vpkg %v6, %v7, %v6 +; CHECK-NEXT: vpkf %v5, %v6, %v5 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v5 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x float> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 @@ -2817,62 +2927,62 @@ define <16 x i32> @fun134(<16 x float> %val1, <16 x float> %val2, <16 x i32> %val3, <16 x i32> %val4) { ; CHECK-LABEL: fun134: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v25, %v25 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v25, %v25 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v29, %v29 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v29, %v29 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v16, %v31, %v31 +; CHECK-NEXT: vmrlf %v17, %v30, %v30 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vmrhf %v17, %v31, %v31 +; CHECK-NEXT: vmrhf %v18, %v30, %v30 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vpkg %v16, %v17, %v16 +; CHECK-NEXT: vmrlf %v17, %v29, %v29 +; CHECK-NEXT: vmrlf %v18, %v28, %v28 +; CHECK-NEXT: vmrhf %v19, %v28, %v28 +; CHECK-NEXT: vmrhf %v20, %v26, %v26 +; CHECK-NEXT: vmrhf %v21, %v24, %v24 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vmrhf %v18, %v29, %v29 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vpkg %v17, %v18, %v17 +; CHECK-NEXT: vmrlf %v18, %v27, %v27 +; CHECK-NEXT: vmrlf %v19, %v26, %v26 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vmrhf %v19, %v27, %v27 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vpkg %v18, %v19, %v18 +; CHECK-NEXT: vmrlf %v19, %v25, %v25 +; CHECK-NEXT: vmrlf %v20, %v24, %v24 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vmrhf %v20, %v25, %v25 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vpkg %v19, %v20, %v19 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x float> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 @@ -2882,87 +2992,98 @@ define <16 x i64> @fun135(<16 x float> %val1, <16 x float> %val2, <16 x i64> %val3, <16 x i64> %val4) { ; CHECK-LABEL: fun135: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v25, %v25 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v25, %v25 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vl %v6, 224(%r15) -; CHECK-NEXT: vl %v7, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vpkg %v1, %v1, %v0 -; CHECK-NEXT: vuphf %v0, %v1 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vmrhf %v5, %v28, %v28 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vmrhf %v2, %v27, %v27 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vpkg %v2, %v2, %v0 -; CHECK-NEXT: vuphf %v0, %v2 -; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 -; CHECK-NEXT: vmrlf %v3, %v29, %v29 -; CHECK-NEXT: vmrlf %v4, %v28, %v28 -; CHECK-NEXT: vlr %v28, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v29, %v29 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vfchdb %v4, %v5, %v4 -; CHECK-NEXT: vl %v5, 352(%r15) -; CHECK-NEXT: vpkg %v3, %v4, %v3 -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vmrlf %v4, %v31, %v31 -; CHECK-NEXT: vmrlf %v5, %v30, %v30 -; CHECK-NEXT: vmrhf %v6, %v30, %v30 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vfchdb %v4, %v5, %v4 -; CHECK-NEXT: vmrhf %v5, %v31, %v31 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v5, %v6, %v5 -; CHECK-NEXT: vl %v6, 384(%r15) -; CHECK-NEXT: vpkg %v4, %v5, %v4 -; CHECK-NEXT: vuphf %v5, %v4 -; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 -; CHECK-NEXT: vl %v5, 304(%r15) -; CHECK-NEXT: vl %v6, 176(%r15) -; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 -; CHECK-NEXT: vl %v5, 208(%r15) -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vmrlg %v1, %v3, %v3 -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v1, %v4, %v4 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi28: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi29: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi30: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vmrlf %v8, %v31, %v31 +; CHECK-NEXT: vmrlf %v9, %v30, %v30 +; CHECK-NEXT: vmrhf %v31, %v31, %v31 +; CHECK-NEXT: vmrhf %v30, %v30, %v30 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v31, %v31 +; CHECK-NEXT: vldeb %v30, %v30 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vfchdb %v8, %v9, %v8 +; CHECK-NEXT: vl %v6, 480(%r15) +; CHECK-NEXT: vl %v7, 352(%r15) +; CHECK-NEXT: vfchdb %v30, %v30, %v31 +; CHECK-NEXT: vl %v20, 496(%r15) +; CHECK-NEXT: vl %v21, 368(%r15) +; CHECK-NEXT: vpkg %v30, %v30, %v8 +; CHECK-NEXT: vl %v0, 576(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vmrlf %v8, %v29, %v29 +; CHECK-NEXT: vl %v16, 560(%r15) +; CHECK-NEXT: vl %v17, 432(%r15) +; CHECK-NEXT: vmrlf %v9, %v28, %v28 +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vmrhf %v29, %v29, %v29 +; CHECK-NEXT: vl %v22, 464(%r15) +; CHECK-NEXT: vl %v23, 336(%r15) +; CHECK-NEXT: vmrhf %v28, %v28, %v28 +; CHECK-NEXT: vmrlg %v31, %v30, %v30 +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vfchdb %v8, %v9, %v8 +; CHECK-NEXT: vmrlf %v9, %v26, %v26 +; CHECK-NEXT: vmrhf %v26, %v26, %v26 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vldeb %v28, %v28 +; CHECK-NEXT: vfchdb %v28, %v28, %v29 +; CHECK-NEXT: vpkg %v28, %v28, %v8 +; CHECK-NEXT: vmrlg %v29, %v28, %v28 +; CHECK-NEXT: vuphf %v8, %v29 +; CHECK-NEXT: vmrlf %v29, %v27, %v27 +; CHECK-NEXT: vmrhf %v27, %v27, %v27 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vfchdb %v29, %v9, %v29 +; CHECK-NEXT: vmrlf %v9, %v24, %v24 +; CHECK-NEXT: vmrhf %v24, %v24, %v24 +; CHECK-NEXT: vldeb %v27, %v27 +; CHECK-NEXT: vldeb %v26, %v26 +; CHECK-NEXT: vfchdb %v26, %v26, %v27 +; CHECK-NEXT: vpkg %v26, %v26, %v29 +; CHECK-NEXT: vmrlf %v29, %v25, %v25 +; CHECK-NEXT: vmrhf %v25, %v25, %v25 +; CHECK-NEXT: vmrlg %v27, %v26, %v26 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vfchdb %v29, %v9, %v29 +; CHECK-NEXT: vldeb %v25, %v25 +; CHECK-NEXT: vldeb %v24, %v24 +; CHECK-NEXT: vfchdb %v24, %v24, %v25 +; CHECK-NEXT: vpkg %v24, %v24, %v29 +; CHECK-NEXT: vmrlg %v25, %v24, %v24 +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vuphf %v29, %v30 +; CHECK-NEXT: vuphf %v25, %v28 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v9 +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v25 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v29 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x float> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 @@ -2972,62 +3093,62 @@ define <16 x float> @fun136(<16 x float> %val1, <16 x float> %val2, <16 x float> %val3, <16 x float> %val4) { ; CHECK-LABEL: fun136: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v25, %v25 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v25, %v25 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v1, %v26, %v26 -; CHECK-NEXT: vmrhf %v2, %v26, %v26 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v27, %v27 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v29, %v29 -; CHECK-NEXT: vmrlf %v1, %v28, %v28 -; CHECK-NEXT: vmrhf %v2, %v28, %v28 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v29, %v29 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vmrlf %v0, %v31, %v31 -; CHECK-NEXT: vmrlf %v1, %v30, %v30 -; CHECK-NEXT: vmrhf %v2, %v30, %v30 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v31, %v31 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 208(%r15) -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 272(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v16, %v31, %v31 +; CHECK-NEXT: vmrlf %v17, %v30, %v30 +; CHECK-NEXT: vldeb %v16, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vfchdb %v16, %v17, %v16 +; CHECK-NEXT: vmrhf %v17, %v31, %v31 +; CHECK-NEXT: vmrhf %v18, %v30, %v30 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 160(%r15) +; CHECK-NEXT: vpkg %v16, %v17, %v16 +; CHECK-NEXT: vmrlf %v17, %v29, %v29 +; CHECK-NEXT: vmrlf %v18, %v28, %v28 +; CHECK-NEXT: vmrhf %v19, %v28, %v28 +; CHECK-NEXT: vmrhf %v20, %v26, %v26 +; CHECK-NEXT: vmrhf %v21, %v24, %v24 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v16 +; CHECK-NEXT: vldeb %v17, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vfchdb %v17, %v18, %v17 +; CHECK-NEXT: vmrhf %v18, %v29, %v29 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vpkg %v17, %v18, %v17 +; CHECK-NEXT: vmrlf %v18, %v27, %v27 +; CHECK-NEXT: vmrlf %v19, %v26, %v26 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v17 +; CHECK-NEXT: vldeb %v18, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vfchdb %v18, %v19, %v18 +; CHECK-NEXT: vmrhf %v19, %v27, %v27 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vpkg %v18, %v19, %v18 +; CHECK-NEXT: vmrlf %v19, %v25, %v25 +; CHECK-NEXT: vmrlf %v20, %v24, %v24 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vldeb %v19, %v19 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vfchdb %v19, %v20, %v19 +; CHECK-NEXT: vmrhf %v20, %v25, %v25 +; CHECK-NEXT: vldeb %v20, %v20 +; CHECK-NEXT: vldeb %v21, %v21 +; CHECK-NEXT: vfchdb %v20, %v21, %v20 +; CHECK-NEXT: vpkg %v19, %v20, %v19 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v19 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x float> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 @@ -3037,87 +3158,98 @@ define <16 x double> @fun137(<16 x float> %val1, <16 x float> %val2, <16 x double> %val3, <16 x double> %val4) { ; CHECK-LABEL: fun137: ; CHECK: # BB#0: -; CHECK-NEXT: vmrlf %v0, %v25, %v25 -; CHECK-NEXT: vmrlf %v1, %v24, %v24 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vfchdb %v0, %v1, %v0 -; CHECK-NEXT: vmrhf %v1, %v25, %v25 -; CHECK-NEXT: vmrhf %v2, %v24, %v24 -; CHECK-NEXT: vldeb %v1, %v1 -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vl %v4, 192(%r15) -; CHECK-NEXT: vl %v6, 224(%r15) -; CHECK-NEXT: vl %v7, 256(%r15) -; CHECK-NEXT: vfchdb %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vpkg %v1, %v1, %v0 -; CHECK-NEXT: vuphf %v0, %v1 -; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 -; CHECK-NEXT: vmrlf %v0, %v27, %v27 -; CHECK-NEXT: vmrlf %v2, %v26, %v26 -; CHECK-NEXT: vmrhf %v3, %v26, %v26 -; CHECK-NEXT: vmrhf %v5, %v28, %v28 -; CHECK-NEXT: vmrlg %v1, %v1, %v1 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vldeb %v0, %v0 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vfchdb %v0, %v2, %v0 -; CHECK-NEXT: vmrhf %v2, %v27, %v27 -; CHECK-NEXT: vldeb %v2, %v2 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vfchdb %v2, %v3, %v2 -; CHECK-NEXT: vl %v3, 320(%r15) -; CHECK-NEXT: vpkg %v2, %v2, %v0 -; CHECK-NEXT: vuphf %v0, %v2 -; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 -; CHECK-NEXT: vmrlf %v3, %v29, %v29 -; CHECK-NEXT: vmrlf %v4, %v28, %v28 -; CHECK-NEXT: vlr %v28, %v0 -; CHECK-NEXT: vldeb %v3, %v3 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vfchdb %v3, %v4, %v3 -; CHECK-NEXT: vmrhf %v4, %v29, %v29 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vfchdb %v4, %v5, %v4 -; CHECK-NEXT: vl %v5, 352(%r15) -; CHECK-NEXT: vpkg %v3, %v4, %v3 -; CHECK-NEXT: vuphf %v4, %v3 -; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 -; CHECK-NEXT: vmrlf %v4, %v31, %v31 -; CHECK-NEXT: vmrlf %v5, %v30, %v30 -; CHECK-NEXT: vmrhf %v6, %v30, %v30 -; CHECK-NEXT: vldeb %v4, %v4 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vfchdb %v4, %v5, %v4 -; CHECK-NEXT: vmrhf %v5, %v31, %v31 -; CHECK-NEXT: vldeb %v5, %v5 -; CHECK-NEXT: vldeb %v6, %v6 -; CHECK-NEXT: vfchdb %v5, %v6, %v5 -; CHECK-NEXT: vl %v6, 384(%r15) -; CHECK-NEXT: vpkg %v4, %v5, %v4 -; CHECK-NEXT: vuphf %v5, %v4 -; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 -; CHECK-NEXT: vl %v5, 304(%r15) -; CHECK-NEXT: vl %v6, 176(%r15) -; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 -; CHECK-NEXT: vl %v5, 208(%r15) -; CHECK-NEXT: vmrlg %v1, %v2, %v2 -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vmrlg %v1, %v3, %v3 -; CHECK-NEXT: vl %v3, 240(%r15) -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vl %v3, 272(%r15) -; CHECK-NEXT: vmrlg %v1, %v4, %v4 -; CHECK-NEXT: vuphf %v1, %v1 -; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: aghi %r15, -176 +; CHECK-NEXT: .Lcfi31: +; CHECK-NEXT: .cfi_def_cfa_offset 336 +; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi32: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi33: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: vmrlf %v8, %v31, %v31 +; CHECK-NEXT: vmrlf %v9, %v30, %v30 +; CHECK-NEXT: vmrhf %v31, %v31, %v31 +; CHECK-NEXT: vmrhf %v30, %v30, %v30 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vldeb %v31, %v31 +; CHECK-NEXT: vldeb %v30, %v30 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vl %v4, 512(%r15) +; CHECK-NEXT: vl %v5, 384(%r15) +; CHECK-NEXT: vfchdb %v8, %v9, %v8 +; CHECK-NEXT: vl %v6, 480(%r15) +; CHECK-NEXT: vl %v7, 352(%r15) +; CHECK-NEXT: vfchdb %v30, %v30, %v31 +; CHECK-NEXT: vl %v20, 496(%r15) +; CHECK-NEXT: vl %v21, 368(%r15) +; CHECK-NEXT: vpkg %v30, %v30, %v8 +; CHECK-NEXT: vl %v0, 576(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vmrlf %v8, %v29, %v29 +; CHECK-NEXT: vl %v16, 560(%r15) +; CHECK-NEXT: vl %v17, 432(%r15) +; CHECK-NEXT: vmrlf %v9, %v28, %v28 +; CHECK-NEXT: vl %v18, 528(%r15) +; CHECK-NEXT: vl %v19, 400(%r15) +; CHECK-NEXT: vmrhf %v29, %v29, %v29 +; CHECK-NEXT: vl %v22, 464(%r15) +; CHECK-NEXT: vl %v23, 336(%r15) +; CHECK-NEXT: vmrhf %v28, %v28, %v28 +; CHECK-NEXT: vmrlg %v31, %v30, %v30 +; CHECK-NEXT: vuphf %v31, %v31 +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: vldeb %v8, %v8 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vfchdb %v8, %v9, %v8 +; CHECK-NEXT: vmrlf %v9, %v26, %v26 +; CHECK-NEXT: vmrhf %v26, %v26, %v26 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vldeb %v28, %v28 +; CHECK-NEXT: vfchdb %v28, %v28, %v29 +; CHECK-NEXT: vpkg %v28, %v28, %v8 +; CHECK-NEXT: vmrlg %v29, %v28, %v28 +; CHECK-NEXT: vuphf %v8, %v29 +; CHECK-NEXT: vmrlf %v29, %v27, %v27 +; CHECK-NEXT: vmrhf %v27, %v27, %v27 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vfchdb %v29, %v9, %v29 +; CHECK-NEXT: vmrlf %v9, %v24, %v24 +; CHECK-NEXT: vmrhf %v24, %v24, %v24 +; CHECK-NEXT: vldeb %v27, %v27 +; CHECK-NEXT: vldeb %v26, %v26 +; CHECK-NEXT: vfchdb %v26, %v26, %v27 +; CHECK-NEXT: vpkg %v26, %v26, %v29 +; CHECK-NEXT: vmrlf %v29, %v25, %v25 +; CHECK-NEXT: vmrhf %v25, %v25, %v25 +; CHECK-NEXT: vmrlg %v27, %v26, %v26 +; CHECK-NEXT: vuphf %v27, %v27 +; CHECK-NEXT: vuphf %v26, %v26 +; CHECK-NEXT: vldeb %v29, %v29 +; CHECK-NEXT: vldeb %v9, %v9 +; CHECK-NEXT: vfchdb %v29, %v9, %v29 +; CHECK-NEXT: vldeb %v25, %v25 +; CHECK-NEXT: vldeb %v24, %v24 +; CHECK-NEXT: vfchdb %v24, %v24, %v25 +; CHECK-NEXT: vpkg %v24, %v24, %v29 +; CHECK-NEXT: vmrlg %v25, %v24, %v24 +; CHECK-NEXT: vuphf %v9, %v25 +; CHECK-NEXT: vuphf %v29, %v30 +; CHECK-NEXT: vuphf %v25, %v28 +; CHECK-NEXT: vuphf %v24, %v24 +; CHECK-NEXT: vsel %v28, %v21, %v20, %v26 +; CHECK-NEXT: vsel %v26, %v7, %v6, %v9 +; CHECK-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v30, %v5, %v4, %v27 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v8 +; CHECK-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: vsel %v25, %v19, %v18, %v25 +; CHECK-NEXT: vsel %v29, %v17, %v16, %v29 +; CHECK-NEXT: aghi %r15, 176 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x float> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 @@ -3127,32 +3259,32 @@ define <16 x i8> @fun138(<16 x double> %val1, <16 x double> %val2, <16 x i8> %val3, <16 x i8> %val4) { ; CHECK-LABEL: fun138: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vfchdb %v1, %v27, %v1 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 208(%r15) -; CHECK-NEXT: vl %v2, 192(%r15) -; CHECK-NEXT: vfchdb %v1, %v30, %v1 -; CHECK-NEXT: vfchdb %v2, %v28, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vl %v2, 176(%r15) -; CHECK-NEXT: vl %v3, 160(%r15) -; CHECK-NEXT: vfchdb %v2, %v26, %v2 -; CHECK-NEXT: vfchdb %v3, %v24, %v3 -; CHECK-NEXT: vpkg %v2, %v3, %v2 -; CHECK-NEXT: vpkf %v1, %v2, %v1 -; CHECK-NEXT: vpkh %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 304(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 240(%r15) +; CHECK-NEXT: vl %v16, 256(%r15) +; CHECK-NEXT: vl %v17, 272(%r15) +; CHECK-NEXT: vfchdb %v17, %v31, %v17 +; CHECK-NEXT: vfchdb %v16, %v29, %v16 +; CHECK-NEXT: vfchdb %v7, %v27, %v7 +; CHECK-NEXT: vfchdb %v6, %v25, %v6 +; CHECK-NEXT: vfchdb %v5, %v30, %v5 +; CHECK-NEXT: vfchdb %v4, %v28, %v4 +; CHECK-NEXT: vfchdb %v3, %v26, %v3 +; CHECK-NEXT: vfchdb %v2, %v24, %v2 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v6, %v6, %v16 +; CHECK-NEXT: vpkf %v2, %v2, %v4 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vpkh %v2, %v2, %v6 +; CHECK-NEXT: vsel %v24, %v1, %v0, %v2 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x double> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 @@ -3162,34 +3294,34 @@ define <16 x i16> @fun139(<16 x double> %val1, <16 x double> %val2, <16 x i16> %val3, <16 x i16> %val4) { ; CHECK-LABEL: fun139: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v0 -; CHECK-NEXT: vfchdb %v1, %v28, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 176(%r15) -; CHECK-NEXT: vl %v2, 160(%r15) -; CHECK-NEXT: vfchdb %v1, %v26, %v1 -; CHECK-NEXT: vfchdb %v2, %v24, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 320(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 240(%r15) -; CHECK-NEXT: vl %v2, 224(%r15) -; CHECK-NEXT: vfchdb %v1, %v27, %v1 -; CHECK-NEXT: vfchdb %v2, %v25, %v2 -; CHECK-NEXT: vpkg %v1, %v2, %v1 -; CHECK-NEXT: vpkf %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 336(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vl %v5, 176(%r15) +; CHECK-NEXT: vl %v6, 192(%r15) +; CHECK-NEXT: vl %v7, 208(%r15) +; CHECK-NEXT: vl %v16, 224(%r15) +; CHECK-NEXT: vl %v17, 240(%r15) +; CHECK-NEXT: vl %v18, 256(%r15) +; CHECK-NEXT: vl %v19, 272(%r15) +; CHECK-NEXT: vfchdb %v19, %v31, %v19 +; CHECK-NEXT: vfchdb %v18, %v29, %v18 +; CHECK-NEXT: vfchdb %v17, %v27, %v17 +; CHECK-NEXT: vfchdb %v16, %v25, %v16 +; CHECK-NEXT: vfchdb %v7, %v30, %v7 +; CHECK-NEXT: vfchdb %v6, %v28, %v6 +; CHECK-NEXT: vfchdb %v5, %v26, %v5 +; CHECK-NEXT: vfchdb %v4, %v24, %v4 +; CHECK-NEXT: vpkg %v18, %v18, %v19 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vpkg %v6, %v6, %v7 +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vpkf %v16, %v16, %v18 +; CHECK-NEXT: vpkf %v4, %v4, %v6 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v4 +; CHECK-NEXT: vsel %v26, %v1, %v0, %v16 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x double> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 @@ -3199,38 +3331,38 @@ define <16 x i32> @fun140(<16 x double> %val1, <16 x double> %val2, <16 x i32> %val3, <16 x i32> %val4) { ; CHECK-LABEL: fun140: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v26, %v0 -; CHECK-NEXT: vfchdb %v1, %v24, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 352(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v0 -; CHECK-NEXT: vfchdb %v1, %v28, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 368(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 384(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 208(%r15) +; CHECK-NEXT: vl %v20, 224(%r15) +; CHECK-NEXT: vl %v21, 240(%r15) +; CHECK-NEXT: vl %v22, 256(%r15) +; CHECK-NEXT: vl %v23, 272(%r15) +; CHECK-NEXT: vfchdb %v23, %v31, %v23 +; CHECK-NEXT: vfchdb %v22, %v29, %v22 +; CHECK-NEXT: vfchdb %v21, %v27, %v21 +; CHECK-NEXT: vfchdb %v20, %v25, %v20 +; CHECK-NEXT: vfchdb %v19, %v30, %v19 +; CHECK-NEXT: vfchdb %v18, %v28, %v18 +; CHECK-NEXT: vfchdb %v17, %v26, %v17 +; CHECK-NEXT: vfchdb %v16, %v24, %v16 +; CHECK-NEXT: vl %v0, 400(%r15) +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 352(%r15) +; CHECK-NEXT: vl %v7, 288(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v23 +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v18, %v18, %v19 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v20 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v22 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x double> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 @@ -3240,46 +3372,82 @@ define <16 x i64> @fun141(<16 x double> %val1, <16 x double> %val2, <16 x i64> %val3, <16 x i64> %val4) { ; CHECK-LABEL: fun141: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vl %v1, 416(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vfchdb %v0, %v24, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vfchdb %v0, %v26, %v0 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vl %v1, 448(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vfchdb %v0, %v28, %v0 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 224(%r15) -; CHECK-NEXT: vl %v1, 480(%r15) -; CHECK-NEXT: vl %v2, 352(%r15) -; CHECK-NEXT: vfchdb %v0, %v25, %v0 -; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 496(%r15) -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v29, %v0 -; CHECK-NEXT: vl %v1, 512(%r15) -; CHECK-NEXT: vl %v2, 384(%r15) -; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vl %v1, 528(%r15) -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -224 +; CHECK-NEXT: .Lcfi34: +; CHECK-NEXT: .cfi_def_cfa_offset 384 +; CHECK-NEXT: std %f8, 216(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 208(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 200(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 192(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f12, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f13, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f14, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f15, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi35: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi36: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi37: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi38: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: .Lcfi39: +; CHECK-NEXT: .cfi_offset %f12, -200 +; CHECK-NEXT: .Lcfi40: +; CHECK-NEXT: .cfi_offset %f13, -208 +; CHECK-NEXT: .Lcfi41: +; CHECK-NEXT: .cfi_offset %f14, -216 +; CHECK-NEXT: .Lcfi42: +; CHECK-NEXT: .cfi_offset %f15, -224 +; CHECK-NEXT: vl %v8, 384(%r15) +; CHECK-NEXT: vl %v9, 400(%r15) +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v12, 448(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v12 +; CHECK-NEXT: vl %v13, 464(%r15) +; CHECK-NEXT: vfchdb %v27, %v27, %v13 +; CHECK-NEXT: vfchdb %v30, %v30, %v11 +; CHECK-NEXT: vl %v14, 480(%r15) +; CHECK-NEXT: vfchdb %v29, %v29, %v14 +; CHECK-NEXT: vfchdb %v28, %v28, %v10 +; CHECK-NEXT: vl %v15, 496(%r15) +; CHECK-NEXT: vfchdb %v31, %v31, %v15 +; CHECK-NEXT: vfchdb %v26, %v26, %v9 +; CHECK-NEXT: vl %v0, 752(%r15) +; CHECK-NEXT: vfchdb %v24, %v24, %v8 +; CHECK-NEXT: vl %v1, 624(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: vl %v2, 736(%r15) +; CHECK-NEXT: vl %v3, 608(%r15) +; CHECK-NEXT: vsel %v29, %v3, %v2, %v29 +; CHECK-NEXT: vl %v4, 720(%r15) +; CHECK-NEXT: vl %v5, 592(%r15) +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: vl %v6, 704(%r15) +; CHECK-NEXT: vl %v7, 576(%r15) +; CHECK-NEXT: vsel %v25, %v7, %v6, %v25 +; CHECK-NEXT: vl %v16, 688(%r15) +; CHECK-NEXT: vl %v17, 560(%r15) +; CHECK-NEXT: vsel %v30, %v17, %v16, %v30 +; CHECK-NEXT: vl %v18, 672(%r15) +; CHECK-NEXT: vl %v19, 544(%r15) +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vl %v20, 656(%r15) +; CHECK-NEXT: vl %v21, 528(%r15) +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vl %v22, 640(%r15) +; CHECK-NEXT: vl %v23, 512(%r15) +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: ld %f8, 216(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f9, 208(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 200(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f11, 192(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f12, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f13, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f14, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f15, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: aghi %r15, 224 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x double> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 @@ -3289,38 +3457,38 @@ define <16 x float> @fun142(<16 x double> %val1, <16 x double> %val2, <16 x float> %val3, <16 x float> %val4) { ; CHECK-LABEL: fun142: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 160(%r15) -; CHECK-NEXT: vfchdb %v0, %v26, %v0 -; CHECK-NEXT: vfchdb %v1, %v24, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 352(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 192(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v0 -; CHECK-NEXT: vfchdb %v1, %v28, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 368(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 224(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vfchdb %v1, %v25, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 384(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vl %v1, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vfchdb %v1, %v29, %v1 -; CHECK-NEXT: vpkg %v0, %v1, %v0 -; CHECK-NEXT: vl %v1, 400(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v16, 160(%r15) +; CHECK-NEXT: vl %v17, 176(%r15) +; CHECK-NEXT: vl %v18, 192(%r15) +; CHECK-NEXT: vl %v19, 208(%r15) +; CHECK-NEXT: vl %v20, 224(%r15) +; CHECK-NEXT: vl %v21, 240(%r15) +; CHECK-NEXT: vl %v22, 256(%r15) +; CHECK-NEXT: vl %v23, 272(%r15) +; CHECK-NEXT: vfchdb %v23, %v31, %v23 +; CHECK-NEXT: vfchdb %v22, %v29, %v22 +; CHECK-NEXT: vfchdb %v21, %v27, %v21 +; CHECK-NEXT: vfchdb %v20, %v25, %v20 +; CHECK-NEXT: vfchdb %v19, %v30, %v19 +; CHECK-NEXT: vfchdb %v18, %v28, %v18 +; CHECK-NEXT: vfchdb %v17, %v26, %v17 +; CHECK-NEXT: vfchdb %v16, %v24, %v16 +; CHECK-NEXT: vl %v0, 400(%r15) +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 352(%r15) +; CHECK-NEXT: vl %v7, 288(%r15) +; CHECK-NEXT: vpkg %v22, %v22, %v23 +; CHECK-NEXT: vpkg %v20, %v20, %v21 +; CHECK-NEXT: vpkg %v18, %v18, %v19 +; CHECK-NEXT: vpkg %v16, %v16, %v17 +; CHECK-NEXT: vsel %v24, %v7, %v6, %v16 +; CHECK-NEXT: vsel %v26, %v5, %v4, %v18 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v20 +; CHECK-NEXT: vsel %v30, %v1, %v0, %v22 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x double> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 @@ -3330,46 +3498,82 @@ define <16 x double> @fun143(<16 x double> %val1, <16 x double> %val2, <16 x double> %val3, <16 x double> %val4) { ; CHECK-LABEL: fun143: ; CHECK: # BB#0: -; CHECK-NEXT: vl %v0, 160(%r15) -; CHECK-NEXT: vl %v1, 416(%r15) -; CHECK-NEXT: vl %v2, 288(%r15) -; CHECK-NEXT: vfchdb %v0, %v24, %v0 -; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 176(%r15) -; CHECK-NEXT: vl %v1, 432(%r15) -; CHECK-NEXT: vl %v2, 304(%r15) -; CHECK-NEXT: vfchdb %v0, %v26, %v0 -; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 192(%r15) -; CHECK-NEXT: vl %v1, 448(%r15) -; CHECK-NEXT: vl %v2, 320(%r15) -; CHECK-NEXT: vfchdb %v0, %v28, %v0 -; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 208(%r15) -; CHECK-NEXT: vl %v1, 464(%r15) -; CHECK-NEXT: vl %v2, 336(%r15) -; CHECK-NEXT: vfchdb %v0, %v30, %v0 -; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 224(%r15) -; CHECK-NEXT: vl %v1, 480(%r15) -; CHECK-NEXT: vl %v2, 352(%r15) -; CHECK-NEXT: vfchdb %v0, %v25, %v0 -; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 240(%r15) -; CHECK-NEXT: vl %v1, 496(%r15) -; CHECK-NEXT: vl %v2, 368(%r15) -; CHECK-NEXT: vfchdb %v0, %v27, %v0 -; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 256(%r15) -; CHECK-NEXT: vfchdb %v0, %v29, %v0 -; CHECK-NEXT: vl %v1, 512(%r15) -; CHECK-NEXT: vl %v2, 384(%r15) -; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 -; CHECK-NEXT: vl %v0, 272(%r15) -; CHECK-NEXT: vfchdb %v0, %v31, %v0 -; CHECK-NEXT: vl %v1, 528(%r15) -; CHECK-NEXT: vl %v2, 400(%r15) -; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: aghi %r15, -224 +; CHECK-NEXT: .Lcfi43: +; CHECK-NEXT: .cfi_def_cfa_offset 384 +; CHECK-NEXT: std %f8, 216(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f9, 208(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f10, 200(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f11, 192(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f12, 184(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f13, 176(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f14, 168(%r15) # 8-byte Folded Spill +; CHECK-NEXT: std %f15, 160(%r15) # 8-byte Folded Spill +; CHECK-NEXT: .Lcfi44: +; CHECK-NEXT: .cfi_offset %f8, -168 +; CHECK-NEXT: .Lcfi45: +; CHECK-NEXT: .cfi_offset %f9, -176 +; CHECK-NEXT: .Lcfi46: +; CHECK-NEXT: .cfi_offset %f10, -184 +; CHECK-NEXT: .Lcfi47: +; CHECK-NEXT: .cfi_offset %f11, -192 +; CHECK-NEXT: .Lcfi48: +; CHECK-NEXT: .cfi_offset %f12, -200 +; CHECK-NEXT: .Lcfi49: +; CHECK-NEXT: .cfi_offset %f13, -208 +; CHECK-NEXT: .Lcfi50: +; CHECK-NEXT: .cfi_offset %f14, -216 +; CHECK-NEXT: .Lcfi51: +; CHECK-NEXT: .cfi_offset %f15, -224 +; CHECK-NEXT: vl %v8, 384(%r15) +; CHECK-NEXT: vl %v9, 400(%r15) +; CHECK-NEXT: vl %v10, 416(%r15) +; CHECK-NEXT: vl %v11, 432(%r15) +; CHECK-NEXT: vl %v12, 448(%r15) +; CHECK-NEXT: vfchdb %v25, %v25, %v12 +; CHECK-NEXT: vl %v13, 464(%r15) +; CHECK-NEXT: vfchdb %v27, %v27, %v13 +; CHECK-NEXT: vfchdb %v30, %v30, %v11 +; CHECK-NEXT: vl %v14, 480(%r15) +; CHECK-NEXT: vfchdb %v29, %v29, %v14 +; CHECK-NEXT: vfchdb %v28, %v28, %v10 +; CHECK-NEXT: vl %v15, 496(%r15) +; CHECK-NEXT: vfchdb %v31, %v31, %v15 +; CHECK-NEXT: vfchdb %v26, %v26, %v9 +; CHECK-NEXT: vl %v0, 752(%r15) +; CHECK-NEXT: vfchdb %v24, %v24, %v8 +; CHECK-NEXT: vl %v1, 624(%r15) +; CHECK-NEXT: vsel %v31, %v1, %v0, %v31 +; CHECK-NEXT: vl %v2, 736(%r15) +; CHECK-NEXT: vl %v3, 608(%r15) +; CHECK-NEXT: vsel %v29, %v3, %v2, %v29 +; CHECK-NEXT: vl %v4, 720(%r15) +; CHECK-NEXT: vl %v5, 592(%r15) +; CHECK-NEXT: vsel %v27, %v5, %v4, %v27 +; CHECK-NEXT: vl %v6, 704(%r15) +; CHECK-NEXT: vl %v7, 576(%r15) +; CHECK-NEXT: vsel %v25, %v7, %v6, %v25 +; CHECK-NEXT: vl %v16, 688(%r15) +; CHECK-NEXT: vl %v17, 560(%r15) +; CHECK-NEXT: vsel %v30, %v17, %v16, %v30 +; CHECK-NEXT: vl %v18, 672(%r15) +; CHECK-NEXT: vl %v19, 544(%r15) +; CHECK-NEXT: vsel %v28, %v19, %v18, %v28 +; CHECK-NEXT: vl %v20, 656(%r15) +; CHECK-NEXT: vl %v21, 528(%r15) +; CHECK-NEXT: vsel %v26, %v21, %v20, %v26 +; CHECK-NEXT: vl %v22, 640(%r15) +; CHECK-NEXT: vl %v23, 512(%r15) +; CHECK-NEXT: vsel %v24, %v23, %v22, %v24 +; CHECK-NEXT: ld %f8, 216(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f9, 208(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f10, 200(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f11, 192(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f12, 184(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f13, 176(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f14, 168(%r15) # 8-byte Folded Reload +; CHECK-NEXT: ld %f15, 160(%r15) # 8-byte Folded Reload +; CHECK-NEXT: aghi %r15, 224 ; CHECK-NEXT: br %r14 %cmp = fcmp ogt <16 x double> %val1, %val2 %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 Index: test/CodeGen/SystemZ/vec-div-01.ll =================================================================== --- test/CodeGen/SystemZ/vec-div-01.ll +++ test/CodeGen/SystemZ/vec-div-01.ll @@ -7,20 +7,20 @@ define <16 x i8> @f1(<16 x i8> %dummy, <16 x i8> %val1, <16 x i8> %val2) { ; CHECK-LABEL: f1: ; CHECK: vlvgp [[REG:%v[0-9]+]], -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 0 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 1 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 2 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 3 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 4 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 5 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 6 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 8 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 9 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 10 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 11 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 12 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 13 -; CHECK-DAG: vlvgb [[REG]], {{%r[0-5]}}, 14 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 0 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 1 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 2 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 3 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 4 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 5 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 6 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 8 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 9 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 10 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 11 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 12 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 13 +; CHECK-DAG: vlvgb [[REG]], {{%r[0-9]+}}, 14 ; CHECK: br %r14 %ret = sdiv <16 x i8> %val1, %val2 ret <16 x i8> %ret @@ -30,12 +30,12 @@ define <8 x i16> @f2(<8 x i16> %dummy, <8 x i16> %val1, <8 x i16> %val2) { ; CHECK-LABEL: f2: ; CHECK: vlvgp [[REG:%v[0-9]+]], -; CHECK-DAG: vlvgh [[REG]], {{%r[0-5]}}, 0 -; CHECK-DAG: vlvgh [[REG]], {{%r[0-5]}}, 1 -; CHECK-DAG: vlvgh [[REG]], {{%r[0-5]}}, 2 -; CHECK-DAG: vlvgh [[REG]], {{%r[0-5]}}, 4 -; CHECK-DAG: vlvgh [[REG]], {{%r[0-5]}}, 5 -; CHECK-DAG: vlvgh [[REG]], {{%r[0-5]}}, 6 +; CHECK-DAG: vlvgh [[REG]], {{%r[0-9]+}}, 0 +; CHECK-DAG: vlvgh [[REG]], {{%r[0-9]+}}, 1 +; CHECK-DAG: vlvgh [[REG]], {{%r[0-9]+}}, 2 +; CHECK-DAG: vlvgh [[REG]], {{%r[0-9]+}}, 4 +; CHECK-DAG: vlvgh [[REG]], {{%r[0-9]+}}, 5 +; CHECK-DAG: vlvgh [[REG]], {{%r[0-9]+}}, 6 ; CHECK: br %r14 %ret = sdiv <8 x i16> %val1, %val2 ret <8 x i16> %ret @@ -45,8 +45,8 @@ define <4 x i32> @f3(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) { ; CHECK-LABEL: f3: ; CHECK: vlvgp [[REG:%v[0-9]+]], -; CHECK-DAG: vlvgf [[REG]], {{%r[0-5]}}, 0 -; CHECK-DAG: vlvgf [[REG]], {{%r[0-5]}}, 2 +; CHECK-DAG: vlvgf [[REG]], {{%r[0-9]+}}, 0 +; CHECK-DAG: vlvgf [[REG]], {{%r[0-9]+}}, 2 ; CHECK: br %r14 %ret = sdiv <4 x i32> %val1, %val2 ret <4 x i32> %ret Index: test/CodeGen/SystemZ/vec-sub-01.ll =================================================================== --- test/CodeGen/SystemZ/vec-sub-01.ll +++ test/CodeGen/SystemZ/vec-sub-01.ll @@ -52,12 +52,11 @@ ; CHECK-DAG: vrepf %v[[C2:[0-5]]], %v[[A2]], 2 ; CHECK-DAG: vrepf %v[[D1:[0-5]]], %v[[A1]], 3 ; CHECK-DAG: vrepf %v[[D2:[0-5]]], %v[[A2]], 3 -; CHECK-DAG: ldr %f[[A1copy:[0-5]]], %f[[A1]] -; CHECK-DAG: sebr %f[[A1copy]], %f[[A2]] +; CHECK-DAG: sebr %f[[A1]], %f[[A2]] ; CHECK-DAG: sebr %f[[B1]], %f[[B2]] ; CHECK-DAG: sebr %f[[C1]], %f[[C2]] ; CHECK-DAG: sebr %f[[D1]], %f[[D2]] -; CHECK-DAG: vmrhf [[HIGH:%v[0-9]+]], %v[[A1copy]], %v[[B1]] +; CHECK-DAG: vmrhf [[HIGH:%v[0-9]+]], %v[[A1]], %v[[B1]] ; CHECK-DAG: vmrhf [[LOW:%v[0-9]+]], %v[[C1]], %v[[D1]] ; CHECK: vmrhg %v24, [[HIGH]], [[LOW]] ; CHECK: br %r14