This is an archive of the discontinued LLVM Phabricator instance.

[mips] Adding test cases for dext and dins family of instructions
ClosedPublic

Authored by abeserminji on Sep 12 2017, 6:40 AM.

Details

Summary

Adding missing test cases for dext, dextm, dextu, dins, dinsu instructions to test/MC/Mips/mips64r{2|6}/valid.s

Depends on D37683

Diff Detail

Repository
rL LLVM

Event Timeline

abeserminji created this revision.Sep 12 2017, 6:40 AM
abeserminji edited the summary of this revision. (Show Details)Sep 12 2017, 6:41 AM
abeserminji added a reviewer: petarj.
abeserminji added a subscriber: llvm-commits.
abeserminji retitled this revision from Adding test cases for dext and dins family of instructions to [mips] Adding test cases for dext and dins family of instructions .Sep 12 2017, 6:43 AM
sdardis edited edge metadata.Sep 12 2017, 6:50 AM

Can you also add the corresponding invalid cases to test/MC/Mips/mips64r{2|6}/invalid.s ? We need to specifically check the various constraints on the size, position and size + position for those instructions.

Thanks,

I noticed that you have submitted a patch D34887 that covers cases with invalid size+position for dext* and dins* instructions. So I guess I'll be skipping these tests here.

sdardis accepted this revision.Sep 13 2017, 7:37 AM

Yeah, that's fine. I'd temporarily forgotten about those patches. LGTM then.

This revision is now accepted and ready to land.Sep 13 2017, 7:37 AM

Let me just clarify myself: I will do the pos and size tests in test/MC/Mips/mips64r{2|6}/invalid.s but I will skip size+pos tests.
Sorry for the confusion.

Added test cases to mips64r{2|6}/invalid.s

sdardis accepted this revision.Sep 28 2017, 3:12 AM

LGTM.

This revision was automatically updated to reflect the committed changes.