Index: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h =================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h +++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h @@ -37,8 +37,9 @@ SPF_SMIN, SPF_UMIN, SPF_SMAX, - SPF_UMAX - // SPF_ABS - TODO. + SPF_UMAX, + SPF_ABS, + SPF_NABS }; /// getComplexity: Assign a complexity or rank value to LLVM Values... Index: llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp =================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp @@ -31,13 +31,18 @@ ICmpInst *ICI = dyn_cast(SI->getCondition()); if (!ICI) return SPF_UNKNOWN; - LHS = ICI->getOperand(0); - RHS = ICI->getOperand(1); + ICmpInst::Predicate Pred = ICI->getPredicate(); + Value *CmpLHS = ICI->getOperand(0); + Value *CmpRHS = ICI->getOperand(1); + Value *TrueVal = SI->getTrueValue(); + Value *FalseVal = SI->getFalseValue(); + + LHS = CmpLHS; + RHS = CmpRHS; // (icmp X, Y) ? X : Y - if (SI->getTrueValue() == ICI->getOperand(0) && - SI->getFalseValue() == ICI->getOperand(1)) { - switch (ICI->getPredicate()) { + if (TrueVal == CmpLHS && FalseVal == CmpRHS) { + switch (Pred) { default: return SPF_UNKNOWN; // Equality. case ICmpInst::ICMP_UGT: case ICmpInst::ICMP_UGE: return SPF_UMAX; @@ -51,18 +56,35 @@ } // (icmp X, Y) ? Y : X - if (SI->getTrueValue() == ICI->getOperand(1) && - SI->getFalseValue() == ICI->getOperand(0)) { - switch (ICI->getPredicate()) { - default: return SPF_UNKNOWN; // Equality. - case ICmpInst::ICMP_UGT: - case ICmpInst::ICMP_UGE: return SPF_UMIN; - case ICmpInst::ICMP_SGT: - case ICmpInst::ICMP_SGE: return SPF_SMIN; - case ICmpInst::ICMP_ULT: - case ICmpInst::ICMP_ULE: return SPF_UMAX; - case ICmpInst::ICMP_SLT: - case ICmpInst::ICMP_SLE: return SPF_SMAX; + if (TrueVal == CmpRHS && FalseVal == CmpLHS) { + switch (Pred) { + default: return SPF_UNKNOWN; // Equality. + case ICmpInst::ICMP_UGT: + case ICmpInst::ICMP_UGE: return SPF_UMIN; + case ICmpInst::ICMP_SGT: + case ICmpInst::ICMP_SGE: return SPF_SMIN; + case ICmpInst::ICMP_ULT: + case ICmpInst::ICMP_ULE: return SPF_UMAX; + case ICmpInst::ICMP_SLT: + case ICmpInst::ICMP_SLE: return SPF_SMAX; + } + } + + if (ConstantInt *C1 = dyn_cast(CmpRHS)) { + if ((CmpLHS == TrueVal && match(FalseVal, m_Neg(m_Specific(CmpLHS)))) || + (CmpLHS == FalseVal && match(TrueVal, m_Neg(m_Specific(CmpLHS))))) { + + // ABS(X) ==> (X >s 0) ? X : -X and (X >s -1) ? X : -X + // NABS(X) ==> (X >s 0) ? -X : X and (X >s -1) ? -X : X + if (Pred == ICmpInst::ICMP_SGT && (C1->isZero() || C1->isMinusOne())) { + return (CmpLHS == TrueVal) ? SPF_ABS : SPF_NABS; + } + + // ABS(X) ==> (X (X isZero() || C1->isOne())) { + return (CmpLHS == FalseVal) ? SPF_ABS : SPF_NABS; + } } } @@ -704,6 +726,15 @@ } } } + + // ABS(ABS(X)) -> ABS(X) + // NABS(NABS(X)) -> NABS(X) + if (SPF1 == SPF2 && (SPF1 == SPF_ABS || SPF1 == SPF_NABS)) { + return ReplaceInstUsesWith(Outer, Inner); + } + + // TODO: ABS(NABS(X)) -> ABS(X) + // TODO: NABS(ABS(X)) -> NABS(X) return nullptr; } @@ -1008,7 +1039,6 @@ // TODO. // ABS(-X) -> ABS(X) - // ABS(ABS(X)) -> ABS(X) } // See if we can fold the select into a phi node if the condition is a select. Index: llvm/trunk/test/Transforms/InstCombine/abs_abs.ll =================================================================== --- llvm/trunk/test/Transforms/InstCombine/abs_abs.ll +++ llvm/trunk/test/Transforms/InstCombine/abs_abs.ll @@ -0,0 +1,481 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define i32 @abs_abs_x01(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, -1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x01( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x02(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, -1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x02( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x03(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, -1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x03( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x04(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, -1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x04( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x05(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x05( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x06(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x06( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x07(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x07( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x08(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x08( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x09(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x09( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x10(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x10( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x11(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x11( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x12(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x12( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x13(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x13( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x14(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x14( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x15(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x15( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @abs_abs_x16(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @abs_abs_x16( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x01(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, -1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x01( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x02(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, -1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x02( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x03(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, -1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x03( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x04(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, -1 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x04( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x05(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x05( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x06(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp sgt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x06( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x07(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x07( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x08(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp sgt i32 %cond, 0 + %sub9 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x08( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x09(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x09( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x10(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x10( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x11(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x11( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x12(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 0 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x12( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x13(i32 %x) { + %cmp = icmp sgt i32 %x, -1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x13( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x14(i32 %x) { + %cmp = icmp sgt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %sub, i32 %x + %cmp1 = icmp slt i32 %cond, 1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x14( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x15(i32 %x) { + %cmp = icmp slt i32 %x, 0 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x15( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +} + +define i32 @nabs_nabs_x16(i32 %x) { + %cmp = icmp slt i32 %x, 1 + %sub = sub nsw i32 0, %x + %cond = select i1 %cmp, i32 %x, i32 %sub + %cmp1 = icmp slt i32 %cond, 1 + %sub16 = sub nsw i32 0, %cond + %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16 + ret i32 %cond18 +; CHECK-LABEL: @nabs_nabs_x16( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1 +; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]] +; CHECK-NEXT: ret i32 [[SEL]] +}