Index: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp =================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -991,12 +991,6 @@ if (isEliminableCastPair(PrecedingCI, CI)) return false; - // If this is a vector sext from a compare, then we don't want to break the - // idiom where each element of the extended vector is either zero or all ones. - if (CI->getOpcode() == Instruction::SExt && - isa(CastSrc) && CI->getDestTy()->isVectorTy()) - return false; - return true; } Index: llvm/trunk/test/Transforms/InstCombine/vector-casts.ll =================================================================== --- llvm/trunk/test/Transforms/InstCombine/vector-casts.ll +++ llvm/trunk/test/Transforms/InstCombine/vector-casts.ll @@ -96,10 +96,9 @@ define <2 x i64> @test7(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[CMP:%.*]] = fcmp ult <4 x float> [[A:%.*]], zeroinitializer -; CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32> ; CHECK-NEXT: [[CMP4:%.*]] = fcmp ult <4 x float> [[B:%.*]], zeroinitializer -; CHECK-NEXT: [[SEXT5:%.*]] = sext <4 x i1> [[CMP4]] to <4 x i32> -; CHECK-NEXT: [[AND:%.*]] = xor <4 x i32> [[SEXT]], [[SEXT5]] +; CHECK-NEXT: [[AND1:%.*]] = xor <4 x i1> [[CMP]], [[CMP4]] +; CHECK-NEXT: [[AND:%.*]] = sext <4 x i1> [[AND1]] to <4 x i32> ; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[AND]] to <2 x i64> ; CHECK-NEXT: ret <2 x i64> [[CONV]] ;