Index: llvm/trunk/docs/LangRef.rst =================================================================== --- llvm/trunk/docs/LangRef.rst +++ llvm/trunk/docs/LangRef.rst @@ -4018,7 +4018,7 @@ .. code-block:: llvm - call void @llvm.dbg.value(metadata !24, i64 0, metadata !25) + call void @llvm.dbg.value(metadata !24, metadata !25, metadata !26) Metadata can be attached to an instruction. Here metadata ``!21`` is attached to the ``add`` instruction using the ``!dbg`` identifier: Index: llvm/trunk/docs/SourceLevelDebugging.rst =================================================================== --- llvm/trunk/docs/SourceLevelDebugging.rst +++ llvm/trunk/docs/SourceLevelDebugging.rst @@ -207,14 +207,13 @@ .. code-block:: llvm - void @llvm.dbg.value(metadata, i64, metadata, metadata) + void @llvm.dbg.value(metadata, metadata, metadata) This intrinsic provides information when a user source variable is set to a new -value. The first argument is the new value (wrapped as metadata). The second -argument is the offset in the user source variable where the new value is -written. The third argument is a `local variable -`_ containing a description of the variable. The -fourth argument is a `complex expression `_. +value. The first argument is the new value (wrapped as metadata). The third +argument is a `local variable `_ containing a +description of the variable. The fourth argument is a `complex expression +`_. Object lifetimes and scoping ============================ Index: llvm/trunk/include/llvm/IR/DIBuilder.h =================================================================== --- llvm/trunk/include/llvm/IR/DIBuilder.h +++ llvm/trunk/include/llvm/IR/DIBuilder.h @@ -729,12 +729,11 @@ /// Insert a new llvm.dbg.value intrinsic call. /// \param Val llvm::Value of the variable - /// \param Offset Offset /// \param VarInfo Variable's debug info descriptor. /// \param Expr A complex location expression. /// \param DL Debug info location. /// \param InsertAtEnd Location for the new intrinsic. - Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, + Instruction *insertDbgValueIntrinsic(llvm::Value *Val, DILocalVariable *VarInfo, DIExpression *Expr, const DILocation *DL, @@ -742,12 +741,11 @@ /// Insert a new llvm.dbg.value intrinsic call. /// \param Val llvm::Value of the variable - /// \param Offset Offset /// \param VarInfo Variable's debug info descriptor. /// \param Expr A complex location expression. /// \param DL Debug info location. /// \param InsertBefore Location for the new intrinsic. - Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, + Instruction *insertDbgValueIntrinsic(llvm::Value *Val, DILocalVariable *VarInfo, DIExpression *Expr, const DILocation *DL, Index: llvm/trunk/include/llvm/IR/IntrinsicInst.h =================================================================== --- llvm/trunk/include/llvm/IR/IntrinsicInst.h +++ llvm/trunk/include/llvm/IR/IntrinsicInst.h @@ -122,11 +122,6 @@ return getVariableLocation(/* AllowNullOp = */ false); } - uint64_t getOffset() const { - return cast( - const_cast(getArgOperand(1)))->getZExtValue(); - } - DILocalVariable *getVariable() const { return cast(getRawVariable()); } @@ -136,11 +131,11 @@ } Metadata *getRawVariable() const { - return cast(getArgOperand(2))->getMetadata(); + return cast(getArgOperand(1))->getMetadata(); } Metadata *getRawExpression() const { - return cast(getArgOperand(3))->getMetadata(); + return cast(getArgOperand(2))->getMetadata(); } // Methods for support type inquiry through isa, cast, and dyn_cast: Index: llvm/trunk/include/llvm/IR/Intrinsics.td =================================================================== --- llvm/trunk/include/llvm/IR/Intrinsics.td +++ llvm/trunk/include/llvm/IR/Intrinsics.td @@ -579,7 +579,7 @@ llvm_metadata_ty, llvm_metadata_ty]>; def int_dbg_value : Intrinsic<[], - [llvm_metadata_ty, llvm_i64_ty, + [llvm_metadata_ty, llvm_metadata_ty, llvm_metadata_ty]>; } Index: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -682,10 +682,10 @@ if (!V) { // Currently the optimizer can produce this; insert an undef to // help debugging. Probably the optimizer should not do this. - MIRBuilder.buildIndirectDbgValue(0, DI.getOffset(), DI.getVariable(), + MIRBuilder.buildIndirectDbgValue(0, 0, DI.getVariable(), DI.getExpression()); } else if (const auto *CI = dyn_cast(V)) { - MIRBuilder.buildConstDbgValue(*CI, DI.getOffset(), DI.getVariable(), + MIRBuilder.buildConstDbgValue(*CI, 0, DI.getVariable(), DI.getExpression()); } else { unsigned Reg = getOrCreateVReg(*V); @@ -693,12 +693,7 @@ // direct/indirect thing shouldn't really be handled by something as // implicit as reg+noreg vs reg+imm in the first palce, but it seems // pretty baked in right now. - if (DI.getOffset() != 0) - MIRBuilder.buildIndirectDbgValue(Reg, DI.getOffset(), DI.getVariable(), - DI.getExpression()); - else - MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(), - DI.getExpression()); + MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(), DI.getExpression()); } return true; } Index: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp =================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp +++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1214,33 +1214,33 @@ // help debugging. Probably the optimizer should not do this. BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) .addReg(0U) - .addImm(DI->getOffset()) + .addImm(0U) .addMetadata(DI->getVariable()) .addMetadata(DI->getExpression()); } else if (const auto *CI = dyn_cast(V)) { if (CI->getBitWidth() > 64) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) .addCImm(CI) - .addImm(DI->getOffset()) + .addImm(0U) .addMetadata(DI->getVariable()) .addMetadata(DI->getExpression()); else BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) .addImm(CI->getZExtValue()) - .addImm(DI->getOffset()) + .addImm(0U) .addMetadata(DI->getVariable()) .addMetadata(DI->getExpression()); } else if (const auto *CF = dyn_cast(V)) { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) .addFPImm(CF) - .addImm(DI->getOffset()) + .addImm(0U) .addMetadata(DI->getVariable()) .addMetadata(DI->getExpression()); } else if (unsigned Reg = lookUpRegForValue(V)) { // FIXME: This does not handle register-indirect values at offset 0. - bool IsIndirect = DI->getOffset() != 0; - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg, - DI->getOffset(), DI->getVariable(), DI->getExpression()); + bool IsIndirect = false; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg, 0, + DI->getVariable(), DI->getExpression()); } else { // We can't yet handle anything else here because it would require // generating code, thus altering codegen because of debug info. Index: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp =================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -1004,7 +1004,7 @@ DIExpression *Expr = DI->getExpression(); assert(Variable->isValidLocationForIntrinsic(dl) && "Expected inlined-at fields to agree"); - uint64_t Offset = DI->getOffset(); + uint64_t Offset = 0; SDDbgValue *SDV; if (Val.getNode()) { if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, Offset, false, @@ -5139,7 +5139,7 @@ DILocalVariable *Variable = DI.getVariable(); DIExpression *Expression = DI.getExpression(); - uint64_t Offset = DI.getOffset(); + uint64_t Offset = 0; const Value *V = DI.getValue(); if (!V) return nullptr; Index: llvm/trunk/lib/IR/AutoUpgrade.cpp =================================================================== --- llvm/trunk/lib/IR/AutoUpgrade.cpp +++ llvm/trunk/lib/IR/AutoUpgrade.cpp @@ -420,6 +420,14 @@ } break; } + case 'd': { + if (Name == "dbg.value" && F->arg_size() == 4) { + rename(F); + NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); + return true; + } + break; + } case 'i': case 'l': { bool IsLifetimeStart = Name.startswith("lifetime.start"); @@ -2055,6 +2063,20 @@ NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); break; + case Intrinsic::dbg_value: + // Upgrade from the old version that had an extra offset argument. + assert(CI->getNumArgOperands() == 4); + // Drop nonzero offsets instead of attempting to upgrade them. + if (auto *Offset = dyn_cast_or_null(CI->getArgOperand(1))) + if (Offset->isZeroValue()) { + NewCall = Builder.CreateCall( + NewFn, + {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); + break; + } + CI->eraseFromParent(); + return; + case Intrinsic::x86_xop_vfrcz_ss: case Intrinsic::x86_xop_vfrcz_sd: NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); Index: llvm/trunk/lib/IR/DIBuilder.cpp =================================================================== --- llvm/trunk/lib/IR/DIBuilder.cpp +++ llvm/trunk/lib/IR/DIBuilder.cpp @@ -823,7 +823,7 @@ return withDebugLoc(CallInst::Create(DeclareFn, Args, "", InsertAtEnd), DL); } -Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset, +Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, DILocalVariable *VarInfo, DIExpression *Expr, const DILocation *DL, @@ -840,13 +840,12 @@ trackIfUnresolved(VarInfo); trackIfUnresolved(Expr); Value *Args[] = {getDbgIntrinsicValueImpl(VMContext, V), - ConstantInt::get(Type::getInt64Ty(VMContext), Offset), MetadataAsValue::get(VMContext, VarInfo), MetadataAsValue::get(VMContext, Expr)}; return withDebugLoc(CallInst::Create(ValueFn, Args, "", InsertBefore), DL); } -Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset, +Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, DILocalVariable *VarInfo, DIExpression *Expr, const DILocation *DL, @@ -863,7 +862,6 @@ trackIfUnresolved(VarInfo); trackIfUnresolved(Expr); Value *Args[] = {getDbgIntrinsicValueImpl(VMContext, V), - ConstantInt::get(Type::getInt64Ty(VMContext), Offset), MetadataAsValue::get(VMContext, VarInfo), MetadataAsValue::get(VMContext, Expr)}; Index: llvm/trunk/lib/Transforms/Utils/Local.cpp =================================================================== --- llvm/trunk/lib/Transforms/Utils/Local.cpp +++ llvm/trunk/lib/Transforms/Utils/Local.cpp @@ -1073,7 +1073,6 @@ --PrevI; if (DbgValueInst *DVI = dyn_cast(PrevI)) if (DVI->getValue() == I->getOperand(0) && - DVI->getOffset() == 0 && DVI->getVariable() == DIVar && DVI->getExpression() == DIExpr) return true; @@ -1092,7 +1091,6 @@ findDbgValues(DbgValues, APN); for (auto *DVI : DbgValues) { assert(DVI->getValue() == APN); - assert(DVI->getOffset() == 0); if ((DVI->getVariable() == DIVar) && (DVI->getExpression() == DIExpr)) return true; } @@ -1136,7 +1134,7 @@ DV = ExtendedArg; } if (!LdStHasDebugValue(DIVar, DIExpr, SI)) - Builder.insertDbgValueIntrinsic(DV, 0, DIVar, DIExpr, DDI->getDebugLoc(), + Builder.insertDbgValueIntrinsic(DV, DIVar, DIExpr, DDI->getDebugLoc(), SI); } @@ -1156,7 +1154,7 @@ // preferable to keep tracking both the loaded value and the original // address in case the alloca can not be elided. Instruction *DbgValue = Builder.insertDbgValueIntrinsic( - LI, 0, DIVar, DIExpr, DDI->getDebugLoc(), (Instruction *)nullptr); + LI, DIVar, DIExpr, DDI->getDebugLoc(), (Instruction *)nullptr); DbgValue->insertAfter(LI); } @@ -1178,7 +1176,7 @@ // insertion point. // FIXME: Insert dbg.value markers in the successors when appropriate. if (InsertionPt != BB->end()) - Builder.insertDbgValueIntrinsic(APN, 0, DIVar, DIExpr, DDI->getDebugLoc(), + Builder.insertDbgValueIntrinsic(APN, DIVar, DIExpr, DDI->getDebugLoc(), &*InsertionPt); } @@ -1222,7 +1220,7 @@ // This is a call by-value or some other instruction that // takes a pointer to the variable. Insert a *value* // intrinsic that describes the alloca. - DIB.insertDbgValueIntrinsic(AI, 0, DDI->getVariable(), + DIB.insertDbgValueIntrinsic(AI, DDI->getVariable(), DDI->getExpression(), DDI->getDebugLoc(), CI); } @@ -1302,8 +1300,7 @@ DIExpr = Builder.createExpression(Ops); } - Builder.insertDbgValueIntrinsic(NewAddress, DVI->getOffset(), DIVar, DIExpr, - Loc, DVI); + Builder.insertDbgValueIntrinsic(NewAddress, DIVar, DIExpr, Loc, DVI); DVI->eraseFromParent(); } @@ -1351,7 +1348,7 @@ Offset.getSExtValue(), DIExpression::WithStackValue); DVI->setOperand(0, MDWrap(I.getOperand(0))); - DVI->setOperand(3, MetadataAsValue::get(I.getContext(), DIExpr)); + DVI->setOperand(2, MetadataAsValue::get(I.getContext(), DIExpr)); DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n'); } } @@ -1363,7 +1360,7 @@ DIBuilder DIB(M, /*AllowUnresolved*/ false); DIExpr = DIExpression::prepend(DIExpr, DIExpression::WithDeref); DVI->setOperand(0, MDWrap(I.getOperand(0))); - DVI->setOperand(3, MetadataAsValue::get(I.getContext(), DIExpr)); + DVI->setOperand(2, MetadataAsValue::get(I.getContext(), DIExpr)); DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n'); } } Index: llvm/trunk/test/Bitcode/upgrade-dbg-value.ll =================================================================== --- llvm/trunk/test/Bitcode/upgrade-dbg-value.ll +++ llvm/trunk/test/Bitcode/upgrade-dbg-value.ll @@ -0,0 +1,32 @@ +; Test upgrade of dbg.dvalue intrinsics with offsets. +; +; RUN: llvm-dis < %s.bc | FileCheck %s +; RUN: verify-uselistorder < %s.bc + +define void @f() !dbg !3 { +entry: + ; CHECK-NOT: call void @llvm.dbg.value + ; CHECK: call void @llvm.dbg.value(metadata i32 42, metadata !8, metadata !9), !dbg !10 + call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !8, metadata !9), !dbg !10 + ; CHECK-NOT: call void @llvm.dbg.value + call void @llvm.dbg.value(metadata i32 0, i64 1, metadata !8, metadata !9), !dbg !10 + ret void +} + +; CHECK: declare void @llvm.dbg.value(metadata, metadata, metadata) +declare void @llvm.dbg.value(metadata, i64, metadata, metadata) + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!2} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llc r309174", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug) +!1 = !DIFile(filename: "a.c", directory: "/") +!2 = !{i32 1, !"Debug Info Version", i32 3} +!3 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 1, type: !4, isLocal: false, isDefinition: true, isOptimized: false, unit: !0, variables: !7) +!4 = !DISubroutineType(types: !5) +!5 = !{!6} +!6 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) +!7 = !{!8} +!8 = !DILocalVariable(name: "i", scope: !3, file: !1, line: 2, type: !6) +!9 = !DIExpression() +!10 = !DILocation(line: 2, scope: !3) Index: llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll +++ llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll @@ -5,12 +5,12 @@ define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind { entry: - tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1) + tail call void @llvm.dbg.value(metadata i32 %b, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1) %0 = add nsw i32 %b, %a, !dbg !9 ; [#uses=1] ret i32 %0, !dbg !11 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!15} Index: llvm/trunk/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll +++ llvm/trunk/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll @@ -9,16 +9,16 @@ ; Function Attrs: nounwind optsize define void @x0(i8* nocapture %buf, i32 %nbytes) #0 { entry: - tail call void @llvm.dbg.value(metadata i8* %buf, i64 0, metadata !8, metadata !14), !dbg !15 - tail call void @llvm.dbg.value(metadata i32 %nbytes, i64 0, metadata !16, metadata !14), !dbg !18 + tail call void @llvm.dbg.value(metadata i8* %buf, metadata !8, metadata !14), !dbg !15 + tail call void @llvm.dbg.value(metadata i32 %nbytes, metadata !16, metadata !14), !dbg !18 %tmp = load i32, i32* @length, !dbg !19 %cmp = icmp eq i32 %tmp, -1, !dbg !19 %cmp.not = xor i1 %cmp, true %cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !19 %or.cond = and i1 %cmp.not, %cmp3 - tail call void @llvm.dbg.value(metadata i32 %tmp, i64 0, metadata !16, metadata !14), !dbg !19 + tail call void @llvm.dbg.value(metadata i32 %tmp, metadata !16, metadata !14), !dbg !19 %nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !21, metadata !14), !dbg !22 + tail call void @llvm.dbg.value(metadata i32 0, metadata !21, metadata !14), !dbg !22 br label %while.cond, !dbg !23 while.cond: ; preds = %while.body, %entry @@ -47,7 +47,7 @@ declare i32 @x1() #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind optsize } attributes #1 = { optsize } Index: llvm/trunk/test/CodeGen/ARM/2010-08-04-StackVariable.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-08-04-StackVariable.ll +++ llvm/trunk/test/CodeGen/ARM/2010-08-04-StackVariable.ll @@ -9,8 +9,8 @@ define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp !dbg !17 { entry: %"alloca point" = bitcast i32 0 to i32 - call void @llvm.dbg.value(metadata i32 %i, i64 0, metadata !23, metadata !DIExpression()), !dbg !24 - call void @llvm.dbg.value(metadata %struct.SVal* %location, i64 0, metadata !25, metadata !DIExpression()), !dbg !24 + call void @llvm.dbg.value(metadata i32 %i, metadata !23, metadata !DIExpression()), !dbg !24 + call void @llvm.dbg.value(metadata %struct.SVal* %location, metadata !25, metadata !DIExpression()), !dbg !24 %0 = icmp ne i32 %i, 0, !dbg !27 br i1 %0, label %bb, label %bb1, !dbg !27 @@ -37,7 +37,7 @@ define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 !dbg !16 { entry: %"alloca point" = bitcast i32 0 to i32 - call void @llvm.dbg.value(metadata %struct.SVal* %this, i64 0, metadata !31, metadata !DIExpression()), !dbg !34 + call void @llvm.dbg.value(metadata %struct.SVal* %this, metadata !31, metadata !DIExpression()), !dbg !34 %0 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 0, !dbg !34 store i8* null, i8** %0, align 8, !dbg !34 %1 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 1, !dbg !34 @@ -68,14 +68,14 @@ %7 = load i32, i32* %6, align 8, !dbg !43 store i32 %7, i32* %5, align 8, !dbg !43 %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 - call void @llvm.dbg.value(metadata i32 %8, i64 0, metadata !44, metadata !DIExpression()), !dbg !43 + call void @llvm.dbg.value(metadata i32 %8, metadata !44, metadata !DIExpression()), !dbg !43 br label %return, !dbg !45 return: ret i32 0, !dbg !45 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!49} Index: llvm/trunk/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll +++ llvm/trunk/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll @@ -31,22 +31,22 @@ ; Function Attrs: nounwind optsize define zeroext i8 @get1(i8 zeroext %a) #0 !dbg !16 { entry: - tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !20, metadata !23), !dbg !24 + tail call void @llvm.dbg.value(metadata i8 %a, metadata !20, metadata !23), !dbg !24 %0 = load i8, i8* @x1, align 4, !dbg !24 - tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !21, metadata !23), !dbg !24 + tail call void @llvm.dbg.value(metadata i8 %0, metadata !21, metadata !23), !dbg !24 store i8 %a, i8* @x1, align 4, !dbg !24 ret i8 %0, !dbg !25 } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 ; Function Attrs: nounwind optsize define zeroext i8 @get2(i8 zeroext %a) #0 !dbg !26 { entry: - tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !28, metadata !23), !dbg !31 + tail call void @llvm.dbg.value(metadata i8 %a, metadata !28, metadata !23), !dbg !31 %0 = load i8, i8* @x2, align 4, !dbg !31 - tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !29, metadata !23), !dbg !31 + tail call void @llvm.dbg.value(metadata i8 %0, metadata !29, metadata !23), !dbg !31 store i8 %a, i8* @x2, align 4, !dbg !31 ret i8 %0, !dbg !32 } @@ -55,9 +55,9 @@ define zeroext i8 @get3(i8 zeroext %a) #0 !dbg !33 { entry: - tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !35, metadata !23), !dbg !38 + tail call void @llvm.dbg.value(metadata i8 %a, metadata !35, metadata !23), !dbg !38 %0 = load i8, i8* @x3, align 4, !dbg !38 - tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !36, metadata !23), !dbg !38 + tail call void @llvm.dbg.value(metadata i8 %0, metadata !36, metadata !23), !dbg !38 store i8 %a, i8* @x3, align 4, !dbg !38 ret i8 %0, !dbg !39 } @@ -66,9 +66,9 @@ define zeroext i8 @get4(i8 zeroext %a) #0 !dbg !40 { entry: - tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !42, metadata !23), !dbg !45 + tail call void @llvm.dbg.value(metadata i8 %a, metadata !42, metadata !23), !dbg !45 %0 = load i8, i8* @x4, align 4, !dbg !45 - tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !43, metadata !23), !dbg !45 + tail call void @llvm.dbg.value(metadata i8 %0, metadata !43, metadata !23), !dbg !45 store i8 %a, i8* @x4, align 4, !dbg !45 ret i8 %0, !dbg !46 } @@ -77,9 +77,9 @@ define zeroext i8 @get5(i8 zeroext %a) #0 !dbg !47 { entry: - tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !49, metadata !23), !dbg !52 + tail call void @llvm.dbg.value(metadata i8 %a, metadata !49, metadata !23), !dbg !52 %0 = load i8, i8* @x5, align 4, !dbg !52 - tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !50, metadata !23), !dbg !52 + tail call void @llvm.dbg.value(metadata i8 %0, metadata !50, metadata !23), !dbg !52 store i8 %a, i8* @x5, align 4, !dbg !52 ret i8 %0, !dbg !53 } Index: llvm/trunk/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll +++ llvm/trunk/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll @@ -31,9 +31,9 @@ ; Function Attrs: nounwind optsize ssp define i32 @get1(i32 %a) #0 !dbg !10 { - tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !14, metadata !17), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %a, metadata !14, metadata !17), !dbg !18 %1 = load i32, i32* @x1, align 4, !dbg !19 - tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !15, metadata !17), !dbg !19 + tail call void @llvm.dbg.value(metadata i32 %1, metadata !15, metadata !17), !dbg !19 store i32 %a, i32* @x1, align 4, !dbg !19 ret i32 %1, !dbg !19 } @@ -41,9 +41,9 @@ ; Function Attrs: nounwind optsize ssp define i32 @get2(i32 %a) #0 !dbg !20 { - tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !22, metadata !17), !dbg !25 + tail call void @llvm.dbg.value(metadata i32 %a, metadata !22, metadata !17), !dbg !25 %1 = load i32, i32* @x2, align 4, !dbg !26 - tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !23, metadata !17), !dbg !26 + tail call void @llvm.dbg.value(metadata i32 %1, metadata !23, metadata !17), !dbg !26 store i32 %a, i32* @x2, align 4, !dbg !26 ret i32 %1, !dbg !26 } @@ -51,9 +51,9 @@ ; Function Attrs: nounwind optsize ssp define i32 @get3(i32 %a) #0 !dbg !27 { - tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !29, metadata !17), !dbg !32 + tail call void @llvm.dbg.value(metadata i32 %a, metadata !29, metadata !17), !dbg !32 %1 = load i32, i32* @x3, align 4, !dbg !33 - tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !30, metadata !17), !dbg !33 + tail call void @llvm.dbg.value(metadata i32 %1, metadata !30, metadata !17), !dbg !33 store i32 %a, i32* @x3, align 4, !dbg !33 ret i32 %1, !dbg !33 } @@ -61,9 +61,9 @@ ; Function Attrs: nounwind optsize ssp define i32 @get4(i32 %a) #0 !dbg !34 { - tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !36, metadata !17), !dbg !39 + tail call void @llvm.dbg.value(metadata i32 %a, metadata !36, metadata !17), !dbg !39 %1 = load i32, i32* @x4, align 4, !dbg !40 - tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !37, metadata !17), !dbg !40 + tail call void @llvm.dbg.value(metadata i32 %1, metadata !37, metadata !17), !dbg !40 store i32 %a, i32* @x4, align 4, !dbg !40 ret i32 %1, !dbg !40 } @@ -71,16 +71,16 @@ ; Function Attrs: nounwind optsize ssp define i32 @get5(i32 %a) #0 !dbg !41 { - tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !43, metadata !17), !dbg !46 + tail call void @llvm.dbg.value(metadata i32 %a, metadata !43, metadata !17), !dbg !46 %1 = load i32, i32* @x5, align 4, !dbg !47 - tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !44, metadata !17), !dbg !47 + tail call void @llvm.dbg.value(metadata i32 %1, metadata !44, metadata !17), !dbg !47 store i32 %a, i32* @x5, align 4, !dbg !47 ret i32 %1, !dbg !47 } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 attributes #0 = { nounwind optsize ssp } attributes #1 = { nounwind readnone } Index: llvm/trunk/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll +++ llvm/trunk/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll @@ -7,7 +7,7 @@ ; Function Attrs: minsize nounwind optsize readonly define %struct.s* @s_idx(%struct.s* readonly %xl) local_unnamed_addr #0 !dbg !8 { entry: - tail call void @llvm.dbg.value(metadata %struct.s* %xl, i64 0, metadata !17, metadata !18), !dbg !19 + tail call void @llvm.dbg.value(metadata %struct.s* %xl, metadata !17, metadata !18), !dbg !19 br label %while.cond, !dbg !20 while.cond: ; preds = %while.body, %entry @@ -18,7 +18,7 @@ while.body: ; preds = %while.cond %next = getelementptr inbounds %struct.s, %struct.s* %xl.addr.0, i32 0, i32 0 %0 = load %struct.s*, %struct.s** %next, align 4 - tail call void @llvm.dbg.value(metadata %struct.s* %0, i64 0, metadata !17, metadata !18), !dbg !19 + tail call void @llvm.dbg.value(metadata %struct.s* %0, metadata !17, metadata !18), !dbg !19 br label %while.cond while.end: ; preds = %while.cond @@ -26,7 +26,7 @@ } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!3, !4, !5, !6} Index: llvm/trunk/test/CodeGen/ARM/coalesce-dbgvalue.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/coalesce-dbgvalue.ll +++ llvm/trunk/test/CodeGen/ARM/coalesce-dbgvalue.ll @@ -28,11 +28,11 @@ for.body2: ; preds = %for.cond1 store i32 %storemerge11, i32* @b, align 4, !dbg !26 - tail call void @llvm.dbg.value(metadata i32* null, i64 0, metadata !20, metadata !27), !dbg !28 + tail call void @llvm.dbg.value(metadata i32* null, metadata !20, metadata !27), !dbg !28 %0 = load i64, i64* @a, align 8, !dbg !29 %xor = xor i64 %0, %e.1.ph, !dbg !29 %conv3 = trunc i64 %xor to i32, !dbg !29 - tail call void @llvm.dbg.value(metadata i32 %conv3, i64 0, metadata !19, metadata !27), !dbg !29 + tail call void @llvm.dbg.value(metadata i32 %conv3, metadata !19, metadata !27), !dbg !29 %tobool4 = icmp eq i32 %conv3, 0, !dbg !29 br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29 @@ -70,7 +70,7 @@ declare i32 @fn3(...) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll @@ -7,13 +7,13 @@ %struct.tag_s = type { i32, i32, i32 } define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "no-frame-pointer-elim"="true" !dbg !1 { - tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, i64 0, metadata !5, metadata !DIExpression()), !dbg !20 - tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, i64 0, metadata !13, metadata !DIExpression()), !dbg !21 - tail call void @llvm.dbg.value(metadata i64 %x, i64 0, metadata !14, metadata !DIExpression()), !dbg !22 - tail call void @llvm.dbg.value(metadata i64 %y, i64 0, metadata !17, metadata !DIExpression()), !dbg !23 + tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, metadata !5, metadata !DIExpression()), !dbg !20 + tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21 + tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22 + tail call void @llvm.dbg.value(metadata i64 %y, metadata !17, metadata !DIExpression()), !dbg !23 ;CHECK: @DEBUG_VALUE: foo:y <- [%R7+8] - tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, i64 0, metadata !18, metadata !DIExpression()), !dbg !24 - tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, i64 0, metadata !19, metadata !DIExpression()), !dbg !25 + tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, metadata !18, metadata !DIExpression()), !dbg !24 + tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, metadata !19, metadata !DIExpression()), !dbg !25 %1 = icmp eq %struct.tag_s* %c, null, !dbg !26 br i1 %1, label %3, label %2, !dbg !26 @@ -27,7 +27,7 @@ declare void @foobar(i64, i64) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!33} Index: llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll @@ -39,7 +39,7 @@ declare i8* @objc_msgSend(i8*, i8*, ...) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind @@ -47,7 +47,7 @@ %1 = alloca %0*, align 4 %bounds = alloca %struct.CR, align 4 %data = alloca %struct.CR, align 4 - call void @llvm.dbg.value(metadata i8* %.block_descriptor, i64 0, metadata !27, metadata !DIExpression()), !dbg !129 + call void @llvm.dbg.value(metadata i8* %.block_descriptor, metadata !27, metadata !DIExpression()), !dbg !129 store %0* %loadedMydata, %0** %1, align 4 call void @llvm.dbg.declare(metadata %0** %1, metadata !130, metadata !DIExpression()), !dbg !131 %2 = bitcast %struct.CR* %bounds to %1* Index: llvm/trunk/test/CodeGen/ARM/debug-info-branch-folding.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-branch-folding.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-branch-folding.ll @@ -20,9 +20,9 @@ for.body9: ; preds = %for.body9, %entry %add19 = fadd <4 x float> undef, , !dbg !39 - tail call void @llvm.dbg.value(metadata <4 x float> %add19, i64 0, metadata !27, metadata !DIExpression()), !dbg !39 + tail call void @llvm.dbg.value(metadata <4 x float> %add19, metadata !27, metadata !DIExpression()), !dbg !39 %add20 = fadd <4 x float> undef, , !dbg !39 - tail call void @llvm.dbg.value(metadata <4 x float> %add20, i64 0, metadata !28, metadata !DIExpression()), !dbg !39 + tail call void @llvm.dbg.value(metadata <4 x float> %add20, metadata !28, metadata !DIExpression()), !dbg !39 br i1 %cond, label %for.end54, label %for.body9, !dbg !44 for.end54: ; preds = %for.body9 @@ -37,7 +37,7 @@ declare i32 @printf(i8* nocapture, ...) nounwind -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.module.flags = !{!56} !llvm.dbg.cu = !{!2} Index: llvm/trunk/test/CodeGen/ARM/debug-info-d16-reg.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-d16-reg.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-d16-reg.ll @@ -12,9 +12,9 @@ define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize !dbg !9 { entry: - tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !19, metadata !DIExpression()), !dbg !26 - tail call void @llvm.dbg.value(metadata double %val, i64 0, metadata !20, metadata !DIExpression()), !dbg !26 - tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !21, metadata !DIExpression()), !dbg !26 + tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !19, metadata !DIExpression()), !dbg !26 + tail call void @llvm.dbg.value(metadata double %val, metadata !20, metadata !DIExpression()), !dbg !26 + tail call void @llvm.dbg.value(metadata i8 %c, metadata !21, metadata !DIExpression()), !dbg !26 %0 = zext i8 %c to i32, !dbg !27 %1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27 ret i32 0, !dbg !29 @@ -22,9 +22,9 @@ define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline !dbg !0 { entry: - tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !16, metadata !DIExpression()), !dbg !30 - tail call void @llvm.dbg.value(metadata double %val, i64 0, metadata !17, metadata !DIExpression()), !dbg !30 - tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !18, metadata !DIExpression()), !dbg !30 + tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !16, metadata !DIExpression()), !dbg !30 + tail call void @llvm.dbg.value(metadata double %val, metadata !17, metadata !DIExpression()), !dbg !30 + tail call void @llvm.dbg.value(metadata i8 %c, metadata !18, metadata !DIExpression()), !dbg !30 %0 = zext i8 %c to i32, !dbg !31 %1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31 ret i32 0, !dbg !33 @@ -32,22 +32,22 @@ declare i32 @printf(i8* nocapture, ...) nounwind -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize !dbg !10 { entry: - tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !22, metadata !DIExpression()), !dbg !34 - tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !23, metadata !DIExpression()), !dbg !34 + tail call void @llvm.dbg.value(metadata i32 %argc, metadata !22, metadata !DIExpression()), !dbg !34 + tail call void @llvm.dbg.value(metadata i8** %argv, metadata !23, metadata !DIExpression()), !dbg !34 %0 = sitofp i32 %argc to double, !dbg !35 %1 = fadd double %0, 5.555552e+05, !dbg !35 - tail call void @llvm.dbg.value(metadata double %1, i64 0, metadata !24, metadata !DIExpression()), !dbg !35 + tail call void @llvm.dbg.value(metadata double %1, metadata !24, metadata !DIExpression()), !dbg !35 %2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36 %3 = getelementptr inbounds i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37 %4 = trunc i32 %argc to i8, !dbg !37 %5 = add i8 %4, 97, !dbg !37 - tail call void @llvm.dbg.value(metadata i8* %3, i64 0, metadata !49, metadata !DIExpression()) nounwind, !dbg !38 - tail call void @llvm.dbg.value(metadata double %1, i64 0, metadata !50, metadata !DIExpression()) nounwind, !dbg !38 - tail call void @llvm.dbg.value(metadata i8 %5, i64 0, metadata !51, metadata !DIExpression()) nounwind, !dbg !38 + tail call void @llvm.dbg.value(metadata i8* %3, metadata !49, metadata !DIExpression()) nounwind, !dbg !38 + tail call void @llvm.dbg.value(metadata double %1, metadata !50, metadata !DIExpression()) nounwind, !dbg !38 + tail call void @llvm.dbg.value(metadata i8 %5, metadata !51, metadata !DIExpression()) nounwind, !dbg !38 %6 = zext i8 %5 to i32, !dbg !39 %7 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39 %8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40 Index: llvm/trunk/test/CodeGen/ARM/debug-info-qreg.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-qreg.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-qreg.ll @@ -24,7 +24,7 @@ br i1 undef, label %for.end54, label %for.body9, !dbg !44 for.end54: ; preds = %for.body9 - tail call void @llvm.dbg.value(metadata <4 x float> %add19, i64 0, metadata !27, metadata !DIExpression()), !dbg !39 + tail call void @llvm.dbg.value(metadata <4 x float> %add19, metadata !27, metadata !DIExpression()), !dbg !39 %tmp115 = extractelement <4 x float> %add19, i32 1 %conv6.i75 = fpext float %tmp115 to double, !dbg !45 %call.i82 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45 @@ -33,7 +33,7 @@ declare i32 @printf(i8* nocapture, ...) nounwind -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!56} Index: llvm/trunk/test/CodeGen/ARM/debug-info-s16-reg.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-s16-reg.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-s16-reg.ll @@ -12,9 +12,9 @@ define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp !dbg !0 { entry: - tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !8, metadata !DIExpression()), !dbg !24 - tail call void @llvm.dbg.value(metadata float %val, i64 0, metadata !10, metadata !DIExpression()), !dbg !25 - tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !12, metadata !DIExpression()), !dbg !26 + tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !8, metadata !DIExpression()), !dbg !24 + tail call void @llvm.dbg.value(metadata float %val, metadata !10, metadata !DIExpression()), !dbg !25 + tail call void @llvm.dbg.value(metadata i8 %c, metadata !12, metadata !DIExpression()), !dbg !26 %conv = fpext float %val to double, !dbg !27 %conv3 = zext i8 %c to i32, !dbg !27 %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27 @@ -25,9 +25,9 @@ define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp !dbg !6 { entry: - tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !14, metadata !DIExpression()), !dbg !30 - tail call void @llvm.dbg.value(metadata float %val, i64 0, metadata !15, metadata !DIExpression()), !dbg !31 - tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !16, metadata !DIExpression()), !dbg !32 + tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !14, metadata !DIExpression()), !dbg !30 + tail call void @llvm.dbg.value(metadata float %val, metadata !15, metadata !DIExpression()), !dbg !31 + tail call void @llvm.dbg.value(metadata i8 %c, metadata !16, metadata !DIExpression()), !dbg !32 %conv = fpext float %val to double, !dbg !33 %conv3 = zext i8 %c to i32, !dbg !33 %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33 @@ -36,19 +36,19 @@ define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp !dbg !7 { entry: - tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !17, metadata !DIExpression()), !dbg !36 - tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !18, metadata !DIExpression()), !dbg !37 + tail call void @llvm.dbg.value(metadata i32 %argc, metadata !17, metadata !DIExpression()), !dbg !36 + tail call void @llvm.dbg.value(metadata i8** %argv, metadata !18, metadata !DIExpression()), !dbg !37 %conv = sitofp i32 %argc to double, !dbg !38 %add = fadd double %conv, 5.555552e+05, !dbg !38 %conv1 = fptrunc double %add to float, !dbg !38 - tail call void @llvm.dbg.value(metadata float %conv1, i64 0, metadata !22, metadata !DIExpression()), !dbg !38 + tail call void @llvm.dbg.value(metadata float %conv1, metadata !22, metadata !DIExpression()), !dbg !38 %call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39 %add.ptr = getelementptr i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40 %add5 = add nsw i32 %argc, 97, !dbg !40 %conv6 = trunc i32 %add5 to i8, !dbg !40 - tail call void @llvm.dbg.value(metadata i8* %add.ptr, i64 0, metadata !58, metadata !DIExpression()) nounwind, !dbg !41 - tail call void @llvm.dbg.value(metadata float %conv1, i64 0, metadata !60, metadata !DIExpression()) nounwind, !dbg !42 - tail call void @llvm.dbg.value(metadata i8 %conv6, i64 0, metadata !62, metadata !DIExpression()) nounwind, !dbg !43 + tail call void @llvm.dbg.value(metadata i8* %add.ptr, metadata !58, metadata !DIExpression()) nounwind, !dbg !41 + tail call void @llvm.dbg.value(metadata float %conv1, metadata !60, metadata !DIExpression()) nounwind, !dbg !42 + tail call void @llvm.dbg.value(metadata i8 %conv6, metadata !62, metadata !DIExpression()) nounwind, !dbg !43 %conv.i = fpext float %conv1 to double, !dbg !44 %conv3.i = and i32 %add5, 255, !dbg !44 %call.i = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44 @@ -58,7 +58,7 @@ declare i32 @puts(i8* nocapture) nounwind optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!53} Index: llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll +++ llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll @@ -15,7 +15,7 @@ define void @_Z3foov() optsize ssp !dbg !1 { entry: %call = tail call float @_Z3barv() optsize, !dbg !11 - tail call void @llvm.dbg.value(metadata float %call, i64 0, metadata !5, metadata !DIExpression()), !dbg !11 + tail call void @llvm.dbg.value(metadata float %call, metadata !5, metadata !DIExpression()), !dbg !11 %call16 = tail call float @_Z2f2v() optsize, !dbg !12 %cmp7 = fcmp olt float %call, %call16, !dbg !12 br i1 %cmp7, label %for.body, label %for.end, !dbg !12 @@ -38,7 +38,7 @@ declare float @_Z2f3f(float) optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!20} Index: llvm/trunk/test/DebugInfo/AArch64/cfi-eof-prologue.ll =================================================================== --- llvm/trunk/test/DebugInfo/AArch64/cfi-eof-prologue.ll +++ llvm/trunk/test/DebugInfo/AArch64/cfi-eof-prologue.ll @@ -28,7 +28,7 @@ ; Function Attrs: nounwind define %struct.B* @_ZN1BC2Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !28 { entry: - tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !30, metadata !38), !dbg !39 + tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !30, metadata !38), !dbg !39 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, !dbg !40 %call = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !40 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, i32 0, !dbg !40 @@ -41,8 +41,8 @@ ; Function Attrs: nounwind define %struct.B* @_ZN1BC1Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !32 { entry: - tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !34, metadata !38), !dbg !44 - tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !45, metadata !38) #3, !dbg !47 + tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !34, metadata !38), !dbg !44 + tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !45, metadata !38) #3, !dbg !47 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, !dbg !48 %call.i = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !48 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, i32 0, !dbg !48 @@ -51,7 +51,7 @@ } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind } attributes #2 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/AArch64/coalescing.ll =================================================================== --- llvm/trunk/test/DebugInfo/AArch64/coalescing.ll +++ llvm/trunk/test/DebugInfo/AArch64/coalescing.ll @@ -19,7 +19,7 @@ %size = alloca i32, align 4 %0 = bitcast i32* %size to i8*, !dbg !15 %call = call i8* @_Z3fooPv(i8* %0) #3, !dbg !15 - call void @llvm.dbg.value(metadata i32* %size, i64 0, metadata !10, metadata !16), !dbg !17 + call void @llvm.dbg.value(metadata i32* %size, metadata !10, metadata !16), !dbg !17 ; CHECK: .debug_info contents: ; CHECK: DW_TAG_variable ; CHECK-NEXT: DW_AT_location @@ -34,7 +34,7 @@ declare i8* @_Z3fooPv(i8*) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind optsize } attributes #1 = { optsize } Index: llvm/trunk/test/DebugInfo/AArch64/frameindices.ll =================================================================== --- llvm/trunk/test/DebugInfo/AArch64/frameindices.ll +++ llvm/trunk/test/DebugInfo/AArch64/frameindices.ll @@ -94,12 +94,12 @@ tail call void @llvm.dbg.declare(metadata [7 x i8]* %agg.tmp.sroa.4, metadata !56, metadata !77), !dbg !75 tail call void @llvm.dbg.declare(metadata %struct.A* undef, metadata !72, metadata !37), !dbg !78 %0 = load i64, i64* @a, align 8, !dbg !79, !tbaa !40 - tail call void @llvm.dbg.value(metadata %struct.B* %d, i64 0, metadata !73, metadata !37), !dbg !80 + tail call void @llvm.dbg.value(metadata %struct.B* %d, metadata !73, metadata !37), !dbg !80 %call = call %struct.B* @_ZN1BC1El(%struct.B* %d, i64 %0), !dbg !80 - call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !72, metadata !81), !dbg !78 - call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !72, metadata !82), !dbg !78 - call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !56, metadata !81), !dbg !75 - call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !56, metadata !82), !dbg !75 + call void @llvm.dbg.value(metadata i8 1, metadata !72, metadata !81), !dbg !78 + call void @llvm.dbg.value(metadata i8 1, metadata !72, metadata !82), !dbg !78 + call void @llvm.dbg.value(metadata i8 1, metadata !56, metadata !81), !dbg !75 + call void @llvm.dbg.value(metadata i8 1, metadata !56, metadata !82), !dbg !75 call void @llvm.dbg.declare(metadata %struct.A* undef, metadata !56, metadata !37), !dbg !75 %1 = getelementptr inbounds %struct.A, %struct.A* %agg.tmp.i.i, i64 0, i32 0, !dbg !83 call void @llvm.lifetime.start(i64 24, i8* %1), !dbg !83 @@ -123,14 +123,14 @@ invoke.cont: ; preds = %call.i.i.noexc call void @llvm.lifetime.end(i64 24, i8* %1), !dbg !91 - call void @llvm.dbg.value(metadata %struct.B* %d, i64 0, metadata !73, metadata !37), !dbg !80 + call void @llvm.dbg.value(metadata %struct.B* %d, metadata !73, metadata !37), !dbg !80 %call1 = call %struct.B* @_ZN1BD1Ev(%struct.B* %d) #3, !dbg !92 ret void, !dbg !92 lpad: ; preds = %call.i.i.noexc, %entry %3 = landingpad { i8*, i32 } cleanup, !dbg !92 - call void @llvm.dbg.value(metadata %struct.B* %d, i64 0, metadata !73, metadata !37), !dbg !80 + call void @llvm.dbg.value(metadata %struct.B* %d, metadata !73, metadata !37), !dbg !80 %call2 = call %struct.B* @_ZN1BD1Ev(%struct.B* %d) #3, !dbg !92 resume { i8*, i32 } %3, !dbg !92 } @@ -143,7 +143,7 @@ declare %struct.B* @_ZN1BD1Ev(%struct.B*) #3 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 +declare void @llvm.dbg.value(metadata, metadata, metadata) #0 ; Function Attrs: argmemonly nounwind declare void @llvm.lifetime.start(i64, i8* nocapture) #2 Index: llvm/trunk/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll =================================================================== --- llvm/trunk/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll +++ llvm/trunk/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll @@ -16,15 +16,15 @@ ; } ; } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) +declare void @llvm.dbg.value(metadata, metadata, metadata) ; CHECK-LABEL: {{^}}kernel1: define amdgpu_kernel void @kernel1( i32 addrspace(1)* nocapture readonly %A, i32 addrspace(1)* nocapture %B) !dbg !7 { entry: - tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %A, i64 0, metadata !13, metadata !19), !dbg !20 - tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %B, i64 0, metadata !14, metadata !19), !dbg !21 + tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %A, metadata !13, metadata !19), !dbg !20 + tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %B, metadata !14, metadata !19), !dbg !21 %0 = load i32, i32 addrspace(1)* %A, align 4, !dbg !22, !tbaa !24 %cmp = icmp eq i32 %0, 1, !dbg !28 br i1 %cmp, label %if.then, label %if.end, !dbg !29 Index: llvm/trunk/test/DebugInfo/ARM/PR16736.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/PR16736.ll +++ llvm/trunk/test/DebugInfo/ARM/PR16736.ll @@ -15,14 +15,14 @@ ; Function Attrs: nounwind define arm_aapcscc void @_Z1hiiiif(i32, i32, i32, i32, float %x) #0 "no-frame-pointer-elim"="true" !dbg !4 { entry: - tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !12, metadata !DIExpression()), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !13, metadata !DIExpression()), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 %2, i64 0, metadata !14, metadata !DIExpression()), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 %3, i64 0, metadata !15, metadata !DIExpression()), !dbg !18 - tail call void @llvm.dbg.value(metadata float %x, i64 0, metadata !16, metadata !DIExpression()), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %0, metadata !12, metadata !DIExpression()), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %1, metadata !13, metadata !DIExpression()), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %2, metadata !14, metadata !DIExpression()), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %3, metadata !15, metadata !DIExpression()), !dbg !18 + tail call void @llvm.dbg.value(metadata float %x, metadata !16, metadata !DIExpression()), !dbg !18 %call = tail call arm_aapcscc i32 @_Z1fv() #3, !dbg !19 %conv = sitofp i32 %call to float, !dbg !19 - tail call void @llvm.dbg.value(metadata float %conv, i64 0, metadata !16, metadata !DIExpression()), !dbg !19 + tail call void @llvm.dbg.value(metadata float %conv, metadata !16, metadata !DIExpression()), !dbg !19 tail call arm_aapcscc void @_Z1gf(float %conv) #3, !dbg !19 ret void, !dbg !20 } @@ -32,7 +32,7 @@ declare arm_aapcscc i32 @_Z1fv() ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind } attributes #2 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/ARM/PR26163.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/PR26163.ll +++ llvm/trunk/test/DebugInfo/ARM/PR26163.ll @@ -52,16 +52,16 @@ %struct.timeval = type { i64, i32 } declare void @llvm.dbg.declare(metadata, metadata, metadata) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) +declare void @llvm.dbg.value(metadata, metadata, metadata) declare void @foo() define i32 @parse_config_file() !dbg !4 { entry: - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !15, metadata !26), !dbg !27 + tail call void @llvm.dbg.value(metadata i32 0, metadata !15, metadata !26), !dbg !27 tail call void @llvm.dbg.declare(metadata %struct.timeval* undef, metadata !16, metadata !26), !dbg !29 - tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !16, metadata !30), !dbg !29 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !16, metadata !31), !dbg !29 + tail call void @llvm.dbg.value(metadata i64 0, metadata !16, metadata !30), !dbg !29 + tail call void @llvm.dbg.value(metadata i32 0, metadata !16, metadata !31), !dbg !29 tail call void @foo() #3, !dbg !32 ret i32 0, !dbg !33 } Index: llvm/trunk/test/DebugInfo/ARM/cfi-eof-prologue.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/cfi-eof-prologue.ll +++ llvm/trunk/test/DebugInfo/ARM/cfi-eof-prologue.ll @@ -29,7 +29,7 @@ ; Function Attrs: nounwind define %struct.B* @_ZN1BC2Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !28 { entry: - tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !30, metadata !40), !dbg !41 + tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !30, metadata !40), !dbg !41 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, !dbg !42 %call = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !42 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, i32 0, !dbg !42 @@ -42,8 +42,8 @@ ; Function Attrs: nounwind define %struct.B* @_ZN1BC1Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !32 { entry: - tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !34, metadata !40), !dbg !46 - tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !47, metadata !40) #3, !dbg !49 + tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !34, metadata !40), !dbg !46 + tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !47, metadata !40) #3, !dbg !49 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, !dbg !50 %call.i = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !50 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, i32 0, !dbg !50 @@ -52,7 +52,7 @@ } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind } attributes #2 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/ARM/float-args.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/float-args.ll +++ llvm/trunk/test/DebugInfo/ARM/float-args.ll @@ -18,11 +18,11 @@ define float @foo(float %p) !dbg !4 { entry: - tail call void @llvm.dbg.value(metadata float %p, i64 0, metadata !9, metadata !15), !dbg !16 + tail call void @llvm.dbg.value(metadata float %p, metadata !9, metadata !15), !dbg !16 ret float %p, !dbg !18 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) +declare void @llvm.dbg.value(metadata, metadata, metadata) !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!10, !11} Index: llvm/trunk/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll +++ llvm/trunk/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll @@ -27,10 +27,10 @@ ; The VLA alloca should be described by a dbg.declare: ; CHECK: call void @llvm.dbg.declare(metadata float* %vla, metadata ![[VLA:.*]], metadata {{.*}}) ; The VLA alloca and following store into the array should not be lowered to like this: -; CHECK-NOT: call void @llvm.dbg.value(metadata float %r, i64 0, metadata ![[VLA]]) +; CHECK-NOT: call void @llvm.dbg.value(metadata float %r, metadata ![[VLA]]) ; the backend interprets this as "vla has the location of %r". store float %r, float* %vla, align 4, !dbg !25, !tbaa !26 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !18, metadata !DIExpression()), !dbg !30 + tail call void @llvm.dbg.value(metadata i32 0, metadata !18, metadata !DIExpression()), !dbg !30 %cmp8 = icmp sgt i32 %conv, 0, !dbg !30 br i1 %cmp8, label %for.body, label %for.end, !dbg !30 @@ -41,7 +41,7 @@ %div = fdiv float %0, %r, !dbg !31 store float %div, float* %arrayidx2, align 4, !dbg !31, !tbaa !26 %inc = add nsw i32 %i.09, 1, !dbg !30 - tail call void @llvm.dbg.value(metadata i32 %inc, i64 0, metadata !18, metadata !DIExpression()), !dbg !30 + tail call void @llvm.dbg.value(metadata i32 %inc, metadata !18, metadata !DIExpression()), !dbg !30 %exitcond = icmp eq i32 %inc, %conv, !dbg !30 br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge, !dbg !30 @@ -58,7 +58,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 attributes #0 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll +++ llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll @@ -19,12 +19,12 @@ target triple = "armv7-apple-ios7.0" ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 +declare void @llvm.dbg.value(metadata, metadata, metadata) #0 define <3 x float> @_TFV4simd8float2x3g9subscriptFSiVS_6float3(i32, <3 x float>, <3 x float>) !dbg !5 { entry: - tail call void @llvm.dbg.value(metadata <3 x float> %1, i64 0, metadata !8, metadata !9), !dbg !10 - tail call void @llvm.dbg.value(metadata <3 x float> %2, i64 0, metadata !8, metadata !11), !dbg !10 + tail call void @llvm.dbg.value(metadata <3 x float> %1, metadata !8, metadata !9), !dbg !10 + tail call void @llvm.dbg.value(metadata <3 x float> %2, metadata !8, metadata !11), !dbg !10 %3 = icmp eq i32 %0, 0, !dbg !12 br i1 %3, label %7, label %4, !dbg !12 Index: llvm/trunk/test/DebugInfo/ARM/s-super-register.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/s-super-register.ll +++ llvm/trunk/test/DebugInfo/ARM/s-super-register.ll @@ -10,7 +10,7 @@ define void @_Z3foov() optsize ssp !dbg !1 { entry: %call = tail call float @_Z3barv() optsize, !dbg !11 - tail call void @llvm.dbg.value(metadata float %call, i64 0, metadata !5, metadata !DIExpression()), !dbg !11 + tail call void @llvm.dbg.value(metadata float %call, metadata !5, metadata !DIExpression()), !dbg !11 %call16 = tail call float @_Z2f2v() optsize, !dbg !12 %cmp7 = fcmp olt float %call, %call16, !dbg !12 br i1 %cmp7, label %for.body, label %for.end, !dbg !12 @@ -33,7 +33,7 @@ declare float @_Z2f3f(float) optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!20} Index: llvm/trunk/test/DebugInfo/ARM/split-complex.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/split-complex.ll +++ llvm/trunk/test/DebugInfo/ARM/split-complex.ll @@ -17,9 +17,9 @@ ; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x04> 10 00 93 08 ) ; DW_AT_location ( constu 0x00000000, piece 0x00000008 ) ; CHECK-NEXT: DW_AT_name {{.*}} "c" - tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !14, metadata !17), !dbg !16 + tail call void @llvm.dbg.value(metadata i64 0, metadata !14, metadata !17), !dbg !16 ; Manually removed to disable location list emission: - ; tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !14, metadata !18), !dbg !16 + ; tail call void @llvm.dbg.value(metadata i64 0, metadata !14, metadata !18), !dbg !16 ret void, !dbg !19 } @@ -27,7 +27,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 +declare void @llvm.dbg.value(metadata, metadata, metadata) #0 attributes #0 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/ARM/sroa-complex.ll =================================================================== --- llvm/trunk/test/DebugInfo/ARM/sroa-complex.ll +++ llvm/trunk/test/DebugInfo/ARM/sroa-complex.ll @@ -19,10 +19,10 @@ ; SROA will split the complex double into two i64 values, because there is ; no native double data type available. ; Test that debug info for both values survives: - ; CHECK: call void @llvm.dbg.value(metadata i64 0, i64 0, + ; CHECK: call void @llvm.dbg.value(metadata i64 0, ; CHECK-SAME: metadata ![[C:.*]], metadata ![[REAL:.*]]) store double 0.000000e+00, double* %c.imagp, align 8, !dbg !17 - ; CHECK: call void @llvm.dbg.value(metadata i64 0, i64 0, + ; CHECK: call void @llvm.dbg.value(metadata i64 0, ; CHECK-SAME: metadata ![[C]], metadata ![[IMG:.*]]) ret void, !dbg !18 } Index: llvm/trunk/test/DebugInfo/COFF/comdat.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/comdat.ll +++ llvm/trunk/test/DebugInfo/COFF/comdat.ll @@ -80,7 +80,7 @@ ; Function Attrs: inlinehint noinline nounwind uwtable define linkonce_odr void @f(i32 %c) #2 comdat personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) !dbg !22 { entry: - tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !26, metadata !27), !dbg !28 + tail call void @llvm.dbg.value(metadata i32 %c, metadata !26, metadata !27), !dbg !28 %0 = load volatile i32, i32* @x, align 4, !dbg !29, !tbaa !11 %inc = add nsw i32 %0, 1, !dbg !29 store volatile i32 %inc, i32* @x, align 4, !dbg !29, !tbaa !11 @@ -114,8 +114,8 @@ ; Function Attrs: nounwind define internal fastcc void @"\01?fin$0@0@f@@"() unnamed_addr #3 comdat($f) !dbg !41 { entry: - tail call void @llvm.dbg.value(metadata i8* null, i64 0, metadata !44, metadata !27), !dbg !48 - tail call void @llvm.dbg.value(metadata i8 0, i64 0, metadata !46, metadata !27), !dbg !48 + tail call void @llvm.dbg.value(metadata i8* null, metadata !44, metadata !27), !dbg !48 + tail call void @llvm.dbg.value(metadata i8 0, metadata !46, metadata !27), !dbg !48 %0 = load volatile i32, i32* @x, align 4, !dbg !49, !tbaa !11 %inc = add nsw i32 %0, 1, !dbg !49 store volatile i32 %inc, i32* @x, align 4, !dbg !49, !tbaa !11 @@ -127,7 +127,7 @@ declare i32 @__C_specific_handler(...) ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #5 +declare void @llvm.dbg.value(metadata, metadata, metadata) #5 attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: llvm/trunk/test/DebugInfo/COFF/fp-stack.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/fp-stack.ll +++ llvm/trunk/test/DebugInfo/COFF/fp-stack.ll @@ -6,7 +6,7 @@ define double @f(double %p1) !dbg !4 { entry: %sub = fsub double -0.000000e+00, %p1, !dbg !16 - tail call void @llvm.dbg.value(metadata double %sub, i64 0, metadata !10, metadata !14), !dbg !15 + tail call void @llvm.dbg.value(metadata double %sub, metadata !10, metadata !14), !dbg !15 ret double %sub } @@ -22,7 +22,7 @@ ; OBJ: } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) +declare void @llvm.dbg.value(metadata, metadata, metadata) !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!11, !12} Index: llvm/trunk/test/DebugInfo/COFF/local-constant.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/local-constant.ll +++ llvm/trunk/test/DebugInfo/COFF/local-constant.ll @@ -32,7 +32,7 @@ ; Function Attrs: nounwind uwtable define void @"\01?constant_var@@YAXXZ"() #0 !dbg !4 { entry: - tail call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !8, metadata !14), !dbg !15 + tail call void @llvm.dbg.value(metadata i32 42, metadata !8, metadata !14), !dbg !15 tail call void @"\01?useint@@YAXH@Z"(i32 42) #3, !dbg !16 tail call void @"\01?useint@@YAXH@Z"(i32 42) #3, !dbg !17 ret void, !dbg !18 @@ -41,7 +41,7 @@ declare void @"\01?useint@@YAXH@Z"(i32) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll +++ llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll @@ -100,7 +100,7 @@ if.then: ; preds = %entry %call1 = tail call i32 bitcast (i32 (...)* @vardef to i32 ()*)() #4, !dbg !17 - tail call void @llvm.dbg.value(metadata i32 %call1, i64 0, metadata !12, metadata !18), !dbg !19 + tail call void @llvm.dbg.value(metadata i32 %call1, metadata !12, metadata !18), !dbg !19 %call2 = tail call i32 bitcast (i32 (...)* @barrier to i32 ()*)() #4, !dbg !20 %tobool3 = icmp eq i32 %call2, 0, !dbg !20 br i1 %tobool3, label %if.end, label %if.then4, !dbg !22 @@ -131,7 +131,7 @@ declare void @use(i32) local_unnamed_addr #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3 +declare void @llvm.dbg.value(metadata, metadata, metadata) #3 attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: llvm/trunk/test/DebugInfo/COFF/pieces.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/pieces.ll +++ llvm/trunk/test/DebugInfo/COFF/pieces.ll @@ -249,10 +249,10 @@ define i32 @loop_csr() local_unnamed_addr #0 !dbg !7 { entry: tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !12, metadata !17), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !19), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !20), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !19), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !20), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !19), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !20), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !19), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !20), !dbg !18 store i32 0, i32* @i, align 4, !dbg !21, !tbaa !24 %0 = load i32, i32* @n, align 4, !dbg !28, !tbaa !24 %cmp9 = icmp sgt i32 %0, 0, !dbg !29 @@ -261,12 +261,12 @@ for.body: ; preds = %entry, %for.body %o.sroa.0.011 = phi i32 [ %call, %for.body ], [ 0, %entry ] %o.sroa.5.010 = phi i32 [ %call2, %for.body ], [ 0, %entry ] - tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.011, i64 0, metadata !12, metadata !19), !dbg !18 - tail call void @llvm.dbg.value(metadata i32 %o.sroa.5.010, i64 0, metadata !12, metadata !20), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.011, metadata !12, metadata !19), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %o.sroa.5.010, metadata !12, metadata !20), !dbg !18 %call = tail call i32 @g(i32 %o.sroa.0.011) #5, !dbg !31 - tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !12, metadata !19), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %call, metadata !12, metadata !19), !dbg !18 %call2 = tail call i32 @g(i32 %o.sroa.5.010) #5, !dbg !33 - tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !12, metadata !20), !dbg !18 + tail call void @llvm.dbg.value(metadata i32 %call2, metadata !12, metadata !20), !dbg !18 %1 = load i32, i32* @i, align 4, !dbg !21, !tbaa !24 %inc = add nsw i32 %1, 1, !dbg !21 store i32 %inc, i32* @i, align 4, !dbg !21, !tbaa !24 @@ -291,7 +291,7 @@ entry: %o.sroa.1.0.extract.shift = lshr i64 %o.coerce, 32 %o.sroa.1.0.extract.trunc = trunc i64 %o.sroa.1.0.extract.shift to i32 - tail call void @llvm.dbg.value(metadata i32 %o.sroa.1.0.extract.trunc, i64 0, metadata !47, metadata !20), !dbg !48 + tail call void @llvm.dbg.value(metadata i32 %o.sroa.1.0.extract.trunc, metadata !47, metadata !20), !dbg !48 tail call void @llvm.dbg.declare(metadata %struct.PadRight* undef, metadata !47, metadata !17), !dbg !48 ret i32 %o.sroa.1.0.extract.trunc, !dbg !49 } @@ -300,7 +300,7 @@ define i32 @pad_left(i64 %o.coerce) local_unnamed_addr #3 !dbg !50 { entry: %o.sroa.0.0.extract.trunc = trunc i64 %o.coerce to i32 - tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.0.extract.trunc, i64 0, metadata !58, metadata !19), !dbg !59 + tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.0.extract.trunc, metadata !58, metadata !19), !dbg !59 tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !58, metadata !17), !dbg !59 ret i32 %o.sroa.0.0.extract.trunc, !dbg !60 } @@ -312,7 +312,7 @@ tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !72, metadata !17), !dbg !75 %p.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.Nested, %struct.Nested* %o, i64 0, i32 0, i64 1, i32 1, !dbg !76 %p.sroa.3.0.copyload = load i32, i32* %p.sroa.3.0..sroa_idx2, align 4, !dbg !76 - tail call void @llvm.dbg.value(metadata i32 %p.sroa.3.0.copyload, i64 0, metadata !72, metadata !20), !dbg !75 + tail call void @llvm.dbg.value(metadata i32 %p.sroa.3.0.copyload, metadata !72, metadata !20), !dbg !75 ret i32 %p.sroa.3.0.copyload, !dbg !77 } @@ -320,15 +320,15 @@ define i32 @bitpiece_spill() local_unnamed_addr #0 !dbg !78 { entry: tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !80, metadata !17), !dbg !81 - tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !80, metadata !19), !dbg !81 + tail call void @llvm.dbg.value(metadata i32 0, metadata !80, metadata !19), !dbg !81 %call = tail call i32 @g(i32 0) #5, !dbg !82 - tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !80, metadata !20), !dbg !81 + tail call void @llvm.dbg.value(metadata i32 %call, metadata !80, metadata !20), !dbg !81 tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #5, !dbg !83, !srcloc !84 ret i32 %call, !dbg !85 } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/COFF/register-variables.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/register-variables.ll +++ llvm/trunk/test/DebugInfo/COFF/register-variables.ll @@ -198,25 +198,25 @@ ; Function Attrs: nounwind uwtable define void @f(i32 %p) #0 !dbg !12 { entry: - tail call void @llvm.dbg.value(metadata i32 %p, i64 0, metadata !16, metadata !23), !dbg !24 + tail call void @llvm.dbg.value(metadata i32 %p, metadata !16, metadata !23), !dbg !24 %tobool = icmp eq i32 %p, 0, !dbg !25 %call2 = tail call i32 @getint() #3, !dbg !26 br i1 %tobool, label %if.else, label %if.then, !dbg !27 if.then: ; preds = %entry - tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !17, metadata !23), !dbg !28 - tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !29, metadata !23), !dbg !35 + tail call void @llvm.dbg.value(metadata i32 %call2, metadata !17, metadata !23), !dbg !28 + tail call void @llvm.dbg.value(metadata i32 %call2, metadata !29, metadata !23), !dbg !35 %add.i = add nsw i32 %call2, 1, !dbg !37 - tail call void @llvm.dbg.value(metadata i32 %add.i, i64 0, metadata !34, metadata !23), !dbg !38 + tail call void @llvm.dbg.value(metadata i32 %add.i, metadata !34, metadata !23), !dbg !38 %0 = load volatile i32, i32* @x, align 4, !dbg !39, !tbaa !40 %inc.i = add nsw i32 %0, 1, !dbg !39 store volatile i32 %inc.i, i32* @x, align 4, !dbg !39, !tbaa !40 - tail call void @llvm.dbg.value(metadata i32 %add.i, i64 0, metadata !20, metadata !23), !dbg !44 + tail call void @llvm.dbg.value(metadata i32 %add.i, metadata !20, metadata !23), !dbg !44 tail call void @putint(i32 %add.i) #3, !dbg !45 br label %if.end, !dbg !46 if.else: ; preds = %entry - tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !21, metadata !23), !dbg !47 + tail call void @llvm.dbg.value(metadata i32 %call2, metadata !21, metadata !23), !dbg !47 tail call void @putint(i32 %call2) #3, !dbg !48 br label %if.end @@ -229,7 +229,7 @@ declare void @putint(i32) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: llvm/trunk/test/DebugInfo/COFF/types-calling-conv.ll =================================================================== --- llvm/trunk/test/DebugInfo/COFF/types-calling-conv.ll +++ llvm/trunk/test/DebugInfo/COFF/types-calling-conv.ll @@ -165,7 +165,7 @@ ; Function Attrs: nounwind readnone define x86_thiscallcc void @"\01?thiscallcc@A@@QAEXXZ"(%struct.A* nocapture %this) #0 align 2 !dbg !6 { entry: - tail call void @llvm.dbg.value(metadata %struct.A* %this, i64 0, metadata !14, metadata !16), !dbg !17 + tail call void @llvm.dbg.value(metadata %struct.A* %this, metadata !14, metadata !16), !dbg !17 ret void, !dbg !18 } @@ -194,7 +194,7 @@ } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { norecurse nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: llvm/trunk/test/DebugInfo/Generic/2009-11-10-CurrentFn.ll =================================================================== --- llvm/trunk/test/DebugInfo/Generic/2009-11-10-CurrentFn.ll +++ llvm/trunk/test/DebugInfo/Generic/2009-11-10-CurrentFn.ll @@ -8,7 +8,7 @@ declare void @foo(...) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!18} Index: llvm/trunk/test/DebugInfo/Generic/2010-05-03-OriginDIE.ll =================================================================== --- llvm/trunk/test/DebugInfo/Generic/2010-05-03-OriginDIE.ll +++ llvm/trunk/test/DebugInfo/Generic/2010-05-03-OriginDIE.ll @@ -25,10 +25,10 @@ %a12 = load i64, i64* %a11, align 4, !dbg !7 ; [#uses=1] call void @llvm.dbg.declare(metadata i64* %data_addr.i17, metadata !8, metadata !DIExpression()) nounwind, !dbg !14 store i64 %a12, i64* %data_addr.i17, align 8 - call void @llvm.dbg.value(metadata !6, i64 0, metadata !15, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16) - call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !19, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16) + call void @llvm.dbg.value(metadata !6, metadata !15, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16) + call void @llvm.dbg.value(metadata i32 0, metadata !19, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16) call void @llvm.dbg.declare(metadata !6, metadata !23, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !24) - call void @llvm.dbg.value(metadata i64* %data_addr.i17, i64 0, metadata !34, metadata !DIExpression(DW_OP_deref)) nounwind, !dbg !DILocation(scope: !24) + call void @llvm.dbg.value(metadata i64* %data_addr.i17, metadata !34, metadata !DIExpression(DW_OP_deref)) nounwind, !dbg !DILocation(scope: !24) %a13 = load volatile i64, i64* %data_addr.i17, align 8 ; [#uses=1] %a14 = call i64 @llvm.bswap.i64(i64 %a13) nounwind ; [#uses=2] %a15 = add i64 %a10, %a14, !dbg !7 ; [#uses=1] @@ -40,7 +40,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone declare i32 @llvm.bswap.i32(i32) nounwind readnone Index: llvm/trunk/test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll =================================================================== --- llvm/trunk/test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll +++ llvm/trunk/test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll @@ -13,13 +13,13 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 +declare void @llvm.dbg.value(metadata, metadata, metadata) #0 ; Function Attrs: nounwind ssp define i32 @bar() #1 !dbg !8 { entry: %0 = load i32, i32* @i, align 4, !dbg !11 - tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !13, metadata !24), !dbg !25 + tail call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !24), !dbg !25 tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26 %1 = mul nsw i32 %0, %0, !dbg !27 store i32 %1, i32* @i, align 4, !dbg !11 Index: llvm/trunk/test/DebugInfo/Generic/dead-argument-order.ll =================================================================== --- llvm/trunk/test/DebugInfo/Generic/dead-argument-order.ll +++ llvm/trunk/test/DebugInfo/Generic/dead-argument-order.ll @@ -39,7 +39,7 @@ define i32 @_Z8function1Si(i32 %s.coerce, i32 %i) #0 !dbg !9 { entry: tail call void @llvm.dbg.declare(metadata %struct.S* undef, metadata !14, metadata !DIExpression()), !dbg !20 - tail call void @llvm.dbg.value(metadata i32 %i, i64 0, metadata !15, metadata !DIExpression()), !dbg !20 + tail call void @llvm.dbg.value(metadata i32 %i, metadata !15, metadata !DIExpression()), !dbg !20 %add = add nsw i32 %i, %s.coerce, !dbg !20 ret i32 %add, !dbg !20 } @@ -48,7 +48,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/Generic/gvn.ll =================================================================== --- llvm/trunk/test/DebugInfo/Generic/gvn.ll +++ llvm/trunk/test/DebugInfo/Generic/gvn.ll @@ -27,7 +27,7 @@ ; CHECK: %call = tail call i32 @f2(i32 1) #{{[0-9]}}, !dbg %call = tail call i32 @f2(i32 1) #0, !dbg !15 store i32 %call, i32* @a, align 4, !dbg !15, !tbaa !24 - tail call void @llvm.dbg.value(metadata i32* @a, i64 0, metadata !22, metadata !28) #0, !dbg !29 + tail call void @llvm.dbg.value(metadata i32* @a, metadata !22, metadata !28) #0, !dbg !29 %0 = load i32, i32* @b, align 4, !dbg !29, !tbaa !24 %tobool.i = icmp eq i32 %0, 0, !dbg !29 br i1 %tobool.i, label %if.end.i, label %land.lhs.true.i.thread, !dbg !30 @@ -58,7 +58,7 @@ declare i32 @f4(...) ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, metadata, metadata) #1 attributes #0 = { nounwind } attributes #1 = { nounwind readnone } Index: llvm/trunk/test/DebugInfo/Generic/incorrect-variable-debugloc.ll =================================================================== --- llvm/trunk/test/DebugInfo/Generic/incorrect-variable-debugloc.ll +++ llvm/trunk/test/DebugInfo/Generic/incorrect-variable-debugloc.ll @@ -110,7 +110,7 @@ ;