Index: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp =================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1999,6 +1999,18 @@ return V.getOperand(0); break; } + case ISD::ANY_EXTEND: { + SDValue Src = V.getOperand(0); + unsigned SrcBitWidth = Src.getScalarValueSizeInBits(); + // Being conservative here - only peek through if we only demand bits in the + // non-extended source (even though the extended bits are technically undef). + if (Mask.getActiveBits() > SrcBitWidth) + break; + APInt SrcMask = Mask.trunc(SrcBitWidth); + if (SDValue DemandedSrc = GetDemandedBits(Src, SrcMask)) + return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc); + break; + } } return SDValue(); } Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp @@ -34200,19 +34200,15 @@ static SDValue combineBT(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) { + SDValue N0 = N->getOperand(0); + SDValue N1 = N->getOperand(1); + // BT ignores high bits in the bit index operand. - SDValue Op1 = N->getOperand(1); - if (Op1.hasOneUse()) { - unsigned BitWidth = Op1.getValueSizeInBits(); - APInt DemandedMask = APInt::getLowBitsSet(BitWidth, Log2_32(BitWidth)); - KnownBits Known; - TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), - !DCI.isBeforeLegalizeOps()); - const TargetLowering &TLI = DAG.getTargetLoweringInfo(); - if (TLI.ShrinkDemandedConstant(Op1, DemandedMask, TLO) || - TLI.SimplifyDemandedBits(Op1, DemandedMask, Known, TLO)) - DCI.CommitTargetLoweringOpt(TLO); - } + unsigned BitWidth = N1.getValueSizeInBits(); + APInt DemandedMask = APInt::getLowBitsSet(BitWidth, Log2_32(BitWidth)); + if (SDValue DemandedN1 = DAG.GetDemandedBits(N1, DemandedMask)) + return DAG.getNode(X86ISD::BT, SDLoc(N), MVT::i32, N0, DemandedN1); + return SDValue(); } Index: llvm/trunk/test/CodeGen/X86/bt.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/bt.ll +++ llvm/trunk/test/CodeGen/X86/bt.ll @@ -1101,8 +1101,6 @@ ; X86-NEXT: movl (%edx,%eax,4), %esi ; X86-NEXT: movl $1, %edx ; X86-NEXT: shll %cl, %edx -; X86-NEXT: andb $31, %cl -; X86-NEXT: movzbl %cl, %ecx ; X86-NEXT: btl %ecx, %esi ; X86-NEXT: jae .LBB30_2 ; X86-NEXT: # BB#1: @@ -1120,9 +1118,7 @@ ; X64-NEXT: movl $1, %edi ; X64-NEXT: movl %edx, %ecx ; X64-NEXT: shll %cl, %edi -; X64-NEXT: andb $31, %dl -; X64-NEXT: movzbl %dl, %ecx -; X64-NEXT: btl %ecx, %r8d +; X64-NEXT: btl %edx, %r8d ; X64-NEXT: jae .LBB30_2 ; X64-NEXT: # BB#1: ; X64-NEXT: orl %edi, (%rsi,%rax,4)