Index: lib/CodeGen/GlobalISel/LegalizerHelper.cpp =================================================================== --- lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -597,22 +597,54 @@ MI.eraseFromParent(); return Legalized; } + case TargetOpcode::G_FCMP: { + unsigned Op0Ext, Op1Ext, DstReg; + if (TypeIdx == 0) { + Op0Ext = MI.getOperand(2).getReg(); + Op1Ext = MI.getOperand(3).getReg(); + DstReg = MRI.createGenericVirtualRegister(WideTy); + } else { + Op0Ext = MRI.createGenericVirtualRegister(WideTy); + Op1Ext = MRI.createGenericVirtualRegister(WideTy); + DstReg = MI.getOperand(0).getReg(); + MIRBuilder.buildInstr(TargetOpcode::G_FPEXT, Op0Ext, MI.getOperand(2).getReg()); + MIRBuilder.buildInstr(TargetOpcode::G_FPEXT, Op1Ext, MI.getOperand(3).getReg()); + } + MIRBuilder.buildFCmp( + static_cast(MI.getOperand(1).getPredicate()), + DstReg, Op0Ext, Op1Ext); + if (TypeIdx == 0) + MIRBuilder.buildInstr(TargetOpcode::G_FPTRUNC, MI.getOperand(0).getReg(), + DstReg); + MI.eraseFromParent(); + return Legalized; + } case TargetOpcode::G_ICMP: { - assert(TypeIdx == 1 && "unable to legalize predicate"); bool IsSigned = CmpInst::isSigned( static_cast(MI.getOperand(1).getPredicate())); - unsigned Op0Ext = MRI.createGenericVirtualRegister(WideTy); - unsigned Op1Ext = MRI.createGenericVirtualRegister(WideTy); - if (IsSigned) { - MIRBuilder.buildSExt(Op0Ext, MI.getOperand(2).getReg()); - MIRBuilder.buildSExt(Op1Ext, MI.getOperand(3).getReg()); + unsigned Op0Ext, Op1Ext, DstReg; + if (TypeIdx == 0) { + Op0Ext = MI.getOperand(2).getReg(); + Op1Ext = MI.getOperand(3).getReg(); + DstReg = MRI.createGenericVirtualRegister(WideTy); } else { - MIRBuilder.buildZExt(Op0Ext, MI.getOperand(2).getReg()); - MIRBuilder.buildZExt(Op1Ext, MI.getOperand(3).getReg()); + Op0Ext = MRI.createGenericVirtualRegister(WideTy); + Op1Ext = MRI.createGenericVirtualRegister(WideTy); + DstReg = MI.getOperand(0).getReg(); + if (IsSigned) { + MIRBuilder.buildSExt(Op0Ext, MI.getOperand(2).getReg()); + MIRBuilder.buildSExt(Op1Ext, MI.getOperand(3).getReg()); + } else { + MIRBuilder.buildZExt(Op0Ext, MI.getOperand(2).getReg()); + MIRBuilder.buildZExt(Op1Ext, MI.getOperand(3).getReg()); + } } MIRBuilder.buildICmp( static_cast(MI.getOperand(1).getPredicate()), - MI.getOperand(0).getReg(), Op0Ext, Op1Ext); + DstReg, Op0Ext, Op1Ext); + if (TypeIdx == 0) + MIRBuilder.buildInstr(TargetOpcode::G_TRUNC, MI.getOperand(0).getReg(), + DstReg); MI.eraseFromParent(); return Legalized; }