Index: lib/Target/AMDGPU/FLATInstructions.td =================================================================== --- lib/Target/AMDGPU/FLATInstructions.td +++ lib/Target/AMDGPU/FLATInstructions.td @@ -181,46 +181,94 @@ let is_flat_scratch = 1; } +class FLAT_AtomicNoRet_Pseudo pattern = []> : + FLAT_Pseudo { + let mayLoad = 1; + let mayStore = 1; + let has_glc = 0; + let glcValue = 0; + let has_vdst = 0; +} + +class FLAT_AtomicRet_Pseudo pattern = []> + : FLAT_AtomicNoRet_Pseudo { + let hasPostISelHook = 1; + let has_vdst = 1; + let glcValue = 1; + let PseudoInstr = NAME # "_RTN"; +} + multiclass FLAT_Atomic_Pseudo< string opName, RegisterClass vdst_rc, ValueType vt, SDPatternOperator atomic = null_frag, ValueType data_vt = vt, - RegisterClass data_rc = vdst_rc, - bit HasSignedOffset = 0> { + RegisterClass data_rc = vdst_rc> { + def "" : FLAT_AtomicNoRet_Pseudo , + AtomicNoRet { + let PseudoInstr = NAME; + } + + def _RTN : FLAT_AtomicRet_Pseudo , + AtomicNoRet ; +} + +multiclass FLAT_Global_Atomic_Pseudo< + string opName, + RegisterClass vdst_rc, + ValueType vt, + SDPatternOperator atomic = null_frag, + ValueType data_vt = vt, + RegisterClass data_rc = vdst_rc> { - def "" : FLAT_Pseudo , - AtomicNoRet { - let mayLoad = 1; - let mayStore = 1; - let has_glc = 0; - let glcValue = 0; - let has_vdst = 0; + (ins VReg_64:$vaddr, data_rc:$vdata, offset_s13:$offset, slc:$slc), + " $vaddr, $vdata, off$offset$slc">, + AtomicNoRet { + let has_saddr = 1; let PseudoInstr = NAME; } - def _RTN : FLAT_Pseudo , - AtomicNoRet { - let mayLoad = 1; - let mayStore = 1; - let hasPostISelHook = 1; - let has_glc = 0; - let glcValue = 1; - let PseudoInstr = NAME # "_RTN"; + AtomicNoRet { + let has_saddr = 1; + } + + def _SADDR : FLAT_AtomicNoRet_Pseudo , + AtomicNoRet { + let has_saddr = 1; + let enabled_saddr = 1; + let PseudoInstr = NAME#"_SADDR"; + } + + def _SADDR_RTN : FLAT_AtomicRet_Pseudo , + AtomicNoRet { + let has_saddr = 1; + let enabled_saddr = 1; + let PseudoInstr = NAME#"_SADDR_RTN"; } } @@ -385,6 +433,89 @@ defm GLOBAL_STORE_DWORDX3 : FLAT_Global_Store_Pseudo <"global_store_dwordx3", VReg_96>; defm GLOBAL_STORE_DWORDX4 : FLAT_Global_Store_Pseudo <"global_store_dwordx4", VReg_128>; + +let is_flat_global = 1 in { +defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap", + VGPR_32, i32, AMDGPUatomic_cmp_swap_global, + v2i32, VReg_64>; + +defm GLOBAL_ATOMIC_CMPSWAP_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap_x2", + VReg_64, i64, AMDGPUatomic_cmp_swap_global, + v2i64, VReg_128>; + +defm GLOBAL_ATOMIC_SWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_swap", + VGPR_32, i32, atomic_swap_global>; + +defm GLOBAL_ATOMIC_SWAP_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_swap_x2", + VReg_64, i64, atomic_swap_global>; + +defm GLOBAL_ATOMIC_ADD : FLAT_Global_Atomic_Pseudo <"global_atomic_add", + VGPR_32, i32, atomic_add_global>; + +defm GLOBAL_ATOMIC_SUB : FLAT_Global_Atomic_Pseudo <"global_atomic_sub", + VGPR_32, i32, atomic_sub_global>; + +defm GLOBAL_ATOMIC_SMIN : FLAT_Global_Atomic_Pseudo <"global_atomic_smin", + VGPR_32, i32, atomic_min_global>; + +defm GLOBAL_ATOMIC_UMIN : FLAT_Global_Atomic_Pseudo <"global_atomic_umin", + VGPR_32, i32, atomic_umin_global>; + +defm GLOBAL_ATOMIC_SMAX : FLAT_Global_Atomic_Pseudo <"global_atomic_smax", + VGPR_32, i32, atomic_max_global>; + +defm GLOBAL_ATOMIC_UMAX : FLAT_Global_Atomic_Pseudo <"global_atomic_umax", + VGPR_32, i32, atomic_umax_global>; + +defm GLOBAL_ATOMIC_AND : FLAT_Global_Atomic_Pseudo <"global_atomic_and", + VGPR_32, i32, atomic_and_global>; + +defm GLOBAL_ATOMIC_OR : FLAT_Global_Atomic_Pseudo <"global_atomic_or", + VGPR_32, i32, atomic_or_global>; + +defm GLOBAL_ATOMIC_XOR : FLAT_Global_Atomic_Pseudo <"global_atomic_xor", + VGPR_32, i32, atomic_xor_global>; + +defm GLOBAL_ATOMIC_INC : FLAT_Global_Atomic_Pseudo <"global_atomic_inc", + VGPR_32, i32, atomic_inc_global>; + +defm GLOBAL_ATOMIC_DEC : FLAT_Global_Atomic_Pseudo <"global_atomic_dec", + VGPR_32, i32, atomic_dec_global>; + +defm GLOBAL_ATOMIC_ADD_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_add_x2", + VReg_64, i64, atomic_add_global>; + +defm GLOBAL_ATOMIC_SUB_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_sub_x2", + VReg_64, i64, atomic_sub_global>; + +defm GLOBAL_ATOMIC_SMIN_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_smin_x2", + VReg_64, i64, atomic_min_global>; + +defm GLOBAL_ATOMIC_UMIN_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_umin_x2", + VReg_64, i64, atomic_umin_global>; + +defm GLOBAL_ATOMIC_SMAX_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_smax_x2", + VReg_64, i64, atomic_max_global>; + +defm GLOBAL_ATOMIC_UMAX_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_umax_x2", + VReg_64, i64, atomic_umax_global>; + +defm GLOBAL_ATOMIC_AND_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_and_x2", + VReg_64, i64, atomic_and_global>; + +defm GLOBAL_ATOMIC_OR_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_or_x2", + VReg_64, i64, atomic_or_global>; + +defm GLOBAL_ATOMIC_XOR_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_xor_x2", + VReg_64, i64, atomic_xor_global>; + +defm GLOBAL_ATOMIC_INC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_inc_x2", + VReg_64, i64, atomic_inc_global>; + +defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_dec_x2", + VReg_64, i64, atomic_dec_global>; +} // End is_flat_global = 1 + } // End SubtargetPredicate = HasFlatGlobalInsts @@ -617,6 +748,13 @@ def _RTN_vi : FLAT_Real_vi(ps.PseudoInstr # "_RTN")>; } +multiclass FLAT_Global_Real_Atomics_vi op> : + FLAT_Real_AllAddr_vi { + def _RTN_vi : FLAT_Real_vi (NAME#"_RTN")>; + def _SADDR_RTN_vi : FLAT_Real_vi (NAME#"_SADDR_RTN")>; +} + + defm FLAT_ATOMIC_SWAP : FLAT_Real_Atomics_vi <0x40, FLAT_ATOMIC_SWAP>; defm FLAT_ATOMIC_CMPSWAP : FLAT_Real_Atomics_vi <0x41, FLAT_ATOMIC_CMPSWAP>; defm FLAT_ATOMIC_ADD : FLAT_Real_Atomics_vi <0x42, FLAT_ATOMIC_ADD>; @@ -659,3 +797,30 @@ defm GLOBAL_STORE_DWORDX2 : FLAT_Real_AllAddr_vi <0x1d>; defm GLOBAL_STORE_DWORDX4 : FLAT_Real_AllAddr_vi <0x1f>; defm GLOBAL_STORE_DWORDX3 : FLAT_Real_AllAddr_vi <0x1e>; + +defm GLOBAL_ATOMIC_SWAP : FLAT_Global_Real_Atomics_vi <0x40>; +defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Real_Atomics_vi <0x41>; +defm GLOBAL_ATOMIC_ADD : FLAT_Global_Real_Atomics_vi <0x42>; +defm GLOBAL_ATOMIC_SUB : FLAT_Global_Real_Atomics_vi <0x43>; +defm GLOBAL_ATOMIC_SMIN : FLAT_Global_Real_Atomics_vi <0x44>; +defm GLOBAL_ATOMIC_UMIN : FLAT_Global_Real_Atomics_vi <0x45>; +defm GLOBAL_ATOMIC_SMAX : FLAT_Global_Real_Atomics_vi <0x46>; +defm GLOBAL_ATOMIC_UMAX : FLAT_Global_Real_Atomics_vi <0x47>; +defm GLOBAL_ATOMIC_AND : FLAT_Global_Real_Atomics_vi <0x48>; +defm GLOBAL_ATOMIC_OR : FLAT_Global_Real_Atomics_vi <0x49>; +defm GLOBAL_ATOMIC_XOR : FLAT_Global_Real_Atomics_vi <0x4a>; +defm GLOBAL_ATOMIC_INC : FLAT_Global_Real_Atomics_vi <0x4b>; +defm GLOBAL_ATOMIC_DEC : FLAT_Global_Real_Atomics_vi <0x4c>; +defm GLOBAL_ATOMIC_SWAP_X2 : FLAT_Global_Real_Atomics_vi <0x60>; +defm GLOBAL_ATOMIC_CMPSWAP_X2 : FLAT_Global_Real_Atomics_vi <0x61>; +defm GLOBAL_ATOMIC_ADD_X2 : FLAT_Global_Real_Atomics_vi <0x62>; +defm GLOBAL_ATOMIC_SUB_X2 : FLAT_Global_Real_Atomics_vi <0x63>; +defm GLOBAL_ATOMIC_SMIN_X2 : FLAT_Global_Real_Atomics_vi <0x64>; +defm GLOBAL_ATOMIC_UMIN_X2 : FLAT_Global_Real_Atomics_vi <0x65>; +defm GLOBAL_ATOMIC_SMAX_X2 : FLAT_Global_Real_Atomics_vi <0x66>; +defm GLOBAL_ATOMIC_UMAX_X2 : FLAT_Global_Real_Atomics_vi <0x67>; +defm GLOBAL_ATOMIC_AND_X2 : FLAT_Global_Real_Atomics_vi <0x68>; +defm GLOBAL_ATOMIC_OR_X2 : FLAT_Global_Real_Atomics_vi <0x69>; +defm GLOBAL_ATOMIC_XOR_X2 : FLAT_Global_Real_Atomics_vi <0x6a>; +defm GLOBAL_ATOMIC_INC_X2 : FLAT_Global_Real_Atomics_vi <0x6b>; +defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Real_Atomics_vi <0x6c>; Index: test/MC/AMDGPU/flat-global.s =================================================================== --- test/MC/AMDGPU/flat-global.s +++ test/MC/AMDGPU/flat-global.s @@ -33,6 +33,7 @@ global_load_dwordx4 v[1:4], v[3:4], off // GFX9: global_load_dwordx4 v[1:4], v[3:4], off ; encoding: [0x00,0x80,0x5c,0xdc,0x03,0x00,0x7f,0x01] // VI-ERR: instruction not supported on this GPU + // FIXME: VI error should be instruction nto supported global_load_dword v1, v[3:4], off offset:0 // GFX9: global_load_dword v1, v[3:4], off ; encoding: [0x00,0x80,0x50,0xdc,0x03,0x00,0x7f,0x01] @@ -122,3 +123,211 @@ global_load_dword v1, v[3:4], exec_hi // GFX9-ERR: :31: error: invalid operand for instruction // VI-ERR: :31: error: invalid operand for instruction + +global_atomic_cmpswap v[3:4], v[5:6], off +// GFX9: global_atomic_cmpswap v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x04,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: error: instruction not supported on this GPU + +global_atomic_cmpswap_x2 v[3:4], v[5:8], off +// GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off ; encoding: [0x00,0x80,0x84,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: error: instruction not supported on this GPU + +global_atomic_swap v[3:4], v5, off +// GFX9: global_atomic_swap v[3:4], v5, off ; encoding: [0x00,0x80,0x00,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: error: instruction not supported on this GPU + +global_atomic_swap_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_swap_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x80,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: error: instruction not supported on this GPU + +global_atomic_add v[3:4], v5, off +// GFX9: global_atomic_add v[3:4], v5, off ; encoding: [0x00,0x80,0x08,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_sub v[3:4], v5, off +// GFX9: global_atomic_sub v[3:4], v5, off ; encoding: [0x00,0x80,0x0c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_smin v[3:4], v5, off +// GFX9: global_atomic_smin v[3:4], v5, off ; encoding: [0x00,0x80,0x10,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_umin v[3:4], v5, off +// GFX9: global_atomic_umin v[3:4], v5, off ; encoding: [0x00,0x80,0x14,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_smax v[3:4], v5, off +// GFX9: global_atomic_smax v[3:4], v5, off ; encoding: [0x00,0x80,0x18,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_umax v[3:4], v5, off +// GFX9: global_atomic_umax v[3:4], v5, off ; encoding: [0x00,0x80,0x1c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_and v[3:4], v5, off +// GFX9: global_atomic_and v[3:4], v5, off ; encoding: [0x00,0x80,0x20,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_or v[3:4], v5, off +// GFX9: global_atomic_or v[3:4], v5, off ; encoding: [0x00,0x80,0x24,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_xor v[3:4], v5, off +// GFX9: global_atomic_xor v[3:4], v5, off ; encoding: [0x00,0x80,0x28,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_inc v[3:4], v5, off +// GFX9: global_atomic_inc v[3:4], v5, off ; encoding: [0x00,0x80,0x2c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_dec v[3:4], v5, off +// GFX9: global_atomic_dec v[3:4], v5, off ; encoding: [0x00,0x80,0x30,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_add_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_add_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x88,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_sub_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_sub_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x8c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_smin_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_smin_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x90,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_umin_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_umin_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x94,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_smax_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_smax_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x98,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_umax_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_umax_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x9c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_and_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_and_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xa0,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_or_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_or_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xa4,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_xor_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_xor_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xa8,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_inc_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_inc_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xac,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: instruction not supported on this GPU + +global_atomic_dec_x2 v[3:4], v[5:6], off +// GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xb0,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: error: instruction not supported on this GPU + +global_atomic_cmpswap v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_cmpswap v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x04,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :49: error: not a valid operand. + +global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16 +// GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16 ; encoding: [0xf0,0x9f,0x84,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :52: error: not a valid operand. + +global_atomic_swap v[3:4], v5, off offset:-16 +// GFX9: global_atomic_swap v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x00,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :42: error: not a valid operand + +global_atomic_swap_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_swap_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x80,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :49: error: not a valid operand + +global_atomic_add v[3:4], v5, off offset:-16 +// GFX9: global_atomic_add v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x08,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :41: error: not a valid operand + +global_atomic_sub v[3:4], v5, off offset:-16 +// GFX9: global_atomic_sub v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x0c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :41: error: not a valid operand + +global_atomic_smin v[3:4], v5, off offset:-16 +// GFX9: global_atomic_smin v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x10,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :42: error: not a valid operand + +global_atomic_umin v[3:4], v5, off offset:-16 +// GFX9: global_atomic_umin v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x14,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :42: error: not a valid operand + +global_atomic_smax v[3:4], v5, off offset:-16 +// GFX9: global_atomic_smax v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x18,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :42: error: not a valid operand + +global_atomic_umax v[3:4], v5, off offset:-16 +// GFX9: global_atomic_umax v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x1c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :42: error: not a valid operand + +global_atomic_and v[3:4], v5, off offset:-16 +// GFX9: global_atomic_and v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x20,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :41: error: not a valid operand + +global_atomic_or v[3:4], v5, off offset:-16 +// GFX9: global_atomic_or v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x24,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :40: error: not a valid operand + +global_atomic_xor v[3:4], v5, off offset:-16 +// GFX9: global_atomic_xor v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x28,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :41: error: not a valid operand + +global_atomic_inc v[3:4], v5, off offset:-16 +// GFX9: global_atomic_inc v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x2c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :41: error: not a valid operand + +global_atomic_dec v[3:4], v5, off offset:-16 +// GFX9: global_atomic_dec v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x30,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :41: error: not a valid operand + +global_atomic_add_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_add_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x88,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :48: error: not a valid operand + +global_atomic_sub_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_sub_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x8c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :48: error: not a valid operand + +global_atomic_smin_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_smin_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x90,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :49: error: not a valid operand + +global_atomic_umin_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_umin_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x94,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :49: error: not a valid operand + +global_atomic_smax_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_smax_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x98,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :49: error: not a valid operand + +global_atomic_umax_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_umax_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x9c,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :49: error: not a valid operand + +global_atomic_and_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_and_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa0,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :48: error: not a valid operand + +global_atomic_or_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_or_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa4,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :47: error: not a valid operand + +global_atomic_xor_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_xor_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa8,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :48: error: not a valid operand + +global_atomic_inc_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_inc_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xac,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :48: error: not a valid operand + +global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16 +// GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xb0,0xdd,0x03,0x05,0x7f,0x00] +// VI-ERR: :48: error: not a valid operand