Index: lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- lib/Target/ARM/ARMISelLowering.cpp
+++ lib/Target/ARM/ARMISelLowering.cpp
@@ -1617,6 +1617,8 @@
   case CallingConv::ARM_AAPCS:
     return (Return ? RetCC_ARM_AAPCS : CC_ARM_AAPCS);
   case CallingConv::ARM_AAPCS_VFP:
+    if (getSubtarget()->isThumb1Only() || !getSubtarget()->hasVFP2())
+      report_fatal_error("The aapcs_vfp calling convention is not supported on this target.");
     return (Return ? RetCC_ARM_AAPCS_VFP : CC_ARM_AAPCS_VFP);
   case CallingConv::Fast:
     return (Return ? RetFastCC_ARM_APCS : FastCC_ARM_APCS);
Index: test/CodeGen/ARM/aapcs-vfp-call-float-arg.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/aapcs-vfp-call-float-arg.ll
@@ -0,0 +1,13 @@
+; RUN: not llc -mtriple=armv4--linux-gnueabi -mattr=-vfp2 %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=-vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=+vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: llc -mtriple=armv4--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+; RUN: llc -mtriple=thumbv7--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+
+define arm_aapcscc void @g() {
+; CHECK: LLVM ERROR: The aapcs_vfp calling convention is not supported on this target.
+  call arm_aapcs_vfpcc void @f(float 1.0)
+  ret void
+}
+
+declare arm_aapcs_vfpcc void @f(float)
Index: test/CodeGen/ARM/aapcs-vfp-call-float-result.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/aapcs-vfp-call-float-result.ll
@@ -0,0 +1,13 @@
+; RUN: not llc -mtriple=armv4--linux-gnueabi -mattr=-vfp2 %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=-vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=+vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: llc -mtriple=armv4--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+; RUN: llc -mtriple=thumbv7--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+
+define arm_aapcscc float @g() {
+; CHECK: LLVM ERROR: The aapcs_vfp calling convention is not supported on this target.
+  %call = call arm_aapcs_vfpcc float @f()
+  ret float %call
+}
+
+declare arm_aapcs_vfpcc float @f()
Index: test/CodeGen/ARM/aapcs-vfp-def-float-arg.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/aapcs-vfp-def-float-arg.ll
@@ -0,0 +1,12 @@
+; RUN: not llc -mtriple=armv4--linux-gnueabi -mattr=-vfp2 %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=-vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=+vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: llc -mtriple=armv4--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+; RUN: llc -mtriple=thumbv7--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+
+define arm_aapcs_vfpcc void @f(float %x) #0 {
+; CHECK: LLVM ERROR: The aapcs_vfp calling convention is not supported on this target.
+  %x.addr = alloca float, align 4
+  store float %x, float* %x.addr, align 4
+  ret void
+}
Index: test/CodeGen/ARM/aapcs-vfp-def-float-result.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/aapcs-vfp-def-float-result.ll
@@ -0,0 +1,10 @@
+; RUN: not llc -mtriple=armv4--linux-gnueabi -mattr=-vfp2 %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=-vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=thumbv4--linux-gnueabi -mattr=+vfp2,-neon %s -o - 2>&1 | FileCheck %s
+; RUN: llc -mtriple=armv4--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+; RUN: llc -mtriple=thumbv7--linux-gnueabi -mattr=+vfp2 %s -o - 2>&1 | not FileCheck %s
+
+define arm_aapcs_vfpcc float @f() {
+; CHECK: LLVM ERROR: The aapcs_vfp calling convention is not supported on this target.
+  ret float 1.0
+}
Index: test/CodeGen/ARM/arm-eabi.ll
===================================================================
--- test/CodeGen/ARM/arm-eabi.ll
+++ test/CodeGen/ARM/arm-eabi.ll
@@ -1,31 +1,31 @@
 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp2 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp2 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp2 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp2 -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp2 -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp2 -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp2 -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp2 -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp2 -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp2 -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp2 -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp2 -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 
 %struct.my_s = type { [18 x i32] }
 
Index: test/CodeGen/ARM/fold-stack-adjust-2.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/fold-stack-adjust-2.ll
@@ -0,0 +1,29 @@
+; Disable shrink-wrapping on the first test otherwise we wouldn't
+; exerce the path for PR18136.
+; RUN: llc -mtriple=thumbv7-apple-none-macho < %s -enable-shrink-wrap=false | FileCheck %s
+
+
+declare void @bar(i8*)
+
+%bigVec = type [2 x double]
+
+@var = global %bigVec zeroinitializer
+
+define arm_aapcs_vfpcc double @check_vfp_no_return_clobber() minsize {
+; CHECK-LABEL: check_vfp_no_return_clobber:
+; CHECK: push {r[[GLOBREG:[0-9]+]], lr}
+; CHECK: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8, d9}
+; CHECK-NOT: sub sp,
+; ...
+; CHECK: add sp, #64
+; CHECK: vpop {d8, d9}
+; CHECK: pop {r[[GLOBREG]], pc}
+
+  %var = alloca i8, i32 64
+
+  %tmp = load %bigVec, %bigVec* @var
+  call void @bar(i8* %var)
+  store %bigVec %tmp, %bigVec* @var
+
+  ret double 1.0
+}
Index: test/CodeGen/ARM/fold-stack-adjust.ll
===================================================================
--- test/CodeGen/ARM/fold-stack-adjust.ll
+++ test/CodeGen/ARM/fold-stack-adjust.ll
@@ -107,25 +107,6 @@
   ret i64 0
 }
 
-define arm_aapcs_vfpcc double @check_vfp_no_return_clobber() minsize {
-; CHECK-LABEL: check_vfp_no_return_clobber:
-; CHECK: push {r[[GLOBREG:[0-9]+]], lr}
-; CHECK: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8, d9}
-; CHECK-NOT: sub sp,
-; ...
-; CHECK: add sp, #64
-; CHECK: vpop {d8, d9}
-; CHECK: pop {r[[GLOBREG]], pc}
-
-  %var = alloca i8, i32 64
-
-  %tmp = load %bigVec, %bigVec* @var
-  call void @bar(i8* %var)
-  store %bigVec %tmp, %bigVec* @var
-
-  ret double 1.0
-}
-
 @dbl = global double 0.0
 
 ; PR18136: there was a bug determining where the first eligible pop in a
Index: test/CodeGen/ARM/fp16-promote.ll
===================================================================
--- test/CodeGen/ARM/fp16-promote.ll
+++ test/CodeGen/ARM/fp16-promote.ll
@@ -1,9 +1,8 @@
-; RUN: llc -asm-verbose=false < %s -mattr=+vfp3,+fp16 | FileCheck %s -check-prefix=CHECK-FP16  --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
-; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL --check-prefix=CHECK-LIBCALL-VFP
-; RUN: llc -asm-verbose=false < %s -mattr=-vfp2 | FileCheck %s --check-prefix=CHECK-LIBCALL -check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
+; RUN: llc -asm-verbose=false < %s -mtriple=armv7---eabihf -mattr=+vfp3,+fp16 | FileCheck %s -check-prefix=CHECK-FP16  --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
+; RUN: llc -asm-verbose=false < %s -mtriple=armv7---eabihf | FileCheck %s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL --check-prefix=CHECK-LIBCALL-VFP
+; RUN: llc -asm-verbose=false < %s -mattr=-vfp2 -mtriple=armv7---eabi | FileCheck %s --check-prefix=CHECK-LIBCALL -check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
-target triple = "armv7---eabihf"
 
 ; CHECK-ALL-LABEL: test_fadd:
 ; CHECK-FP16: vcvtb.f32.f16
Index: test/CodeGen/ARM/memfunc.ll
===================================================================
--- test/CodeGen/ARM/memfunc.ll
+++ test/CodeGen/ARM/memfunc.ll
@@ -1,12 +1,12 @@
 ; RUN: llc < %s -mtriple=armv7-apple-ios -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-IOS --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=thumbv7m-none-macho -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-DARWIN --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp2 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp2 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp2 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
 
 define void @f1(i8* %dest, i8* %src) "no-frame-pointer-elim"="true" {
 entry: