Index: lib/Target/AArch64/AArch64CondBrTuning.cpp
===================================================================
--- lib/Target/AArch64/AArch64CondBrTuning.cpp
+++ lib/Target/AArch64/AArch64CondBrTuning.cpp
@@ -129,11 +129,11 @@
     break;
   case AArch64::TBZW:
   case AArch64::TBZX:
-    CC = AArch64CC::GE;
+    CC = AArch64CC::PL;
     break;
   case AArch64::TBNZW:
   case AArch64::TBNZX:
-    CC = AArch64CC::LT;
+    CC = AArch64CC::MI;
     break;
   }
   return BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(AArch64::Bcc))
Index: test/CodeGen/AArch64/cond-br-tuning.ll
===================================================================
--- test/CodeGen/AArch64/cond-br-tuning.ll
+++ test/CodeGen/AArch64/cond-br-tuning.ll
@@ -83,7 +83,7 @@
 
 ; CHECK-LABEL: test_add_tbz:
 ; CHECK: adds
-; CHECK: b.ge
+; CHECK: b.pl
 ; CHECK: ret
 define void @test_add_tbz(i32 %a, i32 %b, i32* %ptr) {
 entry:
@@ -99,7 +99,7 @@
 
 ; CHECK-LABEL: test_subs_tbz:
 ; CHECK: subs
-; CHECK: b.ge
+; CHECK: b.pl
 ; CHECK: ret
 define void @test_subs_tbz(i32 %a, i32 %b, i32* %ptr) {
 entry:
@@ -115,7 +115,7 @@
 
 ; CHECK-LABEL: test_add_tbnz
 ; CHECK: adds
-; CHECK: b.lt
+; CHECK: b.mi
 ; CHECK: ret
 define void @test_add_tbnz(i32 %a, i32 %b, i32* %ptr) {
 entry:
@@ -131,7 +131,7 @@
 
 ; CHECK-LABEL: test_subs_tbnz
 ; CHECK: subs
-; CHECK: b.lt
+; CHECK: b.mi
 ; CHECK: ret
 define void @test_subs_tbnz(i32 %a, i32 %b, i32* %ptr) {
 entry: