Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -419,6 +419,11 @@
     setOperationAction(ISD::SELECT, VT, Custom);
     setOperationAction(ISD::SETCC,  VT, Custom);
   }
+
+  // Custom action for SELECT MMX and expand action for SELECT_CC MMX
+  setOperationAction(ISD::SELECT          , MVT::x86mmx   , Custom);
+  setOperationAction(ISD::SELECT_CC       , MVT::x86mmx   , Expand);
+
   setOperationAction(ISD::EH_RETURN       , MVT::Other, Custom);
   // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intended to support
   // SjLj exception handling but a light-weight setjmp/longjmp replacement to
@@ -17599,6 +17604,14 @@
     return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, newSelect, zeroConst);
   }
 
+  // Custom action for SELECT MMX
+  if (VT == MVT::x86mmx) {
+    Op1 = DAG.getBitcast(MVT::i64, Op1);
+    Op2 = DAG.getBitcast(MVT::i64, Op2);
+    SDValue newSelect = DAG.getNode(ISD::SELECT, DL, MVT::i64, Cond, Op1, Op2);
+    return DAG.getBitcast(VT, newSelect);
+  }
+
   if (Cond.getOpcode() == ISD::SETCC) {
     if (SDValue NewCond = LowerSETCC(Cond, DAG)) {
       Cond = NewCond;
Index: test/CodeGen/X86/pr30418.ll
===================================================================
--- test/CodeGen/X86/pr30418.ll
+++ test/CodeGen/X86/pr30418.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=x86_64-unknown-unknown < %s
+
+; No check in a crash test
+
+define i64 @test47(i64) local_unnamed_addr #1 {
+  %2 = icmp eq i64 %0, 0
+  %. = select i1 %2, x86_mmx bitcast (i64 7 to x86_mmx), x86_mmx bitcast (i64 0 to x86_mmx)
+  %3 = tail call x86_mmx @llvm.x86.mmx.psll.w(x86_mmx %., x86_mmx %.) #3
+  %4 = bitcast x86_mmx %3 to i64
+  ret i64 %4
+}
+
+declare x86_mmx @llvm.x86.mmx.psll.w(x86_mmx, x86_mmx) #2
+