Index: llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp +++ llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp @@ -56,7 +56,7 @@ const LLT s32 = LLT::scalar(32); const LLT s64 = LLT::scalar(64); - for (unsigned BinOp : {G_ADD, G_SUB, G_MUL}) + for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) for (auto Ty : {s8, s16, s32}) setAction({BinOp, Ty}, Legal); @@ -117,7 +117,7 @@ const LLT s32 = LLT::scalar(32); const LLT s64 = LLT::scalar(64); - for (unsigned BinOp : {G_ADD, G_SUB, G_MUL}) + for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) for (auto Ty : {s8, s16, s32, s64}) setAction({BinOp, Ty}, Legal); Index: llvm/trunk/test/CodeGen/X86/GlobalISel/and-scalar.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/and-scalar.ll +++ llvm/trunk/test/CodeGen/X86/GlobalISel/and-scalar.ll @@ -0,0 +1,43 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL + +define i8 @test_and_i8(i8 %arg1, i8 %arg2) { +; ALL-LABEL: test_and_i8: +; ALL: # BB#0: +; ALL-NEXT: andb %dil, %sil +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = and i8 %arg1, %arg2 + ret i8 %ret +} + +define i16 @test_and_i16(i16 %arg1, i16 %arg2) { +; ALL-LABEL: test_and_i16: +; ALL: # BB#0: +; ALL-NEXT: andw %di, %si +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = and i16 %arg1, %arg2 + ret i16 %ret +} + +define i32 @test_and_i32(i32 %arg1, i32 %arg2) { +; ALL-LABEL: test_and_i32: +; ALL: # BB#0: +; ALL-NEXT: andl %edi, %esi +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = and i32 %arg1, %arg2 + ret i32 %ret +} + +define i64 @test_and_i64(i64 %arg1, i64 %arg2) { +; ALL-LABEL: test_and_i64: +; ALL: # BB#0: +; ALL-NEXT: andq %rdi, %rsi +; ALL-NEXT: movq %rsi, %rax +; ALL-NEXT: retq + %ret = and i64 %arg1, %arg2 + ret i64 %ret +} + Index: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir @@ -0,0 +1,124 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s + +--- | + define i8 @test_and_i8() { + %ret = and i8 undef, undef + ret i8 %ret + } + + define i16 @test_and_i16() { + %ret = and i16 undef, undef + ret i16 %ret + } + + define i32 @test_and_i32() { + %ret = and i32 undef, undef + ret i32 %ret + } + + define i64 @test_and_i64() { + %ret = and i64 undef, undef + ret i64 %ret + } + +... +--- +name: test_and_i8 +# CHECK-LABEL: name: test_and_i8 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s8) = IMPLICIT_DEF +# CHECK-NEXT: %1(s8) = G_AND %0, %0 +# CHECK-NEXT: %al = COPY %1(s8) +# CHECK-NEXT: RET 0, implicit %al +body: | + bb.1 (%ir-block.0): + %0(s8) = IMPLICIT_DEF + %1(s8) = G_AND %0, %0 + %al = COPY %1(s8) + RET 0, implicit %al + +... +--- +name: test_and_i16 +# CHECK-LABEL: name: test_and_i16 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s16) = IMPLICIT_DEF +# CHECK-NEXT: %1(s16) = G_AND %0, %0 +# CHECK-NEXT: %ax = COPY %1(s16) +# CHECK-NEXT: RET 0, implicit %ax +body: | + bb.1 (%ir-block.0): + %0(s16) = IMPLICIT_DEF + %1(s16) = G_AND %0, %0 + %ax = COPY %1(s16) + RET 0, implicit %ax + +... +--- +name: test_and_i32 +# CHECK-LABEL: name: test_and_i32 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s32) = IMPLICIT_DEF +# CHECK-NEXT: %1(s32) = G_AND %0, %0 +# CHECK-NEXT: %eax = COPY %1(s32) +# CHECK-NEXT: RET 0, implicit %eax +body: | + bb.1 (%ir-block.0): + %0(s32) = IMPLICIT_DEF + %1(s32) = G_AND %0, %0 + %eax = COPY %1(s32) + RET 0, implicit %eax + +... +--- +name: test_and_i64 +# CHECK-LABEL: name: test_and_i64 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s64) = IMPLICIT_DEF +# CHECK-NEXT: %1(s64) = G_AND %0, %0 +# CHECK-NEXT: %rax = COPY %1(s64) +# CHECK-NEXT: RET 0, implicit %rax +body: | + bb.1 (%ir-block.0): + %0(s64) = IMPLICIT_DEF + %1(s64) = G_AND %0, %0 + %rax = COPY %1(s64) + RET 0, implicit %rax + +... Index: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir @@ -0,0 +1,124 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s + +--- | + define i8 @test_or_i8() { + %ret = or i8 undef, undef + ret i8 %ret + } + + define i16 @test_or_i16() { + %ret = or i16 undef, undef + ret i16 %ret + } + + define i32 @test_or_i32() { + %ret = or i32 undef, undef + ret i32 %ret + } + + define i64 @test_or_i64() { + %ret = or i64 undef, undef + ret i64 %ret + } + +... +--- +name: test_or_i8 +# CHECK-LABEL: name: test_or_i8 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s8) = IMPLICIT_DEF +# CHECK-NEXT: %1(s8) = G_OR %0, %0 +# CHECK-NEXT: %al = COPY %1(s8) +# CHECK-NEXT: RET 0, implicit %al +body: | + bb.1 (%ir-block.0): + %0(s8) = IMPLICIT_DEF + %1(s8) = G_OR %0, %0 + %al = COPY %1(s8) + RET 0, implicit %al + +... +--- +name: test_or_i16 +# CHECK-LABEL: name: test_or_i16 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s16) = IMPLICIT_DEF +# CHECK-NEXT: %1(s16) = G_OR %0, %0 +# CHECK-NEXT: %ax = COPY %1(s16) +# CHECK-NEXT: RET 0, implicit %ax +body: | + bb.1 (%ir-block.0): + %0(s16) = IMPLICIT_DEF + %1(s16) = G_OR %0, %0 + %ax = COPY %1(s16) + RET 0, implicit %ax + +... +--- +name: test_or_i32 +# CHECK-LABEL: name: test_or_i32 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s32) = IMPLICIT_DEF +# CHECK-NEXT: %1(s32) = G_OR %0, %0 +# CHECK-NEXT: %eax = COPY %1(s32) +# CHECK-NEXT: RET 0, implicit %eax +body: | + bb.1 (%ir-block.0): + %0(s32) = IMPLICIT_DEF + %1(s32) = G_OR %0, %0 + %eax = COPY %1(s32) + RET 0, implicit %eax + +... +--- +name: test_or_i64 +# CHECK-LABEL: name: test_or_i64 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s64) = IMPLICIT_DEF +# CHECK-NEXT: %1(s64) = G_OR %0, %0 +# CHECK-NEXT: %rax = COPY %1(s64) +# CHECK-NEXT: RET 0, implicit %rax +body: | + bb.1 (%ir-block.0): + %0(s64) = IMPLICIT_DEF + %1(s64) = G_OR %0, %0 + %rax = COPY %1(s64) + RET 0, implicit %rax + +... Index: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir @@ -0,0 +1,124 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s + +--- | + define i8 @test_xor_i8() { + %ret = xor i8 undef, undef + ret i8 %ret + } + + define i16 @test_xor_i16() { + %ret = xor i16 undef, undef + ret i16 %ret + } + + define i32 @test_xor_i32() { + %ret = xor i32 undef, undef + ret i32 %ret + } + + define i64 @test_xor_i64() { + %ret = xor i64 undef, undef + ret i64 %ret + } + +... +--- +name: test_xor_i8 +# CHECK-LABEL: name: test_xor_i8 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s8) = IMPLICIT_DEF +# CHECK-NEXT: %1(s8) = G_XOR %0, %0 +# CHECK-NEXT: %al = COPY %1(s8) +# CHECK-NEXT: RET 0, implicit %al +body: | + bb.1 (%ir-block.0): + %0(s8) = IMPLICIT_DEF + %1(s8) = G_XOR %0, %0 + %al = COPY %1(s8) + RET 0, implicit %al + +... +--- +name: test_xor_i16 +# CHECK-LABEL: name: test_xor_i16 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s16) = IMPLICIT_DEF +# CHECK-NEXT: %1(s16) = G_XOR %0, %0 +# CHECK-NEXT: %ax = COPY %1(s16) +# CHECK-NEXT: RET 0, implicit %ax +body: | + bb.1 (%ir-block.0): + %0(s16) = IMPLICIT_DEF + %1(s16) = G_XOR %0, %0 + %ax = COPY %1(s16) + RET 0, implicit %ax + +... +--- +name: test_xor_i32 +# CHECK-LABEL: name: test_xor_i32 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s32) = IMPLICIT_DEF +# CHECK-NEXT: %1(s32) = G_XOR %0, %0 +# CHECK-NEXT: %eax = COPY %1(s32) +# CHECK-NEXT: RET 0, implicit %eax +body: | + bb.1 (%ir-block.0): + %0(s32) = IMPLICIT_DEF + %1(s32) = G_XOR %0, %0 + %eax = COPY %1(s32) + RET 0, implicit %eax + +... +--- +name: test_xor_i64 +# CHECK-LABEL: name: test_xor_i64 +alignment: 4 +legalized: false +regBankSelected: false +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# CHECK: %0(s64) = IMPLICIT_DEF +# CHECK-NEXT: %1(s64) = G_XOR %0, %0 +# CHECK-NEXT: %rax = COPY %1(s64) +# CHECK-NEXT: RET 0, implicit %rax +body: | + bb.1 (%ir-block.0): + %0(s64) = IMPLICIT_DEF + %1(s64) = G_XOR %0, %0 + %rax = COPY %1(s64) + RET 0, implicit %rax + +... Index: llvm/trunk/test/CodeGen/X86/GlobalISel/or-scalar.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/or-scalar.ll +++ llvm/trunk/test/CodeGen/X86/GlobalISel/or-scalar.ll @@ -0,0 +1,43 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL + +define i8 @test_or_i8(i8 %arg1, i8 %arg2) { +; ALL-LABEL: test_or_i8: +; ALL: # BB#0: +; ALL-NEXT: orb %dil, %sil +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = or i8 %arg1, %arg2 + ret i8 %ret +} + +define i16 @test_or_i16(i16 %arg1, i16 %arg2) { +; ALL-LABEL: test_or_i16: +; ALL: # BB#0: +; ALL-NEXT: orw %di, %si +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = or i16 %arg1, %arg2 + ret i16 %ret +} + +define i32 @test_or_i32(i32 %arg1, i32 %arg2) { +; ALL-LABEL: test_or_i32: +; ALL: # BB#0: +; ALL-NEXT: orl %edi, %esi +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = or i32 %arg1, %arg2 + ret i32 %ret +} + +define i64 @test_or_i64(i64 %arg1, i64 %arg2) { +; ALL-LABEL: test_or_i64: +; ALL: # BB#0: +; ALL-NEXT: orq %rdi, %rsi +; ALL-NEXT: movq %rsi, %rax +; ALL-NEXT: retq + %ret = or i64 %arg1, %arg2 + ret i64 %ret +} + Index: llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir @@ -154,6 +154,26 @@ ret i1 %r } + define i8 @test_xor_i8() { + %ret = xor i8 undef, undef + ret i8 %ret + } + + define i16 @test_or_i16() { + %ret = or i16 undef, undef + ret i16 %ret + } + + define i32 @test_and_i32() { + %ret = and i32 undef, undef + ret i32 %ret + } + + define i64 @test_and_i64() { + %ret = and i64 undef, undef + ret i64 %ret + } + ... --- name: test_add_i8 @@ -968,3 +988,100 @@ RET 0, implicit %al ... +--- +name: test_xor_i8 +# CHECK-LABEL: name: test_xor_i8 +alignment: 4 +legalized: true +regBankSelected: false +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' } +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +body: | + bb.1 (%ir-block.0): + %0(s8) = IMPLICIT_DEF + %1(s8) = G_XOR %0, %0 + %al = COPY %1(s8) + RET 0, implicit %al + +... +--- +name: test_or_i16 +# CHECK-LABEL: name: test_or_i16 +alignment: 4 +legalized: true +regBankSelected: false +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' } +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +body: | + bb.1 (%ir-block.0): + %0(s16) = IMPLICIT_DEF + %1(s16) = G_OR %0, %0 + %ax = COPY %1(s16) + RET 0, implicit %ax + +... +--- +name: test_and_i32 +# CHECK-LABEL: name: test_and_i32 +alignment: 4 +legalized: true +regBankSelected: false +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' } +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +body: | + bb.1 (%ir-block.0): + %0(s32) = IMPLICIT_DEF + %1(s32) = G_AND %0, %0 + %eax = COPY %1(s32) + RET 0, implicit %eax + +... +--- +name: test_and_i64 +# CHECK-LABEL: name: test_and_i64 +alignment: 4 +legalized: true +regBankSelected: false +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' } +registers: + - { id: 0, class: _, preferred-register: '' } + - { id: 1, class: _, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +body: | + bb.1 (%ir-block.0): + %0(s64) = IMPLICIT_DEF + %1(s64) = G_AND %0, %0 + %rax = COPY %1(s64) + RET 0, implicit %rax + +... + Index: llvm/trunk/test/CodeGen/X86/GlobalISel/select-and-scalar.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/select-and-scalar.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-and-scalar.mir @@ -0,0 +1,160 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL + +--- | + define i8 @test_and_i8(i8 %arg1, i8 %arg2) { + %ret = and i8 %arg1, %arg2 + ret i8 %ret + } + + define i16 @test_and_i16(i16 %arg1, i16 %arg2) { + %ret = and i16 %arg1, %arg2 + ret i16 %ret + } + + define i32 @test_and_i32(i32 %arg1, i32 %arg2) { + %ret = and i32 %arg1, %arg2 + ret i32 %ret + } + + define i64 @test_and_i64(i64 %arg1, i64 %arg2) { + %ret = and i64 %arg1, %arg2 + ret i64 %ret + } + +... +--- +name: test_and_i8 +# ALL-LABEL: name: test_and_i8 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr8, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr8, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %dil +# ALL-NEXT: %1 = COPY %sil +# ALL-NEXT: %2 = AND8rr %0, %1, implicit-def %eflags +# ALL-NEXT: %al = COPY %2 +# ALL-NEXT: RET 0, implicit %al +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s8) = COPY %edi + %1(s8) = COPY %esi + %2(s8) = G_AND %0, %1 + %al = COPY %2(s8) + RET 0, implicit %al + +... +--- +name: test_and_i16 +# ALL-LABEL: name: test_and_i16 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr16, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %di +# ALL-NEXT: %1 = COPY %si +# ALL-NEXT: %2 = AND16rr %0, %1, implicit-def %eflags +# ALL-NEXT: %ax = COPY %2 +# ALL-NEXT: RET 0, implicit %ax +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s16) = COPY %edi + %1(s16) = COPY %esi + %2(s16) = G_AND %0, %1 + %ax = COPY %2(s16) + RET 0, implicit %ax + +... +--- +name: test_and_i32 +# ALL-LABEL: name: test_and_i32 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %edi +# ALL-NEXT: %1 = COPY %esi +# ALL-NEXT: %2 = AND32rr %0, %1, implicit-def %eflags +# ALL-NEXT: %eax = COPY %2 +# ALL-NEXT: RET 0, implicit %eax +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s32) = COPY %edi + %1(s32) = COPY %esi + %2(s32) = G_AND %0, %1 + %eax = COPY %2(s32) + RET 0, implicit %eax + +... +--- +name: test_and_i64 +# ALL-LABEL: name: test_and_i64 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr64, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %rdi +# ALL-NEXT: %1 = COPY %rsi +# ALL-NEXT: %2 = AND64rr %0, %1, implicit-def %eflags +# ALL-NEXT: %rax = COPY %2 +# ALL-NEXT: RET 0, implicit %rax +body: | + bb.1 (%ir-block.0): + liveins: %rdi, %rsi + + %0(s64) = COPY %rdi + %1(s64) = COPY %rsi + %2(s64) = G_AND %0, %1 + %rax = COPY %2(s64) + RET 0, implicit %rax + +... Index: llvm/trunk/test/CodeGen/X86/GlobalISel/select-or-scalar.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/select-or-scalar.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-or-scalar.mir @@ -0,0 +1,160 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL + +--- | + define i8 @test_or_i8(i8 %arg1, i8 %arg2) { + %ret = or i8 %arg1, %arg2 + ret i8 %ret + } + + define i16 @test_or_i16(i16 %arg1, i16 %arg2) { + %ret = or i16 %arg1, %arg2 + ret i16 %ret + } + + define i32 @test_or_i32(i32 %arg1, i32 %arg2) { + %ret = or i32 %arg1, %arg2 + ret i32 %ret + } + + define i64 @test_or_i64(i64 %arg1, i64 %arg2) { + %ret = or i64 %arg1, %arg2 + ret i64 %ret + } + +... +--- +name: test_or_i8 +# ALL-LABEL: name: test_or_i8 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr8, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr8, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %dil +# ALL-NEXT: %1 = COPY %sil +# ALL-NEXT: %2 = OR8rr %0, %1, implicit-def %eflags +# ALL-NEXT: %al = COPY %2 +# ALL-NEXT: RET 0, implicit %al +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s8) = COPY %edi + %1(s8) = COPY %esi + %2(s8) = G_OR %0, %1 + %al = COPY %2(s8) + RET 0, implicit %al + +... +--- +name: test_or_i16 +# ALL-LABEL: name: test_or_i16 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr16, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %di +# ALL-NEXT: %1 = COPY %si +# ALL-NEXT: %2 = OR16rr %0, %1, implicit-def %eflags +# ALL-NEXT: %ax = COPY %2 +# ALL-NEXT: RET 0, implicit %ax +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s16) = COPY %edi + %1(s16) = COPY %esi + %2(s16) = G_OR %0, %1 + %ax = COPY %2(s16) + RET 0, implicit %ax + +... +--- +name: test_or_i32 +# ALL-LABEL: name: test_or_i32 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %edi +# ALL-NEXT: %1 = COPY %esi +# ALL-NEXT: %2 = OR32rr %0, %1, implicit-def %eflags +# ALL-NEXT: %eax = COPY %2 +# ALL-NEXT: RET 0, implicit %eax +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s32) = COPY %edi + %1(s32) = COPY %esi + %2(s32) = G_OR %0, %1 + %eax = COPY %2(s32) + RET 0, implicit %eax + +... +--- +name: test_or_i64 +# ALL-LABEL: name: test_or_i64 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr64, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %rdi +# ALL-NEXT: %1 = COPY %rsi +# ALL-NEXT: %2 = OR64rr %0, %1, implicit-def %eflags +# ALL-NEXT: %rax = COPY %2 +# ALL-NEXT: RET 0, implicit %rax +body: | + bb.1 (%ir-block.0): + liveins: %rdi, %rsi + + %0(s64) = COPY %rdi + %1(s64) = COPY %rsi + %2(s64) = G_OR %0, %1 + %rax = COPY %2(s64) + RET 0, implicit %rax + +... Index: llvm/trunk/test/CodeGen/X86/GlobalISel/select-xor-scalar.mir =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/select-xor-scalar.mir +++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-xor-scalar.mir @@ -0,0 +1,160 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL + +--- | + define i8 @test_xor_i8(i8 %arg1, i8 %arg2) { + %ret = xor i8 %arg1, %arg2 + ret i8 %ret + } + + define i16 @test_xor_i16(i16 %arg1, i16 %arg2) { + %ret = xor i16 %arg1, %arg2 + ret i16 %ret + } + + define i32 @test_xor_i32(i32 %arg1, i32 %arg2) { + %ret = xor i32 %arg1, %arg2 + ret i32 %ret + } + + define i64 @test_xor_i64(i64 %arg1, i64 %arg2) { + %ret = xor i64 %arg1, %arg2 + ret i64 %ret + } + +... +--- +name: test_xor_i8 +# ALL-LABEL: name: test_xor_i8 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr8, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr8, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %dil +# ALL-NEXT: %1 = COPY %sil +# ALL-NEXT: %2 = XOR8rr %0, %1, implicit-def %eflags +# ALL-NEXT: %al = COPY %2 +# ALL-NEXT: RET 0, implicit %al +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s8) = COPY %edi + %1(s8) = COPY %esi + %2(s8) = G_XOR %0, %1 + %al = COPY %2(s8) + RET 0, implicit %al + +... +--- +name: test_xor_i16 +# ALL-LABEL: name: test_xor_i16 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr16, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %di +# ALL-NEXT: %1 = COPY %si +# ALL-NEXT: %2 = XOR16rr %0, %1, implicit-def %eflags +# ALL-NEXT: %ax = COPY %2 +# ALL-NEXT: RET 0, implicit %ax +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s16) = COPY %edi + %1(s16) = COPY %esi + %2(s16) = G_XOR %0, %1 + %ax = COPY %2(s16) + RET 0, implicit %ax + +... +--- +name: test_xor_i32 +# ALL-LABEL: name: test_xor_i32 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %edi +# ALL-NEXT: %1 = COPY %esi +# ALL-NEXT: %2 = XOR32rr %0, %1, implicit-def %eflags +# ALL-NEXT: %eax = COPY %2 +# ALL-NEXT: RET 0, implicit %eax +body: | + bb.1 (%ir-block.0): + liveins: %edi, %esi + + %0(s32) = COPY %edi + %1(s32) = COPY %esi + %2(s32) = G_XOR %0, %1 + %eax = COPY %2(s32) + RET 0, implicit %eax + +... +--- +name: test_xor_i64 +# ALL-LABEL: name: test_xor_i64 +alignment: 4 +legalized: true +regBankSelected: true +# ALL: registers: +# ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' } +# ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' } +# ALL-NEXT: - { id: 2, class: gr64, preferred-register: '' } +registers: + - { id: 0, class: gpr, preferred-register: '' } + - { id: 1, class: gpr, preferred-register: '' } + - { id: 2, class: gpr, preferred-register: '' } +liveins: +fixedStack: +stack: +constants: +# ALL: %0 = COPY %rdi +# ALL-NEXT: %1 = COPY %rsi +# ALL-NEXT: %2 = XOR64rr %0, %1, implicit-def %eflags +# ALL-NEXT: %rax = COPY %2 +# ALL-NEXT: RET 0, implicit %rax +body: | + bb.1 (%ir-block.0): + liveins: %rdi, %rsi + + %0(s64) = COPY %rdi + %1(s64) = COPY %rsi + %2(s64) = G_XOR %0, %1 + %rax = COPY %2(s64) + RET 0, implicit %rax + +... Index: llvm/trunk/test/CodeGen/X86/GlobalISel/xor-scalar.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/GlobalISel/xor-scalar.ll +++ llvm/trunk/test/CodeGen/X86/GlobalISel/xor-scalar.ll @@ -0,0 +1,43 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL + +define i8 @test_xor_i8(i8 %arg1, i8 %arg2) { +; ALL-LABEL: test_xor_i8: +; ALL: # BB#0: +; ALL-NEXT: xorb %dil, %sil +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = xor i8 %arg1, %arg2 + ret i8 %ret +} + +define i16 @test_xor_i16(i16 %arg1, i16 %arg2) { +; ALL-LABEL: test_xor_i16: +; ALL: # BB#0: +; ALL-NEXT: xorw %di, %si +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = xor i16 %arg1, %arg2 + ret i16 %ret +} + +define i32 @test_xor_i32(i32 %arg1, i32 %arg2) { +; ALL-LABEL: test_xor_i32: +; ALL: # BB#0: +; ALL-NEXT: xorl %edi, %esi +; ALL-NEXT: movl %esi, %eax +; ALL-NEXT: retq + %ret = xor i32 %arg1, %arg2 + ret i32 %ret +} + +define i64 @test_xor_i64(i64 %arg1, i64 %arg2) { +; ALL-LABEL: test_xor_i64: +; ALL: # BB#0: +; ALL-NEXT: xorq %rdi, %rsi +; ALL-NEXT: movq %rsi, %rax +; ALL-NEXT: retq + %ret = xor i64 %arg1, %arg2 + ret i64 %ret +} +