Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -342,6 +342,14 @@
         PM.add(createAMDGPUExternalAAWrapperPass());
       }
   });
+
+  Builder.addExtension(
+    PassManagerBuilder::EP_CGSCCOptimizerLate,
+    [](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
+      // Add infer address spaces pass to the opt pipeline after inlining
+      // but before SROA to increase SROA opportunities.
+      PM.add(createInferAddressSpacesPass());
+  });
 }
 
 //===----------------------------------------------------------------------===//
Index: llvm/trunk/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
@@ -0,0 +1,10 @@
+; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
+
+; GCN: Function Integration/Inlining
+; GCN: FunctionPass Manager
+; GCN: Infer address spaces
+; GCN: SROA
+
+define void @empty() {
+  ret void
+}