Index: lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.cpp
+++ lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1964,7 +1964,7 @@
   }
   case PPC::CFENCE8: {
     auto Val = MI.getOperand(0).getReg();
-    BuildMI(MBB, MI, DL, get(PPC::CMPW), PPC::CR7).addReg(Val).addReg(Val);
+    BuildMI(MBB, MI, DL, get(PPC::CMPD), PPC::CR7).addReg(Val).addReg(Val);
     BuildMI(MBB, MI, DL, get(PPC::CTRL_DEP))
         .addImm(PPC::PRED_NE_MINUS)
         .addReg(PPC::CR7)
Index: test/CodeGen/PowerPC/atomic-2.ll
===================================================================
--- test/CodeGen/PowerPC/atomic-2.ll
+++ test/CodeGen/PowerPC/atomic-2.ll
@@ -109,7 +109,7 @@
   %tmp = load atomic i64, i64* %mem acquire, align 64
 ; CHECK-NOT: ldarx
 ; CHECK: ld [[VAL:r[0-9]+]]
-; CHECK: cmpw [[CR:cr[0-9]+]], [[VAL]], [[VAL]]
+; CHECK: cmpd [[CR:cr[0-9]+]], [[VAL]], [[VAL]]
 ; CHECK: bne- [[CR]], .+4
 ; CHECK: isync
   ret i64 %tmp
Index: test/CodeGen/PowerPC/atomics-constant.ll
===================================================================
--- test/CodeGen/PowerPC/atomics-constant.ll
+++ test/CodeGen/PowerPC/atomics-constant.ll
@@ -11,7 +11,7 @@
 ; CHECK-NEXT:    addis 3, 2, .LC0@toc@ha
 ; CHECK-NEXT:    li 4, 0
 ; CHECK-NEXT:    ld 3, .LC0@toc@l(3)
-; CHECK-NEXT:    cmpw 7, 4, 4
+; CHECK-NEXT:    cmpd 7, 4, 4
 ; CHECK-NEXT:    ld 3, 0(3)
 ; CHECK-NEXT:    bne- 7, .+4
 ; CHECK-NEXT:    isync
Index: test/CodeGen/PowerPC/atomics-regression.ll
===================================================================
--- test/CodeGen/PowerPC/atomics-regression.ll
+++ test/CodeGen/PowerPC/atomics-regression.ll
@@ -23,7 +23,7 @@
 ; PPC64LE-LABEL: test2:
 ; PPC64LE:       # BB#0:
 ; PPC64LE-NEXT:    lbz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -37,7 +37,7 @@
 ; PPC64LE-NEXT:    sync
 ; PPC64LE-NEXT:    ori 2, 2, 0
 ; PPC64LE-NEXT:    lbz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -67,7 +67,7 @@
 ; PPC64LE-LABEL: test6:
 ; PPC64LE:       # BB#0:
 ; PPC64LE-NEXT:    lhz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -81,7 +81,7 @@
 ; PPC64LE-NEXT:    sync
 ; PPC64LE-NEXT:    ori 2, 2, 0
 ; PPC64LE-NEXT:    lhz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -111,7 +111,7 @@
 ; PPC64LE-LABEL: test10:
 ; PPC64LE:       # BB#0:
 ; PPC64LE-NEXT:    lwz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -125,7 +125,7 @@
 ; PPC64LE-NEXT:    sync
 ; PPC64LE-NEXT:    ori 2, 2, 0
 ; PPC64LE-NEXT:    lwz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -155,7 +155,7 @@
 ; PPC64LE-LABEL: test14:
 ; PPC64LE:       # BB#0:
 ; PPC64LE-NEXT:    ld 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -169,7 +169,7 @@
 ; PPC64LE-NEXT:    sync
 ; PPC64LE-NEXT:    ori 2, 2, 0
 ; PPC64LE-NEXT:    ld 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    blr
@@ -9566,7 +9566,7 @@
 ; PPC64LE-LABEL: test_ordering0:
 ; PPC64LE:       # BB#0:
 ; PPC64LE-NEXT:    lwz 4, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 4, 4
+; PPC64LE-NEXT:    cmpd 7, 4, 4
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    lwz 3, 0(3)
@@ -9583,7 +9583,7 @@
 ; PPC64LE-LABEL: test_ordering1:
 ; PPC64LE:       # BB#0:
 ; PPC64LE-NEXT:    lwz 3, 0(3)
-; PPC64LE-NEXT:    cmpw 7, 3, 3
+; PPC64LE-NEXT:    cmpd 7, 3, 3
 ; PPC64LE-NEXT:    bne- 7, .+4
 ; PPC64LE-NEXT:    isync
 ; PPC64LE-NEXT:    stw 4, 0(5)