Index: ELF/InputSection.cpp
===================================================================
--- ELF/InputSection.cpp
+++ ELF/InputSection.cpp
@@ -402,6 +402,8 @@
 static uint32_t getARMUndefinedRelativeWeakVA(uint32_t Type, uint32_t A,
                                               uint32_t P) {
   switch (Type) {
+  // Unresolved branch relocations to weak references resolve to next
+  // instruction.
   case R_ARM_THM_JUMP11:
     return P + 2 + A;
   case R_ARM_CALL:
@@ -415,21 +417,38 @@
   case R_ARM_THM_CALL:
     // We don't want an interworking BLX to ARM
     return P + 5 + A;
-  default:
+  // Unresolved relative relocations to weak references resolve to the place
+  // R_ARM_TARGET2 which can be resolved relatively is not present as it never
+  // targets a weak-reference.
+  case R_ARM_MOVW_PREL_NC:
+  case R_ARM_MOVT_PREL:
+  case R_ARM_REL32:
+  case R_ARM_THM_MOVW_PREL_NC:
+  case R_ARM_THM_MOVT_PREL:
     return P + A;
+  default:
+    llvm_unreachable("ARM pc-relative relocation expected\n");
   }
 }
 
 static uint64_t getAArch64UndefinedRelativeWeakVA(uint64_t Type, uint64_t A,
                                                   uint64_t P) {
   switch (Type) {
+  // Unresolved branch relocations to weak references resolve to next
+  // instruction.
   case R_AARCH64_CALL26:
   case R_AARCH64_CONDBR19:
   case R_AARCH64_JUMP26:
   case R_AARCH64_TSTBR14:
     return P + 4 + A;
-  default:
+  // Unresolved relative relocations to weak references resolve to the place
+  case R_AARCH64_PREL16:
+  case R_AARCH64_PREL32:
+  case R_AARCH64_PREL64:
+  case R_AARCH64_ADR_PREL_LO21:
     return P + A;
+  default:
+    llvm_unreachable("AArch64 pc-relative relocation expected\n");
   }
 }