Index: lib/CodeGen/BranchFolding.cpp =================================================================== --- lib/CodeGen/BranchFolding.cpp +++ lib/CodeGen/BranchFolding.cpp @@ -82,7 +82,7 @@ static cl::opt TailMergeSize("tail-merge-size", cl::desc("Min number of instructions to consider tail merging"), - cl::init(3), cl::Hidden); + cl::init(2), cl::Hidden); namespace { Index: test/CodeGen/AArch64/combine-comparisons-by-cse.ll =================================================================== --- test/CodeGen/AArch64/combine-comparisons-by-cse.ll +++ test/CodeGen/AArch64/combine-comparisons-by-cse.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=aarch64-linux-gnu -tail-merge-size=3 | FileCheck %s ; marked as external to prevent possible optimizations @a = external global i32 Index: test/CodeGen/AMDGPU/br_cc.f16.ll =================================================================== --- test/CodeGen/AMDGPU/br_cc.f16.ll +++ test/CodeGen/AMDGPU/br_cc.f16.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s -; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s +; RUN: llc -march=amdgcn -verify-machineinstrs -tail-merge-size=3 < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs -tail-merge-size=3 < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s ; GCN-LABEL: {{^}}br_cc_f16: ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]] Index: test/CodeGen/ARM/code-placement.ll =================================================================== --- test/CodeGen/ARM/code-placement.ll +++ test/CodeGen/ARM/code-placement.ll @@ -38,9 +38,7 @@ br i1 %0, label %bb5, label %bb.nph15 bb1: ; preds = %bb2.preheader, %bb1 -; CHECK: LBB1_[[BB3:.]]: @ %bb3 ; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader -; CHECK: blt LBB1_[[BB3]] %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %bb2.preheader ] ; [#uses=2] %sum.08 = phi i32 [ %2, %bb1 ], [ %sum.110, %bb2.preheader ] ; [#uses=1] %tmp17 = sub i32 %i.07, %indvar ; [#uses=1] @@ -54,7 +52,7 @@ bb3: ; preds = %bb1, %bb2.preheader ; CHECK: LBB1_[[BB1:.]]: @ %bb1 ; CHECK: bne LBB1_[[BB1]] -; CHECK: b LBB1_[[BB3]] +; CHECK: LBB1_[[BB3:.]]: @ %bb3 %sum.0.lcssa = phi i32 [ %sum.110, %bb2.preheader ], [ %2, %bb1 ] ; [#uses=2] %3 = add i32 %pass.011, 1 ; [#uses=2] %exitcond18 = icmp eq i32 %3, %passes ; [#uses=1] Index: test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll =================================================================== --- test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll +++ test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll @@ -47,8 +47,6 @@ ; CHECK-NEXT: beq 0, .LBB1_3 ; CHECK-NEXT: .LBB1_2: # %res_block ; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: clrldi 3, 3, 32 -; CHECK-NEXT: blr ; CHECK-NEXT: .LBB1_3: # %endblock ; CHECK-NEXT: clrldi 3, 3, 32 ; CHECK-NEXT: blr @@ -79,8 +77,6 @@ ; CHECK-NEXT: beq 0, .LBB2_4 ; CHECK-NEXT: .LBB2_3: # %res_block ; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: clrldi 3, 3, 32 -; CHECK-NEXT: blr ; CHECK-NEXT: .LBB2_4: # %endblock ; CHECK-NEXT: clrldi 3, 3, 32 ; CHECK-NEXT: blr Index: test/CodeGen/PowerPC/ppc-shrink-wrapping.ll =================================================================== --- test/CodeGen/PowerPC/ppc-shrink-wrapping.ll +++ test/CodeGen/PowerPC/ppc-shrink-wrapping.ll @@ -397,7 +397,6 @@ ; Epilogue code. ; CHECK: li 3, 0 ; CHECK-DAG: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload -; CHECK: nop ; CHECK: blr ; ; CHECK: [[ELSE_LABEL]] Index: test/CodeGen/Thumb2/v8_IT_3.ll =================================================================== --- test/CodeGen/Thumb2/v8_IT_3.ll +++ test/CodeGen/Thumb2/v8_IT_3.ll @@ -58,7 +58,8 @@ ; CHECK-PIC-NEXT: bne ; CHECK-PIC: %bb6 ; CHECK-PIC-NEXT: movs -; CHECK-PIC-NEXT: add +; CHECK-PIC-NEXT: b +; CHECK-PIC: add ; CHECK-PIC-NEXT: pop ret i32 0 Index: test/CodeGen/X86/2008-02-18-TailMergingBug.ll =================================================================== --- test/CodeGen/X86/2008-02-18-TailMergingBug.ll +++ test/CodeGen/X86/2008-02-18-TailMergingBug.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16 +; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 22 ; PR1909 @.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1] Index: test/CodeGen/X86/loop-search.ll =================================================================== --- test/CodeGen/X86/loop-search.ll +++ test/CodeGen/X86/loop-search.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s @@ -9,33 +10,28 @@ ; CHECK: ## BB#0: ## %entry ; CHECK-NEXT: testl %edx, %edx ; CHECK-NEXT: jle LBB0_1 -; CHECK-NEXT: ## BB#4: ## %for.body.preheader +; CHECK-NEXT: ## BB#3: ## %for.body.preheader ; CHECK-NEXT: movslq %edx, %rax ; CHECK-NEXT: xorl %ecx, %ecx ; CHECK-NEXT: .p2align 4, 0x90 -; CHECK-NEXT: LBB0_5: ## %for.body +; CHECK-NEXT: LBB0_4: ## %for.body ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: cmpl %edi, (%rsi,%rcx,4) -; CHECK-NEXT: je LBB0_6 +; CHECK-NEXT: je LBB0_5 ; CHECK-NEXT: ## BB#2: ## %for.cond -; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1 +; CHECK-NEXT: ## in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: incq %rcx ; CHECK-NEXT: cmpq %rax, %rcx -; CHECK-NEXT: jl LBB0_5 -; ### FIXME: BB#3 and LBB0_1 should be merged -; CHECK-NEXT: ## BB#3: -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: ## kill: %AL %AL %EAX -; CHECK-NEXT: retq +; CHECK-NEXT: jl LBB0_4 ; CHECK-NEXT: LBB0_1: ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: ## kill: %AL %AL %EAX ; CHECK-NEXT: retq -; CHECK-NEXT: LBB0_6: +; CHECK-NEXT: LBB0_5: ; CHECK-NEXT: movb $1, %al ; CHECK-NEXT: ## kill: %AL %AL %EAX ; CHECK-NEXT: retq -; +; ### FIXME: BB#3 and LBB0_1 should be merged entry: %cmp5 = icmp sgt i32 %count, 0 br i1 %cmp5, label %for.body.preheader, label %cleanup Index: test/CodeGen/X86/mul-constant-result.ll =================================================================== --- test/CodeGen/X86/mul-constant-result.ll +++ test/CodeGen/X86/mul-constant-result.ll @@ -27,93 +27,82 @@ ; X86-NEXT: .LBB0_4: ; X86-NEXT: decl %ecx ; X86-NEXT: cmpl $31, %ecx -; X86-NEXT: ja .LBB0_39 +; X86-NEXT: ja .LBB0_41 ; X86-NEXT: # BB#5: ; X86-NEXT: jmpl *.LJTI0_0(,%ecx,4) ; X86-NEXT: .LBB0_6: ; X86-NEXT: addl %eax, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_39: +; X86-NEXT: .LBB0_41: ; X86-NEXT: xorl %eax, %eax -; X86-NEXT: .LBB0_40: +; X86-NEXT: .LBB0_42: ; X86-NEXT: popl %esi ; X86-NEXT: retl ; X86-NEXT: .LBB0_7: -; X86-NEXT: leal (%eax,%eax,2), %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; X86-NEXT: .LBB0_8: ; X86-NEXT: shll $2, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_9: -; X86-NEXT: leal (%eax,%eax,4), %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; X86-NEXT: .LBB0_10: +; X86-NEXT: .LBB0_8: ; X86-NEXT: addl %eax, %eax ; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_11: +; X86-NEXT: .LBB0_9: ; X86-NEXT: leal (,%eax,8), %ecx -; X86-NEXT: jmp .LBB0_12 -; X86-NEXT: .LBB0_13: +; X86-NEXT: jmp .LBB0_10 +; X86-NEXT: .LBB0_11: ; X86-NEXT: shll $3, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_14: -; X86-NEXT: leal (%eax,%eax,8), %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; X86-NEXT: .LBB0_15: +; X86-NEXT: .LBB0_12: ; X86-NEXT: addl %eax, %eax ; X86-NEXT: leal (%eax,%eax,4), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_16: +; X86-NEXT: .LBB0_13: ; X86-NEXT: leal (%eax,%eax,4), %ecx ; X86-NEXT: leal (%eax,%ecx,2), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_17: +; X86-NEXT: .LBB0_14: ; X86-NEXT: shll $2, %eax ; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_18: +; X86-NEXT: .LBB0_15: ; X86-NEXT: leal (%eax,%eax,2), %ecx ; X86-NEXT: leal (%eax,%ecx,4), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_19: +; X86-NEXT: .LBB0_17: ; X86-NEXT: leal (%eax,%eax,2), %ecx -; X86-NEXT: jmp .LBB0_20 -; X86-NEXT: .LBB0_21: +; X86-NEXT: jmp .LBB0_18 +; X86-NEXT: .LBB0_20: ; X86-NEXT: leal (%eax,%eax,4), %eax ; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_22: +; X86-NEXT: .LBB0_21: ; X86-NEXT: shll $4, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_23: +; X86-NEXT: .LBB0_22: ; X86-NEXT: movl %eax, %ecx ; X86-NEXT: shll $4, %ecx ; X86-NEXT: addl %ecx, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_24: +; X86-NEXT: .LBB0_23: ; X86-NEXT: addl %eax, %eax +; X86-NEXT: .LBB0_24: ; X86-NEXT: leal (%eax,%eax,8), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl ; X86-NEXT: .LBB0_25: ; X86-NEXT: leal (%eax,%eax,4), %ecx ; X86-NEXT: shll $2, %ecx -; X86-NEXT: jmp .LBB0_12 +; X86-NEXT: jmp .LBB0_10 ; X86-NEXT: .LBB0_26: ; X86-NEXT: shll $2, %eax ; X86-NEXT: leal (%eax,%eax,4), %eax @@ -126,7 +115,7 @@ ; X86-NEXT: retl ; X86-NEXT: .LBB0_28: ; X86-NEXT: leal (%eax,%eax,4), %ecx -; X86-NEXT: .LBB0_20: +; X86-NEXT: .LBB0_18: ; X86-NEXT: leal (%eax,%ecx,4), %ecx ; X86-NEXT: addl %ecx, %eax ; X86-NEXT: popl %esi @@ -134,7 +123,7 @@ ; X86-NEXT: .LBB0_29: ; X86-NEXT: leal (%eax,%eax,2), %ecx ; X86-NEXT: shll $3, %ecx -; X86-NEXT: jmp .LBB0_12 +; X86-NEXT: jmp .LBB0_10 ; X86-NEXT: .LBB0_30: ; X86-NEXT: shll $3, %eax ; X86-NEXT: leal (%eax,%eax,2), %eax @@ -142,45 +131,47 @@ ; X86-NEXT: retl ; X86-NEXT: .LBB0_31: ; X86-NEXT: leal (%eax,%eax,4), %eax +; X86-NEXT: .LBB0_32: ; X86-NEXT: leal (%eax,%eax,4), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_32: +; X86-NEXT: .LBB0_33: ; X86-NEXT: leal (%eax,%eax,8), %ecx ; X86-NEXT: leal (%ecx,%ecx,2), %ecx -; X86-NEXT: jmp .LBB0_12 -; X86-NEXT: .LBB0_33: +; X86-NEXT: jmp .LBB0_10 +; X86-NEXT: .LBB0_34: ; X86-NEXT: leal (%eax,%eax,8), %eax +; X86-NEXT: .LBB0_35: ; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_34: +; X86-NEXT: .LBB0_36: ; X86-NEXT: leal (%eax,%eax,8), %ecx ; X86-NEXT: leal (%ecx,%ecx,2), %ecx ; X86-NEXT: addl %ecx, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_35: +; X86-NEXT: .LBB0_37: ; X86-NEXT: leal (%eax,%eax,8), %ecx ; X86-NEXT: leal (%ecx,%ecx,2), %ecx ; X86-NEXT: addl %eax, %ecx ; X86-NEXT: addl %ecx, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_36: +; X86-NEXT: .LBB0_38: ; X86-NEXT: movl %eax, %ecx ; X86-NEXT: shll $5, %ecx ; X86-NEXT: subl %eax, %ecx -; X86-NEXT: jmp .LBB0_12 -; X86-NEXT: .LBB0_37: +; X86-NEXT: jmp .LBB0_10 +; X86-NEXT: .LBB0_39: ; X86-NEXT: movl %eax, %ecx ; X86-NEXT: shll $5, %ecx -; X86-NEXT: .LBB0_12: +; X86-NEXT: .LBB0_10: ; X86-NEXT: subl %eax, %ecx ; X86-NEXT: movl %ecx, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl -; X86-NEXT: .LBB0_38: +; X86-NEXT: .LBB0_40: ; X86-NEXT: shll $5, %eax ; X86-NEXT: popl %esi ; X86-NEXT: retl @@ -196,91 +187,80 @@ ; X64-HSW-NEXT: cmovel %ecx, %eax ; X64-HSW-NEXT: addl $-1, %edi ; X64-HSW-NEXT: cmpl $31, %edi -; X64-HSW-NEXT: ja .LBB0_36 +; X64-HSW-NEXT: ja .LBB0_38 ; X64-HSW-NEXT: # BB#1: ; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8) ; X64-HSW-NEXT: .LBB0_2: ; X64-HSW-NEXT: addl %eax, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_36: +; X64-HSW-NEXT: .LBB0_38: ; X64-HSW-NEXT: xorl %eax, %eax -; X64-HSW-NEXT: .LBB0_37: +; X64-HSW-NEXT: .LBB0_39: ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq ; X64-HSW-NEXT: .LBB0_3: -; X64-HSW-NEXT: leal (%rax,%rax,2), %eax -; X64-HSW-NEXT: # kill: %EAX %EAX %RAX -; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_4: ; X64-HSW-NEXT: shll $2, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_5: -; X64-HSW-NEXT: leal (%rax,%rax,4), %eax -; X64-HSW-NEXT: # kill: %EAX %EAX %RAX -; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_6: +; X64-HSW-NEXT: .LBB0_4: ; X64-HSW-NEXT: addl %eax, %eax ; X64-HSW-NEXT: leal (%rax,%rax,2), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_7: +; X64-HSW-NEXT: .LBB0_5: ; X64-HSW-NEXT: leal (,%rax,8), %ecx -; X64-HSW-NEXT: jmp .LBB0_8 -; X64-HSW-NEXT: .LBB0_9: +; X64-HSW-NEXT: jmp .LBB0_6 +; X64-HSW-NEXT: .LBB0_8: ; X64-HSW-NEXT: shll $3, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_10: -; X64-HSW-NEXT: leal (%rax,%rax,8), %eax -; X64-HSW-NEXT: # kill: %EAX %EAX %RAX -; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_11: +; X64-HSW-NEXT: .LBB0_9: ; X64-HSW-NEXT: addl %eax, %eax ; X64-HSW-NEXT: leal (%rax,%rax,4), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_12: +; X64-HSW-NEXT: .LBB0_10: ; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx ; X64-HSW-NEXT: leal (%rax,%rcx,2), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_13: +; X64-HSW-NEXT: .LBB0_11: ; X64-HSW-NEXT: shll $2, %eax ; X64-HSW-NEXT: leal (%rax,%rax,2), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_14: +; X64-HSW-NEXT: .LBB0_12: ; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx ; X64-HSW-NEXT: leal (%rax,%rcx,4), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_15: +; X64-HSW-NEXT: .LBB0_14: ; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx -; X64-HSW-NEXT: jmp .LBB0_16 -; X64-HSW-NEXT: .LBB0_18: +; X64-HSW-NEXT: jmp .LBB0_15 +; X64-HSW-NEXT: .LBB0_17: ; X64-HSW-NEXT: leal (%rax,%rax,4), %eax ; X64-HSW-NEXT: leal (%rax,%rax,2), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_19: +; X64-HSW-NEXT: .LBB0_18: ; X64-HSW-NEXT: shll $4, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_20: +; X64-HSW-NEXT: .LBB0_19: ; X64-HSW-NEXT: movl %eax, %ecx ; X64-HSW-NEXT: shll $4, %ecx -; X64-HSW-NEXT: jmp .LBB0_17 -; X64-HSW-NEXT: .LBB0_21: +; X64-HSW-NEXT: jmp .LBB0_16 +; X64-HSW-NEXT: .LBB0_20: ; X64-HSW-NEXT: addl %eax, %eax +; X64-HSW-NEXT: .LBB0_21: ; X64-HSW-NEXT: leal (%rax,%rax,8), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq ; X64-HSW-NEXT: .LBB0_22: ; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx ; X64-HSW-NEXT: shll $2, %ecx -; X64-HSW-NEXT: jmp .LBB0_8 +; X64-HSW-NEXT: jmp .LBB0_6 ; X64-HSW-NEXT: .LBB0_23: ; X64-HSW-NEXT: shll $2, %eax ; X64-HSW-NEXT: leal (%rax,%rax,4), %eax @@ -293,13 +273,13 @@ ; X64-HSW-NEXT: retq ; X64-HSW-NEXT: .LBB0_25: ; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx -; X64-HSW-NEXT: .LBB0_16: +; X64-HSW-NEXT: .LBB0_15: ; X64-HSW-NEXT: leal (%rax,%rcx,4), %ecx -; X64-HSW-NEXT: jmp .LBB0_17 +; X64-HSW-NEXT: jmp .LBB0_16 ; X64-HSW-NEXT: .LBB0_26: ; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx ; X64-HSW-NEXT: shll $3, %ecx -; X64-HSW-NEXT: jmp .LBB0_8 +; X64-HSW-NEXT: jmp .LBB0_6 ; X64-HSW-NEXT: .LBB0_27: ; X64-HSW-NEXT: shll $3, %eax ; X64-HSW-NEXT: leal (%rax,%rax,2), %eax @@ -307,45 +287,47 @@ ; X64-HSW-NEXT: retq ; X64-HSW-NEXT: .LBB0_28: ; X64-HSW-NEXT: leal (%rax,%rax,4), %eax +; X64-HSW-NEXT: .LBB0_29: ; X64-HSW-NEXT: leal (%rax,%rax,4), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_29: +; X64-HSW-NEXT: .LBB0_30: ; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx ; X64-HSW-NEXT: leal (%rcx,%rcx,2), %ecx -; X64-HSW-NEXT: jmp .LBB0_8 -; X64-HSW-NEXT: .LBB0_30: +; X64-HSW-NEXT: jmp .LBB0_6 +; X64-HSW-NEXT: .LBB0_31: ; X64-HSW-NEXT: leal (%rax,%rax,8), %eax +; X64-HSW-NEXT: .LBB0_32: ; X64-HSW-NEXT: leal (%rax,%rax,2), %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_31: +; X64-HSW-NEXT: .LBB0_33: ; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx ; X64-HSW-NEXT: leal (%rcx,%rcx,2), %ecx -; X64-HSW-NEXT: jmp .LBB0_17 -; X64-HSW-NEXT: .LBB0_32: +; X64-HSW-NEXT: jmp .LBB0_16 +; X64-HSW-NEXT: .LBB0_34: ; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx ; X64-HSW-NEXT: leal (%rcx,%rcx,2), %ecx ; X64-HSW-NEXT: addl %eax, %ecx -; X64-HSW-NEXT: .LBB0_17: +; X64-HSW-NEXT: .LBB0_16: ; X64-HSW-NEXT: addl %eax, %ecx ; X64-HSW-NEXT: movl %ecx, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_33: +; X64-HSW-NEXT: .LBB0_35: ; X64-HSW-NEXT: movl %eax, %ecx ; X64-HSW-NEXT: shll $5, %ecx ; X64-HSW-NEXT: subl %eax, %ecx -; X64-HSW-NEXT: jmp .LBB0_8 -; X64-HSW-NEXT: .LBB0_34: +; X64-HSW-NEXT: jmp .LBB0_6 +; X64-HSW-NEXT: .LBB0_36: ; X64-HSW-NEXT: movl %eax, %ecx ; X64-HSW-NEXT: shll $5, %ecx -; X64-HSW-NEXT: .LBB0_8: +; X64-HSW-NEXT: .LBB0_6: ; X64-HSW-NEXT: subl %eax, %ecx ; X64-HSW-NEXT: movl %ecx, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq -; X64-HSW-NEXT: .LBB0_35: +; X64-HSW-NEXT: .LBB0_37: ; X64-HSW-NEXT: shll $5, %eax ; X64-HSW-NEXT: # kill: %EAX %EAX %RAX ; X64-HSW-NEXT: retq Index: test/CodeGen/X86/tail-dup-merge-loop-headers.ll =================================================================== --- test/CodeGen/X86/tail-dup-merge-loop-headers.ll +++ test/CodeGen/X86/tail-dup-merge-loop-headers.ll @@ -73,11 +73,11 @@ ; CHECK-LABEL: loop_shared_header ; CHECK: # %entry ; CHECK: # %shared_preheader -; CHECK: # %shared_loop_header -; CHECK: # %inner_loop_body +; CHECK: # %merge_other ; CHECK: # %outer_loop_latch ; CHECK: # %merge_predecessor_split -; CHECK: # %outer_loop_latch +; CHECK: # %shared_loop_header +; CHECK: # %inner_loop_body ; CHECK: # %cleanup define i32 @loop_shared_header(i8* %exe, i32 %exesz, i32 %headsize, i32 %min, i32 %wwprva, i32 %e_lfanew, i8* readonly %wwp, i32 %wwpsz, i16 zeroext %sects) local_unnamed_addr #0 { entry: Index: test/CodeGen/X86/tail-opts.ll =================================================================== --- test/CodeGen/X86/tail-opts.ll +++ test/CodeGen/X86/tail-opts.ll @@ -106,20 +106,19 @@ ; BranchFolding shouldn't try to merge the tails of two blocks ; with only a branch in common, regardless of the fallthrough situation. - ; CHECK-LABEL: dont_merge_oddly: ; CHECK-NOT: ret ; CHECK: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} -; CHECK-NEXT: jbe .LBB2_3 +; CHECK-NEXT: jbe .LBB2_4 ; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} -; CHECK-NEXT: ja .LBB2_4 -; CHECK-NEXT: .LBB2_2: +; CHECK-NEXT: ja .LBB2_5 +; CHECK-NEXT: .LBB2_3: ; CHECK-NEXT: movb $1, %al ; CHECK-NEXT: ret -; CHECK-NEXT: .LBB2_3: -; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} -; CHECK-NEXT: jbe .LBB2_2 ; CHECK-NEXT: .LBB2_4: +; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} +; CHECK-NEXT: jbe .LBB2_3 +; CHECK-NEXT: .LBB2_5: ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: ret @@ -412,12 +411,9 @@ ; two_nosize - Same as two, but without the optsize attribute. ; Now two instructions are enough to be tail-duplicated. - ; CHECK-LABEL: two_nosize: ; CHECK: movl $0, XYZ(%rip) ; CHECK: jmp tail_call_me -; CHECK: movl $0, XYZ(%rip) -; CHECK: jmp tail_call_me define void @two_nosize() nounwind { entry: Index: test/CodeGen/X86/trunc-to-bool.ll =================================================================== --- test/CodeGen/X86/trunc-to-bool.ll +++ test/CodeGen/X86/trunc-to-bool.ll @@ -91,12 +91,12 @@ ; CHECK-NEXT: fistps {{[0-9]+}}(%esp) ; CHECK-NEXT: fldcw (%esp) ; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp) -; CHECK-NEXT: je .LBB4_2 +; CHECK-NEXT: je .LBB4_3 ; CHECK-NEXT: # BB#1: # %cond_true ; CHECK-NEXT: movl $21, %eax ; CHECK-NEXT: popl %ecx ; CHECK-NEXT: retl -; CHECK-NEXT: .LBB4_2: # %cond_false +; CHECK-NEXT: .LBB4_3: # %cond_false ; CHECK-NEXT: movl $42, %eax ; CHECK-NEXT: popl %ecx ; CHECK-NEXT: retl Index: test/CodeGen/X86/wide-integer-cmp.ll =================================================================== --- test/CodeGen/X86/wide-integer-cmp.ll +++ test/CodeGen/X86/wide-integer-cmp.ll @@ -103,12 +103,12 @@ ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %esi ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: jge .LBB4_2 +; CHECK-NEXT: jge .LBB4_3 ; CHECK-NEXT: # BB#1: # %bb1 ; CHECK-NEXT: movl $1, %eax ; CHECK-NEXT: popl %esi ; CHECK-NEXT: retl -; CHECK-NEXT: .LBB4_2: # %bb2 +; CHECK-NEXT: .LBB4_3: # %bb2 ; CHECK-NEXT: movl $2, %eax ; CHECK-NEXT: popl %esi ; CHECK-NEXT: retl Index: test/DebugInfo/PDB/pdbdump-debug-subsections.test =================================================================== --- test/DebugInfo/PDB/pdbdump-debug-subsections.test +++ test/DebugInfo/PDB/pdbdump-debug-subsections.test @@ -41,7 +41,7 @@ YAML-NEXT: - !Lines YAML-NEXT: CodeSize: 10 YAML-NEXT: Flags: [ ] -YAML-NEXT: RelocOffset: 16 +YAML-NEXT: RelocOffset: 100016 YAML-NEXT: RelocSegment: 1 YAML-NEXT: Blocks: YAML-NEXT: - FileName: 'd:\src\llvm\test\debuginfo\pdb\inputs\empty.cpp' @@ -126,7 +126,7 @@ RAW-NEXT: } RAW-NEXT: Lines { RAW-NEXT: RelocSegment: 1 -RAW-NEXT: RelocOffset: 16 +RAW-NEXT: RelocOffset: 100016 RAW-NEXT: CodeSize: 10 RAW-NEXT: HasColumns: No RAW-NEXT: FileEntry {