Index: lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -986,7 +986,9 @@
   void errorExpTgt();
   OperandMatchResultTy parseExpTgtImpl(StringRef Str, uint8_t &Val);
 
+  bool validateInstruction(const MCInst &Inst, const SMLoc &IDLoc);
   bool validateOperandLimitations(const MCInst &Inst);
+  bool validateQSADLimitations(const MCInst &Inst);
   bool usesConstantBus(const MCInst &Inst, unsigned OpIdx);
   bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
   unsigned findImplicitSGPRReadInVOP(const MCInst &Inst) const;
@@ -2120,6 +2122,66 @@
   return ConstantBusUseCount <= 1;
 }
 
+bool AMDGPUAsmParser::validateQSADLimitations(const MCInst &Inst) {
+
+  const unsigned Opcode = Inst.getOpcode();
+
+  switch (Opcode) {
+  default:
+    return true;
+  case AMDGPU::V_MQSAD_PK_U16_U8_si:
+  case AMDGPU::V_QSAD_PK_U16_U8_ci:
+  case AMDGPU::V_MQSAD_U32_U8_ci:
+  case AMDGPU::V_MQSAD_PK_U16_U8_vi:
+  case AMDGPU::V_QSAD_PK_U16_U8_vi:
+  case AMDGPU::V_MQSAD_U32_U8_vi:
+    break;
+  }
+
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+
+  const int DstIdx  = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst);
+  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
+  const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
+  const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
+
+  assert(DstIdx != -1);
+  const MCOperand &Dst = Inst.getOperand(DstIdx);
+  assert(Dst.isReg());
+  const unsigned DstReg = mc2PseudoReg(Dst.getReg());
+
+  const int SrcIndices[] = { Src0Idx, Src1Idx, Src2Idx };
+
+  for (int SrcIdx : SrcIndices) {
+    assert(SrcIdx != -1);
+
+    const MCOperand &Src = Inst.getOperand(SrcIdx);
+    if (Src.isReg()) {
+      const unsigned SrcReg = mc2PseudoReg(Src.getReg());
+      if (isRegIntersect(DstReg, SrcReg, TRI)) {
+        return false;
+      }
+    }
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst, const SMLoc &IDLoc) {
+  if (!validateOperandLimitations(Inst)) {
+    Error(IDLoc,
+      "invalid operand (violates constant bus restrictions)");
+    return false;
+  }
+  if (!validateQSADLimitations(Inst)) {
+    Error(IDLoc,
+      "destination must must be different than all sources");
+    return false;
+  }
+
+  return true;
+}
+
 bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                               OperandVector &Operands,
                                               MCStreamer &Out,
@@ -2152,9 +2214,8 @@
   switch (Result) {
   default: break;
   case Match_Success:
-    if (!validateOperandLimitations(Inst)) {
-      return Error(IDLoc,
-                   "invalid operand (violates constant bus restrictions)");
+    if (!validateInstruction(Inst, IDLoc)) {
+      return true;
     }
     Inst.setLoc(IDLoc);
     Out.EmitInstruction(Inst, getSTI());
Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
===================================================================
--- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -271,6 +271,9 @@
 /// \brief Is Reg - scalar register
 bool isSGPR(unsigned Reg, const MCRegisterInfo* TRI);
 
+/// \brief Is there any intersection between registers
+bool isRegIntersect(unsigned Reg0, unsigned Reg1, const MCRegisterInfo* TRI);
+
 /// If \p Reg is a pseudo reg, return the correct hardware register given
 /// \p STI otherwise return \p Reg.
 unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI);
Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
===================================================================
--- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -527,6 +527,27 @@
     Reg == AMDGPU::SCC;
 }
 
+bool isRegIntersect(unsigned Reg0, unsigned Reg1, const MCRegisterInfo* TRI) {
+
+  if (Reg0 == Reg1) {
+    return true;
+  }
+
+  unsigned SubReg0 = TRI->getSubReg(Reg0, 1);
+  if (SubReg0 == 0) {
+    return TRI->getSubRegIndex(Reg1, Reg0) > 0;
+  }
+
+  for (unsigned Idx = 2; SubReg0 > 0; ++Idx) {
+    if (isRegIntersect(Reg1, SubReg0, TRI)) {
+      return true;
+    }
+    SubReg0 = TRI->getSubReg(Reg0, Idx);
+  }
+
+  return false;
+}
+
 unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI) {
 
   switch(Reg) {
Index: test/MC/AMDGPU/gfx8_asm_all.s
===================================================================
--- test/MC/AMDGPU/gfx8_asm_all.s
+++ test/MC/AMDGPU/gfx8_asm_all.s
@@ -45249,242 +45249,395 @@
 v_msad_u8 v5, s1, 0, v255
 // CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x00,0xfd,0x07]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[254:255], s[2:3], 0, 0
-// CHECK: [0xfe,0x00,0xe5,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[254:255], v[1:2], v2, v[3:4]
+// CHECK: [0xfe,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[4:5], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x04,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[254:255], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xfe,0x05,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[100:101], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x64,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], s[2:3], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], flat_scratch, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x66,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], s[4:5], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x04,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], vcc, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x6a,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], s[100:101], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x64,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], tba, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x6c,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], flat_scratch, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x66,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], tma, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x6e,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], vcc, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x6a,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], ttmp[10:11], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x7a,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], tba, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x6c,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], exec, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x7e,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], tma, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x6e,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], 0, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x80,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], ttmp[10:11], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x7a,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], -1, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xc1,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], exec, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x7e,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], 0.5, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xf0,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], 0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x80,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], -4.0, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xf7,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], -1, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xc1,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], v[1:2], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], 0.5, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xf0,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], v[254:255], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xfe,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], -4.0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xf7,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], -1, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x82,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v255, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xff,0x0f,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0.5, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0xe0,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], s2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], -4.0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0xee,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], s101, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcb,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], v2, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x04,0x02,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcd,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], v255, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0xfe,0x03,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcf,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, -1
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0x05,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], vcc_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd5,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, 0.5
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0xc1,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], vcc_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd7,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, -4.0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0xdd,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], tba_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd9,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, v[3:4]
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0x0d,0x04]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], tba_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xdb,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, v[254:255]
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0xf9,0x07]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], tma_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xdd,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], tma_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xdf,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[254:255], s[2:3], 0, 0
-// CHECK: [0xfe,0x00,0xe6,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], ttmp11, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xf7,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[4:5], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x04,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], m0, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xf9,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[100:101], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x64,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], exec_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xfd,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], flat_scratch, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x66,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], exec_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xff,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], vcc, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x6a,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], 0, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x01,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], tba, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x6c,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], -1, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x83,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], tma, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x6e,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], 0.5, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xe1,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], ttmp[10:11], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x7a,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], -4.0, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xef,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], exec, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x7e,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[254:255]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xfa,0x07]
 
-v_mqsad_pk_u16_u8 v[5:6], 0, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x80,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[6:7]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x1a,0x00]
 
-v_mqsad_pk_u16_u8 v[5:6], -1, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xc1,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[8:9]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x22,0x00]
 
-v_mqsad_pk_u16_u8 v[5:6], 0.5, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xf0,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[100:101]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x92,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], -4.0, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xf7,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, flat_scratch
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x9a,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, vcc
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xaa,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], v[254:255], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xfe,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, tba
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xb2,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], -1, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x82,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, tma
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xba,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0.5, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0xe0,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, ttmp[10:11]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xea,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], -4.0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0xee,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, exec
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xfa,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], v2, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x04,0x02,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x02,0x02]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], v255, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0xfe,0x03,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -1
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x06,0x03]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, -1
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0x05,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xc2,0x03]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, 0.5
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0xc1,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xde,0x03]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, -4.0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0xdd,0x03]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, v[3:4]
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[254:255], v[1:2], v2, v[3:4]
+// CHECK: [0xfe,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, v[254:255]
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0xf9,0x07]
+v_mqsad_pk_u16_u8 v[5:6], v[254:255], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xfe,0x05,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], s[2:3], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[252:255], 0, s2, v[3:6]
-// CHECK: [0xfc,0x00,0xe7,0xd1,0x80,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], s[4:5], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x04,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], -1, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xc1,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], s[100:101], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x64,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0.5, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xf0,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], flat_scratch, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x66,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], -4.0, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xf7,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], vcc, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x6a,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], v[1:2], s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x01,0x05,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], tba, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x6c,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], v[254:255], s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xfe,0x05,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], tma, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x6e,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, s101, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xca,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], ttmp[10:11], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x7a,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, flat_scratch_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xcc,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], exec, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x7e,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, flat_scratch_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xce,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], 0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x80,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, vcc_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xd4,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], -1, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xc1,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, vcc_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xd6,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], 0.5, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xf0,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, tba_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xd8,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], -4.0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xf7,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, tba_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xda,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v255, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xff,0x0f,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, tma_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xdc,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], s2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, tma_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xde,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], s101, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcb,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, ttmp11, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xf6,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcd,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, m0, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xf8,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcf,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, exec_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xfc,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], vcc_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd5,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, exec_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xfe,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], vcc_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd7,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, 0, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x00,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], tba_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd9,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, -1, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x82,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], tba_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xdb,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, 0.5, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xe0,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], tma_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xdd,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, -4.0, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xee,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], tma_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xdf,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, v2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x04,0x0e,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], ttmp11, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xf7,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, v255, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xfe,0x0f,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], m0, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xf9,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, s2, v[252:255]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x04,0xf0,0x07]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], exec_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xfd,0x0c,0x04]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], exec_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xff,0x0c,0x04]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x01,0x0d,0x04]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], -1, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x83,0x0d,0x04]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0.5, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xe1,0x0d,0x04]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], -4.0, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xef,0x0d,0x04]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[254:255]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xfa,0x07]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[6:7]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x1a,0x00]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[8:9]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x22,0x00]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[100:101]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x92,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, flat_scratch
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x9a,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, vcc
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xaa,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, tba
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xb2,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, tma
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xba,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, ttmp[10:11]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xea,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, exec
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xfa,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x02,0x02]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -1
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x06,0x03]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xc2,0x03]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xde,0x03]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], s[2:3], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x02,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], s[4:5], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x04,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], s[100:101], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x64,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], flat_scratch, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x66,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], vcc, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x6a,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], tba, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x6c,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], tma, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x6e,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], ttmp[10:11], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x7a,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], exec, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x7e,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], 0, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x80,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], -1, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0xc1,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], 0.5, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0xf0,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], -4.0, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0xf7,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], s2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], s101, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcb,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], flat_scratch_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcd,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], flat_scratch_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcf,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], vcc_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd5,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], vcc_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd7,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], tba_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd9,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], tba_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xdb,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], tma_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xdd,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], tma_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xdf,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], ttmp11, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xf7,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], m0, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xf9,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], exec_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xfd,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], exec_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xff,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], 0, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x01,0x0d,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], -1, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x83,0x0d,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], 0.5, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xe1,0x0d,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], -4.0, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xef,0x0d,0x04]
 
 v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0
 // CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x00,0x01,0x02]
Index: test/MC/AMDGPU/gfx9_asm_all.s
===================================================================
--- test/MC/AMDGPU/gfx9_asm_all.s
+++ test/MC/AMDGPU/gfx9_asm_all.s
@@ -34320,209 +34320,305 @@
 v_msad_u8 v5, s1, 0, v255
 // CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x00,0xfd,0x07]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[254:255], s[2:3], 0, 0
-// CHECK: [0xfe,0x00,0xe5,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[254:255], v[1:2], v2, v[3:4]
+// CHECK: [0xfe,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[4:5], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x04,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[254:255], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xfe,0x05,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[100:101], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x64,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], s[2:3], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], flat_scratch, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x66,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], s[4:5], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x04,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], vcc, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x6a,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], s[100:101], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x64,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], exec, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x7e,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], flat_scratch, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x66,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], 0, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x80,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], vcc, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x6a,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], -1, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xc1,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], exec, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x7e,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], 0.5, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xf0,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], 0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x80,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], -4.0, 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xf7,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], -1, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xc1,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], v[1:2], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], 0.5, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xf0,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], v[254:255], 0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0xfe,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], -4.0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0xf7,0x04,0x0e,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], -1, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x82,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v255, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xff,0x0f,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0.5, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0xe0,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], s2, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], -4.0, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0xee,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], s101, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcb,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], v2, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x04,0x02,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcd,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], v255, 0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0xfe,0x03,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcf,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, -1
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0x05,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], vcc_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd5,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, 0.5
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0xc1,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], vcc_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd7,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, -4.0
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0xdd,0x03]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], m0, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xf9,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, v[3:4]
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0x0d,0x04]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], exec_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xfd,0x0c,0x04]
 
-v_qsad_pk_u16_u8 v[5:6], s[2:3], 0, v[254:255]
-// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x00,0xf9,0x07]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], exec_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xff,0x0c,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], 0, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x01,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[254:255], s[2:3], 0, 0
-// CHECK: [0xfe,0x00,0xe6,0xd1,0x02,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], -1, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x83,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[4:5], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x04,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], 0.5, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xe1,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[100:101], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x64,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], -4.0, v[3:4]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xef,0x0d,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], flat_scratch, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x66,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[254:255]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xfa,0x07]
 
-v_mqsad_pk_u16_u8 v[5:6], vcc, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x6a,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[6:7]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x1a,0x00]
 
-v_mqsad_pk_u16_u8 v[5:6], exec, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x7e,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[8:9]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x22,0x00]
 
-v_mqsad_pk_u16_u8 v[5:6], 0, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x80,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[100:101]
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x92,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], -1, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xc1,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, flat_scratch
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x9a,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], 0.5, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xf0,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, vcc
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xaa,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], -4.0, 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xf7,0x00,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, exec
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xfa,0x01]
 
-v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x02,0x02]
 
-v_mqsad_pk_u16_u8 v[5:6], v[254:255], 0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0xfe,0x01,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -1
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x06,0x03]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], -1, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x82,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xc2,0x03]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0.5, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0xe0,0x01,0x02]
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
+// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xde,0x03]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], -4.0, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0xee,0x01,0x02]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], v2, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x04,0x02,0x02]
+v_mqsad_pk_u16_u8 v[254:255], v[1:2], v2, v[3:4]
+// CHECK: [0xfe,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], v255, 0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0xfe,0x03,0x02]
+v_mqsad_pk_u16_u8 v[5:6], v[254:255], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xfe,0x05,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, -1
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0x05,0x03]
+v_mqsad_pk_u16_u8 v[5:6], s[2:3], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x04,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, 0.5
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0xc1,0x03]
+v_mqsad_pk_u16_u8 v[5:6], s[4:5], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x04,0x04,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, -4.0
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0xdd,0x03]
+v_mqsad_pk_u16_u8 v[5:6], s[100:101], v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x64,0x04,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, v[3:4]
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], flat_scratch, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x66,0x04,0x0e,0x04]
 
-v_mqsad_pk_u16_u8 v[5:6], s[2:3], 0, v[254:255]
-// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x00,0xf9,0x07]
+v_mqsad_pk_u16_u8 v[5:6], vcc, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x6a,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], exec, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x7e,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[252:255], 0, s2, v[3:6]
-// CHECK: [0xfc,0x00,0xe7,0xd1,0x80,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], 0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x80,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], -1, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xc1,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], -1, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xc1,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0.5, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xf0,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], 0.5, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xf0,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], -4.0, s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xf7,0x04,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], -4.0, v2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0xf7,0x04,0x0e,0x04]
 
-v_mqsad_u32_u8 v[5:8], v[1:2], s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x01,0x05,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v255, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xff,0x0f,0x04]
 
-v_mqsad_u32_u8 v[5:8], v[254:255], s2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0xfe,0x05,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], s2, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, s101, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xca,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], s101, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcb,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, flat_scratch_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xcc,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcd,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, flat_scratch_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xce,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcf,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, vcc_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xd4,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], vcc_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd5,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, vcc_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xd6,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], vcc_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd7,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, m0, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xf8,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], m0, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xf9,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, exec_lo, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xfc,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], exec_lo, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xfd,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, exec_hi, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xfe,0x0c,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], exec_hi, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xff,0x0c,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, 0, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x00,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x01,0x0d,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, -1, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x82,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], -1, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x83,0x0d,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, 0.5, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xe0,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0.5, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xe1,0x0d,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, -4.0, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xee,0x0d,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], -4.0, v[3:4]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xef,0x0d,0x04]
 
-v_mqsad_u32_u8 v[5:8], 0, v2, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x04,0x0e,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[254:255]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xfa,0x07]
 
-v_mqsad_u32_u8 v[5:8], 0, v255, v[3:6]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0xfe,0x0f,0x04]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[6:7]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x1a,0x00]
 
-v_mqsad_u32_u8 v[5:8], 0, s2, v[252:255]
-// CHECK: [0x05,0x00,0xe7,0xd1,0x80,0x04,0xf0,0x07]
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[8:9]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x22,0x00]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[100:101]
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x92,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, flat_scratch
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x9a,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, vcc
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xaa,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, exec
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xfa,0x01]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x02,0x02]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -1
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x06,0x03]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xc2,0x03]
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
+// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xde,0x03]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], s[2:3], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x02,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], s[4:5], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x04,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], s[100:101], v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x64,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], flat_scratch, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x66,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], vcc, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x6a,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], exec, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x7e,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], 0, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x80,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], -1, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0xc1,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], 0.5, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0xf0,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], -4.0, v2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0xf7,0x04,0x0e,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], s2, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], s101, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcb,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], flat_scratch_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcd,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], flat_scratch_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcf,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], vcc_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd5,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], vcc_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd7,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], m0, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xf9,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], exec_lo, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xfd,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], exec_hi, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xff,0x0c,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], 0, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x01,0x0d,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], -1, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x83,0x0d,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], 0.5, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xe1,0x0d,0x04]
+
+v_mqsad_u32_u8 v[252:255], v[1:2], -4.0, v[3:6]
+// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xef,0x0d,0x04]
 
 v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0
 // CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x00,0x01,0x02]
Index: test/MC/AMDGPU/regression/bug28168.s
===================================================================
--- test/MC/AMDGPU/regression/bug28168.s
+++ test/MC/AMDGPU/regression/bug28168.s
@@ -1,10 +1,10 @@
 // RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=CI
 // RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=VI
 
-v_mqsad_pk_u16_u8 v[0:1], s[0:1], 1, v[254:255]
-// CI: [0x00,0x00,0xe6,0xd2,0x00,0x02,0xf9,0x07]
-// VI: [0x00,0x00,0xe6,0xd1,0x00,0x02,0xf9,0x07]
+v_mqsad_pk_u16_u8 v[2:3], s[0:1], 1, v[254:255]
+// CI: [0x02,0x00,0xe6,0xd2,0x00,0x02,0xf9,0x07]
+// VI: [0x02,0x00,0xe6,0xd1,0x00,0x02,0xf9,0x07]
 
-v_qsad_pk_u16_u8 v[0:1], v[0:1], 1, s[0:1]
-// CI: [0x00,0x00,0xe4,0xd2,0x00,0x03,0x01,0x00]
-// VI: [0x00,0x00,0xe5,0xd1,0x00,0x03,0x01,0x00]
+v_qsad_pk_u16_u8 v[2:3], v[0:1], 1, s[0:1]
+// CI: [0x02,0x00,0xe4,0xd2,0x00,0x03,0x01,0x00]
+// VI: [0x02,0x00,0xe5,0xd1,0x00,0x03,0x01,0x00]
Index: test/MC/AMDGPU/vop3-errs.s
===================================================================
--- test/MC/AMDGPU/vop3-errs.s
+++ test/MC/AMDGPU/vop3-errs.s
@@ -9,3 +9,27 @@
 
 v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3]
 // CHECK: error: instruction not supported on this GPU
+
+v_mqsad_pk_u16_u8 v[0:1], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[1:2], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[2:3], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[3:4], v[0:1], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[4:5], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[8:9], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
+
+v_mqsad_pk_u16_u8 v[9:10], v[1:2], v9, v[4:5]
+// CHECK: error: destination must must be different than all sources
Index: test/MC/AMDGPU/vop3.s
===================================================================
--- test/MC/AMDGPU/vop3.s
+++ test/MC/AMDGPU/vop3.s
@@ -385,9 +385,9 @@
 // SICI: v_mad_f32 v9, 0.5, v5, -v8      ; encoding: [0x09,0x00,0x82,0xd2,0xf0,0x0a,0x22,0x84]
 // VI:   v_mad_f32 v9, 0.5, v5, -v8      ; encoding: [0x09,0x00,0xc1,0xd1,0xf0,0x0a,0x22,0x84]
 
-v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3]
-// CI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xea,0xd2,0x02,0x08,0x02,0x04]
-// VI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xe7,0xd1,0x02,0x08,0x02,0x04]
+v_mqsad_u32_u8 v[5:8], s[2:3], v4, v[0:3]
+// CI: v_mqsad_u32_u8 v[5:8], s[2:3], v4, v[0:3] ; encoding: [0x05,0x00,0xea,0xd2,0x02,0x08,0x02,0x04]
+// VI: v_mqsad_u32_u8 v[5:8], s[2:3], v4, v[0:3] ; encoding: [0x05,0x00,0xe7,0xd1,0x02,0x08,0x02,0x04]
 // NOSI: error: instruction not supported on this GPU
 
 v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0