Index: llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td
+++ llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td
@@ -19,6 +19,7 @@
 def immZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}]>;
 def immZExt10 : ImmLeaf<i32, [{return isUInt<10>(Imm);}]>;
 def immSExt6 : ImmLeaf<i32, [{return isInt<6>(Imm);}]>;
+def immSExt10 : ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
 
 // Mips-specific dsp nodes
 def SDT_MipsExtr : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<0, 1>,
@@ -851,8 +852,8 @@
 class REPL_QB_DESC : REPL_DESC_BASE<"repl.qb", int_mips_repl_qb, uimm8,
                                     immZExt8, NoItinerary, DSPROpnd>;
 
-class REPL_PH_DESC : REPL_DESC_BASE<"repl.ph", int_mips_repl_ph, uimm10,
-                                    immZExt10, NoItinerary, DSPROpnd>;
+class REPL_PH_DESC : REPL_DESC_BASE<"repl.ph", int_mips_repl_ph, simm10,
+                                    immSExt10, NoItinerary, DSPROpnd>;
 
 class REPLV_QB_DESC : ABSQ_S_PH_R2_DESC_BASE<"replv.qb", int_mips_repl_qb,
                                              NoItinerary, DSPROpnd, GPR32Opnd>;
Index: llvm/trunk/test/CodeGen/Mips/dsp-r1.ll
===================================================================
--- llvm/trunk/test/CodeGen/Mips/dsp-r1.ll
+++ llvm/trunk/test/CodeGen/Mips/dsp-r1.ll
@@ -1172,9 +1172,19 @@
   ret { i32 } %.fca.0.insert
 }
 
+define { i32 } @test__builtin_mips_repl_ph2(i32 %i0) nounwind readnone {
+entry:
+; CHECK: repl.ph
+
+  %0 = tail call <2 x i16> @llvm.mips.repl.ph(i32 -2)
+  %1 = bitcast <2 x i16> %0 to i32
+  %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0
+  ret { i32 } %.fca.0.insert
+}
+
 declare <2 x i16> @llvm.mips.repl.ph(i32) nounwind readnone
 
-define { i32 } @test__builtin_mips_repl_ph2(i32 %i0, i32 %a0) nounwind readnone {
+define { i32 } @test__builtin_mips_repl_ph3(i32 %i0, i32 %a0) nounwind readnone {
 entry:
 ; CHECK: replv.ph
 
Index: llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
===================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
@@ -94,7 +94,7 @@
 0x00 0x01 0x70 0x7c # CHECK: mtlo $1, $ac1
 0x00 0x22 0xf1 0x3c # CHECK: raddu.w.qb $1, $2
 0x00 0x20 0x86 0x7c # CHECK: rddsp $1, 2
-0x02 0x00 0x08 0x3d # CHECK: repl.ph $1, 512
+0x00 0x02 0x08 0x3d # CHECK: repl.ph $1, 2
 0x00 0x30 0x05 0xfc # CHECK: repl.qb $1, 128
 0x00 0x22 0x03 0x3c # CHECK: replv.ph $1, $2
 0x00 0x22 0x13 0x3c # CHECK: replv.qb $1, $2
Index: llvm/trunk/test/MC/Mips/dsp/invalid.s
===================================================================
--- llvm/trunk/test/MC/Mips/dsp/invalid.s
+++ llvm/trunk/test/MC/Mips/dsp/invalid.s
@@ -31,8 +31,8 @@
   shilo $ac1, -64          # CHECK: :[[@LINE]]:15: error: expected 6-bit signed immediate
   repl.qb $2, -1           # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
   repl.qb $2, 256          # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
-  repl.ph $2, -1           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  repl.ph $2, 1024         # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
+  repl.ph $2, -513         # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
+  repl.ph $2, 512          # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
   rddsp $2, -1             # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
   rddsp $2, 1024           # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
   wrdsp $5, -1             # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
Index: llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s
===================================================================
--- llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s
+++ llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s
@@ -1,6 +1,8 @@
 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 -mattr=micromips -mattr=+dsp 2>%t1
 # RUN: FileCheck %s < %t1
 
+  repl.ph $2, -513         # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
+  repl.ph $2, 512          # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
   shll.ph $3, $4, 16       # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
   shll.ph $3, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
   shll_s.ph $3, $4, 16     # CHECK: :[[@LINE]]:21: error: expected 4-bit unsigned immediate
Index: llvm/trunk/test/MC/Mips/micromips-dsp/valid.s
===================================================================
--- llvm/trunk/test/MC/Mips/micromips-dsp/valid.s
+++ llvm/trunk/test/MC/Mips/micromips-dsp/valid.s
@@ -95,7 +95,7 @@
   mtlo $1, $ac1                # CHECK: mtlo $1, $ac1                # encoding: [0x00,0x01,0x70,0x7c]
   raddu.w.qb $1, $2            # CHECK: raddu.w.qb $1, $2       # encoding: [0x00,0x22,0xf1,0x3c]
   rddsp $1, 2                  # CHECK: rddsp $1, 2             # encoding: [0x00,0x20,0x86,0x7c]
-  repl.ph $1, 512              # CHECK: repl.ph $1, 512         # encoding: [0x02,0x00,0x08,0x3d]
+  repl.ph $1, 2                # CHECK: repl.ph $1, 2           # encoding: [0x00,0x02,0x08,0x3d]
   repl.qb $1, 128              # CHECK: repl.qb $1, 128         # encoding: [0x00,0x30,0x05,0xfc]
   replv.ph $1, $2              # CHECK: replv.ph $1, $2         # encoding: [0x00,0x22,0x03,0x3c]
   replv.qb $1, $2              # CHECK: replv.qb $1, $2         # encoding: [0x00,0x22,0x13,0x3c]