Index: llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -2578,7 +2578,9 @@ EVT TheStoreType = ExtendIntegerRetVal ? MVT::i32 : VTs[i]; Chain = DAG.getMemIntrinsicNode(Op, dl, DAG.getVTList(MVT::Other), StoreOperands, TheStoreType, - MachinePointerInfo(), 1); + MachinePointerInfo(), /* Align */ 1, + /* Volatile */ false, /* ReadMem */ false, + /* WriteMem */ true, /* Size */ 0); // Cleanup vector state. StoreOperands.clear(); } Index: llvm/trunk/test/CodeGen/NVPTX/ctlz.ll =================================================================== --- llvm/trunk/test/CodeGen/NVPTX/ctlz.ll +++ llvm/trunk/test/CodeGen/NVPTX/ctlz.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" Index: llvm/trunk/test/CodeGen/NVPTX/ctpop.ll =================================================================== --- llvm/trunk/test/CodeGen/NVPTX/ctpop.ll +++ llvm/trunk/test/CodeGen/NVPTX/ctpop.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" Index: llvm/trunk/test/CodeGen/NVPTX/cttz.ll =================================================================== --- llvm/trunk/test/CodeGen/NVPTX/cttz.ll +++ llvm/trunk/test/CodeGen/NVPTX/cttz.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s - +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"