Index: lib/Target/AMDGPU/AMDGPU.td
===================================================================
--- lib/Target/AMDGPU/AMDGPU.td
+++ lib/Target/AMDGPU/AMDGPU.td
@@ -604,6 +604,8 @@
 
 def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">,
   AssemblerPredicate<"FeatureFlatGlobalInsts">;
+def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
+  AssemblerPredicate<"FeatureFlatScratchInsts">;
 
 def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
   AssemblerPredicate<"Feature16BitInsts">;
Index: lib/Target/AMDGPU/FLATInstructions.td
===================================================================
--- lib/Target/AMDGPU/FLATInstructions.td
+++ lib/Target/AMDGPU/FLATInstructions.td
@@ -442,6 +442,25 @@
 } // End SubtargetPredicate = HasFlatGlobalInsts
 
 
+let SubtargetPredicate = HasFlatScratchInsts in {
+def SCRATCH_LOAD_UBYTE    : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte", VGPR_32>;
+def SCRATCH_LOAD_SBYTE    : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte", VGPR_32>;
+def SCRATCH_LOAD_USHORT   : FLAT_Scratch_Load_Pseudo <"scratch_load_ushort", VGPR_32>;
+def SCRATCH_LOAD_SSHORT   : FLAT_Scratch_Load_Pseudo <"scratch_load_sshort", VGPR_32>;
+def SCRATCH_LOAD_DWORD    : FLAT_Scratch_Load_Pseudo <"scratch_load_dword", VGPR_32>;
+def SCRATCH_LOAD_DWORDX2  : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx2", VReg_64>;
+def SCRATCH_LOAD_DWORDX3  : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx3", VReg_96>;
+def SCRATCH_LOAD_DWORDX4  : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx4", VReg_128>;
+
+def SCRATCH_STORE_BYTE    : FLAT_Scratch_Store_Pseudo <"scratch_store_byte", VGPR_32>;
+def SCRATCH_STORE_SHORT   : FLAT_Scratch_Store_Pseudo <"scratch_store_short", VGPR_32>;
+def SCRATCH_STORE_DWORD   : FLAT_Scratch_Store_Pseudo <"scratch_store_dword", VGPR_32>;
+def SCRATCH_STORE_DWORDX2 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx2", VReg_64>;
+def SCRATCH_STORE_DWORDX3 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx3", VReg_96>;
+def SCRATCH_STORE_DWORDX4 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx4", VReg_128>;
+
+} // End SubtargetPredicate = HasFlatScratchInsts
+
 //===----------------------------------------------------------------------===//
 // Flat Patterns
 //===----------------------------------------------------------------------===//
@@ -817,3 +836,19 @@
 defm GLOBAL_ATOMIC_XOR_X2     : FLAT_Real_Atomics_vi <0x6a, GLOBAL_ATOMIC_XOR_X2>;
 defm GLOBAL_ATOMIC_INC_X2     : FLAT_Real_Atomics_vi <0x6b, GLOBAL_ATOMIC_INC_X2>;
 defm GLOBAL_ATOMIC_DEC_X2     : FLAT_Real_Atomics_vi <0x6c, GLOBAL_ATOMIC_DEC_X2>;
+
+def SCRATCH_LOAD_UBYTE_vi : FLAT_Real_vi <0x10, SCRATCH_LOAD_UBYTE>;
+def SCRATCH_LOAD_SBYTE_vi : FLAT_Real_vi <0x11, SCRATCH_LOAD_SBYTE>;
+def SCRATCH_LOAD_USHORT_vi : FLAT_Real_vi <0x12, SCRATCH_LOAD_USHORT>;
+def SCRATCH_LOAD_SSHORT_vi : FLAT_Real_vi <0x13, SCRATCH_LOAD_SSHORT>;
+def SCRATCH_LOAD_DWORD_vi : FLAT_Real_vi <0x14, SCRATCH_LOAD_DWORD>;
+def SCRATCH_LOAD_DWORDX2_vi : FLAT_Real_vi <0x15, SCRATCH_LOAD_DWORDX2>;
+def SCRATCH_LOAD_DWORDX4_vi : FLAT_Real_vi <0x17, SCRATCH_LOAD_DWORDX4>;
+def SCRATCH_LOAD_DWORDX3_vi : FLAT_Real_vi <0x16, SCRATCH_LOAD_DWORDX3>;
+
+def SCRATCH_STORE_BYTE_vi : FLAT_Real_vi <0x18, SCRATCH_STORE_BYTE>;
+def SCRATCH_STORE_SHORT_vi : FLAT_Real_vi <0x1a, SCRATCH_STORE_SHORT>;
+def SCRATCH_STORE_DWORD_vi : FLAT_Real_vi <0x1c, SCRATCH_STORE_DWORD>;
+def SCRATCH_STORE_DWORDX2_vi : FLAT_Real_vi <0x1d, SCRATCH_STORE_DWORDX2>;
+def SCRATCH_STORE_DWORDX4_vi : FLAT_Real_vi <0x1f, SCRATCH_STORE_DWORDX4>;
+def SCRATCH_STORE_DWORDX3_vi : FLAT_Real_vi <0x1e, SCRATCH_STORE_DWORDX3>;
Index: test/MC/AMDGPU/flat-scratch-instructions.s
===================================================================
--- /dev/null
+++ test/MC/AMDGPU/flat-scratch-instructions.s
@@ -0,0 +1,87 @@
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding 2>&1 %s | FileCheck -check-prefix=GFX9-ERR -check-prefix=GCNERR %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
+
+scratch_load_ubyte v1, v[3:4]
+// GFX9: scratch_load_ubyte v1, v[3:4]      ; encoding: [0x00,0x40,0x40,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_sbyte v1, v[3:4]
+// GFX9: scratch_load_sbyte v1, v[3:4]      ; encoding: [0x00,0x40,0x44,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_ushort v1, v[3:4]
+// GFX9: scratch_load_ushort v1, v[3:4]      ; encoding: [0x00,0x40,0x48,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_sshort v1, v[3:4]
+// GFX9: scratch_load_sshort v1, v[3:4]      ; encoding: [0x00,0x40,0x4c,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_dword v1, v[3:4]
+// GFX9: scratch_load_dword v1, v[3:4]      ; encoding: [0x00,0x40,0x50,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_dwordx2 v[1:2], v[3:4]
+// GFX9: scratch_load_dwordx2 v[1:2], v[3:4]      ; encoding: [0x00,0x40,0x54,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_dwordx3 v[1:3], v[3:4]
+// GFX9: scratch_load_dwordx3 v[1:3], v[3:4]      ; encoding: [0x00,0x40,0x58,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_load_dwordx4 v[1:4], v[3:4]
+// GFX9: scratch_load_dwordx4 v[1:4], v[3:4]      ; encoding: [0x00,0x40,0x5c,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: instruction not supported on this GPU
+// FIXME: VI error should be instruction nto supported
+scratch_load_dword v1, v[3:4] offset:0
+// GFX9: scratch_load_dword v1, v[3:4]      ; encoding: [0x00,0x40,0x50,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: :37: error: not a valid operand.
+
+scratch_load_dword v1, v[3:4] offset:4095
+// GFX9: scratch_load_dword v1, v[3:4] offset:4095 ; encoding: [0xff,0x4f,0x50,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: error: not a valid operand.
+
+scratch_load_dword v1, v[3:4] offset:-1
+// GFX9: scratch_load_dword v1, v[3:4] offset:-1 ; encoding: [0xff,0x5f,0x50,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: error: not a valid operand.
+
+scratch_load_dword v1, v[3:4] offset:-4096
+// GFX9: scratch_load_dword v1, v[3:4] offset:-4096 ; encoding: [0x00,0x50,0x50,0xdc,0x03,0x00,0x00,0x01]
+// VI-ERR: error: not a valid operand.
+
+scratch_load_dword v1, v[3:4] offset:4096
+// GFX9-ERR: error: invalid operand for instruction
+// VI-ERR: error: not a valid operand.
+
+scratch_load_dword v1, v[3:4] offset:-4097
+// GFX9-ERR: :31: error: invalid operand for instruction
+// VI-ERR: error: not a valid operand.
+
+scratch_store_byte v[3:4], v1
+// GFX9: scratch_store_byte v[3:4], v1 ; encoding: [0x00,0x40,0x60,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_store_short v[3:4], v1
+// GFX9: scratch_store_short v[3:4], v1 ; encoding: [0x00,0x40,0x68,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_store_dword v[3:4], v1
+// GFX9: scratch_store_dword v[3:4], v1 ; encoding: [0x00,0x40,0x70,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_store_dwordx2 v[3:4], v[1:2]
+// GFX9: scratch_store_dwordx2 v[3:4], v[1:2] ; encoding: [0x00,0x40,0x74,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_store_dwordx3 v[3:4], v[1:3]
+// GFX9: scratch_store_dwordx3 v[3:4], v[1:3] ; encoding: [0x00,0x40,0x78,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_store_dwordx4 v[3:4], v[1:4]
+// GFX9: scratch_store_dwordx4 v[3:4], v[1:4] ; encoding: [0x00,0x40,0x7c,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: instruction not supported on this GPU
+
+scratch_store_dword v[3:4], v1 offset:12
+// GFX9: scratch_store_dword v[3:4], v1 offset:12 ; encoding: [0x0c,0x40,0x70,0xdc,0x03,0x01,0x00,0x00]
+// VI-ERR: error: not a valid operand