Index: lib/Target/ARM/ARMInstrInfo.td =================================================================== --- lib/Target/ARM/ARMInstrInfo.td +++ lib/Target/ARM/ARMInstrInfo.td @@ -2221,7 +2221,7 @@ let Inst{11-0} = label{11-0}; } -let hasSideEffects = 0, isReMaterializable = 1 in +let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in def LEApcrel : ARMPseudoInst<(outs GPR:$Rd), (ins i32imm:$label, pred:$p), 4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>; Index: lib/Target/ARM/ARMInstrThumb.td =================================================================== --- lib/Target/ARM/ARMInstrThumb.td +++ lib/Target/ARM/ARMInstrThumb.td @@ -1402,7 +1402,7 @@ let DecoderMethod = "DecodeThumbAddSpecialReg"; } -let hasSideEffects = 0, isReMaterializable = 1 in +let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in def tLEApcrel : tPseudoInst<(outs tGPR:$Rd), (ins i32imm:$label, pred:$p), 2, IIC_iALUi, []>, Sched<[WriteALU]>; Index: lib/Target/ARM/ARMInstrThumb2.td =================================================================== --- lib/Target/ARM/ARMInstrThumb2.td +++ lib/Target/ARM/ARMInstrThumb2.td @@ -1227,7 +1227,7 @@ let DecoderMethod = "DecodeT2Adr"; } -let hasSideEffects = 0, isReMaterializable = 1 in +let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in def t2LEApcrel : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p), 4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>; let hasSideEffects = 1 in Index: test/CodeGen/ARM/adr-remat.ll =================================================================== --- /dev/null +++ test/CodeGen/ARM/adr-remat.ll @@ -0,0 +1,25 @@ +; RUN: llc -mtriple=armv7a %s -o - | FileCheck %s +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s +; RUN: llc -mtriple=thumbv6m %s -o - | FileCheck %s + +@str.1 = private unnamed_addr constant [58 x i8] c"+-------------------------------------------------------+\00" +@str.2 = private unnamed_addr constant [58 x i8] c"| |\00" + +declare i32 @puts(i8* nocapture readonly) + +; Check that we rematerialize the adr of str.1 instead of doing one adr and two +; movs. + +; CHECK: adr r0, [[STR1:.LCPI[0-9]+_[0-9]+]] +; CHECK: bl puts +; CHECK: adr r0, {{.LCPI[0-9]+_[0-9]+}} +; CHECK: bl puts +; CHECK: adr r0, [[STR1]] +; CHECK: b{{l?}} puts +define void @fn() { +entry: + %puts1 = tail call i32 @puts(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @str.1, i32 0, i32 0)) + %puts2 = tail call i32 @puts(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @str.2, i32 0, i32 0)) + %puts3 = tail call i32 @puts(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @str.1, i32 0, i32 0)) + ret void +} Index: test/CodeGen/ARM/align-sp-adjustment.ll =================================================================== --- test/CodeGen/ARM/align-sp-adjustment.ll +++ test/CodeGen/ARM/align-sp-adjustment.ll @@ -1,6 +1,10 @@ ; RUN: llc -mtriple=thumbv7 -o - %s | FileCheck %s -; CHECK: [sp, #2120] +; p5 will have been pushed to the stack. Check that it's correctly aligned by +; looking at the offset of the instruction that loads it. Note that this is +; very fragile and this test may need to be updated if we happen to spill more +; or less to the stack. +; CHECK: ldr{{(.w)?}} r{{[0-9]+}}, [sp, #2104] %struct.struct_2 = type { [172 x %struct.struct_1] } %struct.struct_1 = type { i32, i32, i32 }