Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -366,6 +366,7 @@ { "fixup_MICROMIPS_TLS_LDM", 0, 16, 0 }, { "fixup_MICROMIPS_TLS_DTPREL_HI16", 0, 16, 0 }, { "fixup_MICROMIPS_TLS_DTPREL_LO16", 0, 16, 0 }, + { "fixup_MICROMIPS_GOTTPREL", 0, 16, 0 }, { "fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 }, { "fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 }, { "fixup_Mips_SUB", 0, 64, 0 }, @@ -437,6 +438,7 @@ { "fixup_MICROMIPS_TLS_LDM", 16, 16, 0 }, { "fixup_MICROMIPS_TLS_DTPREL_HI16", 16, 16, 0 }, { "fixup_MICROMIPS_TLS_DTPREL_LO16", 16, 16, 0 }, + { "fixup_MICROMIPS_GOTTPREL", 16, 16, 0 }, { "fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 }, { "fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 }, { "fixup_Mips_SUB", 0, 64, 0 }, Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -374,6 +374,8 @@ return ELF::R_MICROMIPS_TLS_DTPREL_HI16; case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16: return ELF::R_MICROMIPS_TLS_DTPREL_LO16; + case Mips::fixup_MICROMIPS_GOTTPREL: + return ELF::R_MICROMIPS_TLS_GOTTPREL; case Mips::fixup_MICROMIPS_TLS_TPREL_HI16: return ELF::R_MICROMIPS_TLS_TPREL_HI16; case Mips::fixup_MICROMIPS_TLS_TPREL_LO16: Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h @@ -203,6 +203,9 @@ // resulting in - R_MICROMIPS_TLS_DTPREL_LO16 fixup_MICROMIPS_TLS_DTPREL_LO16, + // resulting in - R_MICROMIPS_TLS_GOTTPREL. + fixup_MICROMIPS_GOTTPREL, + // resulting in - R_MICROMIPS_TLS_TPREL_HI16 fixup_MICROMIPS_TLS_TPREL_HI16, Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -669,7 +669,8 @@ : Mips::fixup_Mips_DTPREL_LO; break; case MipsMCExpr::MEK_GOTTPREL: - FixupKind = Mips::fixup_Mips_GOTTPREL; + FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOTTPREL + : Mips::fixup_Mips_GOTTPREL; break; case MipsMCExpr::MEK_GOT: FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOT16 Index: llvm/trunk/test/MC/Mips/relocation.s =================================================================== --- llvm/trunk/test/MC/Mips/relocation.s +++ llvm/trunk/test/MC/Mips/relocation.s @@ -318,7 +318,7 @@ // ENCLE: addiu $2, $2, %lo(bar) # encoding: [0x42'A',0x30'A',0x00,0x00] // FIXUP: # fixup A - offset: 0, value: %lo(bar), kind: fixup_MICROMIPS_LO16 -// DATA-NEXT: 0010: 30430000 30420004 30430001 30420030 +// DATA-NEXT: 0010: 30430000 30420004 30430001 30420034 addiu $2, $3, %got(baz) // RELOC: R_MICROMIPS_GOT16 .text // ENCBE: addiu $2, $3, %got(baz) # encoding: [0x30,0x43,A,A] // The placement of the 'A' annotations is incorrect. They use 32-bit little endian instead of 2x 16-bit little endian. @@ -377,5 +377,11 @@ // ENCLE: addiu $2, $2, %lo(bar) # encoding: [0x42'A',0x30'A',0x00,0x00] // FIXUP: # fixup A - offset: 0, value: %lo(bar), kind: fixup_MICROMIPS_LO16 +// DATA-NEXT: 0040: 30430000 00000000 00000000 00000000 + addiu $2, $3, %gottprel(foo) // RELOC: R_MICROMIPS_TLS_GOTTPREL foo + // ENCBE: addiu $2, $3, %gottprel(foo) # encoding: [0x30,0x43,A,A] + // ENCLE: addiu $2, $3, %gottprel(foo) # encoding: [0x43'A',0x30'A',0x00,0x00] + // FIXUP: # fixup A - offset: 0, value: %gottprel(foo), kind: fixup_MICROMIPS_GOTTPREL + .space 65520, 0 long_mm: