Index: include/llvm/Target/TargetLowering.h
===================================================================
--- include/llvm/Target/TargetLowering.h
+++ include/llvm/Target/TargetLowering.h
@@ -2811,6 +2811,12 @@
     return false;
   }
 
+  /// Return true if it should be assumed this will be emitted as a call, not a
+  /// tail call or special instruction.
+  virtual bool shouldAssumeEmittedAsCall(ImmutableCallSite CS) const {
+    return false;
+  }
+
   /// Return the builtin name for the __builtin___clear_cache intrinsic
   /// Default is to invoke the clear cache library call
   virtual const char * getClearCacheBuiltinName() const {
Index: lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -190,6 +190,8 @@
                 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
             }
           }
+        } else if (TLI->shouldAssumeEmittedAsCall(CS)) {
+          MF->getFrameInfo().setHasCalls(true);
         }
       }
 
Index: lib/Target/AMDGPU/SIISelLowering.h
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.h
+++ lib/Target/AMDGPU/SIISelLowering.h
@@ -132,6 +132,8 @@
 
   const SISubtarget *getSubtarget() const;
 
+  bool shouldAssumeEmittedAsCall(ImmutableCallSite CS) const override;
+
   bool isShuffleMaskLegal(const SmallVectorImpl<int> &/*Mask*/,
                           EVT /*VT*/) const override;
 
Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -512,6 +512,11 @@
 // TargetLowering queries
 //===----------------------------------------------------------------------===//
 
+bool SITargetLowering::shouldAssumeEmittedAsCall(ImmutableCallSite CS) const {
+  const Function *F = CS.getCalledFunction();
+  return !F || !F->isIntrinsic();
+}
+
 bool SITargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &,
                                           EVT) const {
   // SI has some legal vector types, but no legal vector operations. Say no