Index: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp =================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1305,7 +1305,8 @@ // If we're in the middle of scheduling a call, don't begin scheduling // another call. Also, don't allow any physical registers to be live across // the call. - if (Node->getMachineOpcode() == (unsigned)TII->getCallFrameDestroyOpcode()) { + if ((Node->getMachineOpcode() == TII->getCallFrameDestroyOpcode()) || + (Node->getMachineOpcode() == TII->getCallFrameSetupOpcode())) { // Check the special calling-sequence resource. unsigned CallResource = TRI->getNumRegs(); if (LiveRegDefs[CallResource]) { Index: llvm/trunk/test/CodeGen/ARM/unschedule-first-call.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/unschedule-first-call.ll +++ llvm/trunk/test/CodeGen/ARM/unschedule-first-call.ll @@ -0,0 +1,136 @@ +; RUN: llc < %s +; PR30911 + +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" +target triple = "armv6kz--linux-gnueabihf" + +; Function Attrs: nounwind +define void @dradbg(i32, i32, float*, float*, float*, float*, float*) #0 { + br i1 undef, label %.critedge, label %8 + +.critedge: ; preds = %7 + %.mux2 = select i1 undef, i1 undef, i1 true + br label %8 + +;