Index: include/llvm/IR/IntrinsicsX86.td =================================================================== --- include/llvm/IR/IntrinsicsX86.td +++ include/llvm/IR/IntrinsicsX86.td @@ -3870,34 +3870,6 @@ def int_x86_avx512_cvtq2mask_512 : GCCBuiltin<"__builtin_ia32_cvtq2mask512">, Intrinsic<[llvm_i8_ty], [llvm_v8i64_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2b_128 : GCCBuiltin<"__builtin_ia32_cvtmask2b128">, - Intrinsic<[llvm_v16i8_ty], [llvm_i16_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2b_256 : GCCBuiltin<"__builtin_ia32_cvtmask2b256">, - Intrinsic<[llvm_v32i8_ty], [llvm_i32_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2b_512 : GCCBuiltin<"__builtin_ia32_cvtmask2b512">, - Intrinsic<[llvm_v64i8_ty], [llvm_i64_ty], [IntrNoMem]>; - - def int_x86_avx512_cvtmask2w_128 : GCCBuiltin<"__builtin_ia32_cvtmask2w128">, - Intrinsic<[llvm_v8i16_ty], [llvm_i8_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2w_256 : GCCBuiltin<"__builtin_ia32_cvtmask2w256">, - Intrinsic<[llvm_v16i16_ty], [llvm_i16_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2w_512 : GCCBuiltin<"__builtin_ia32_cvtmask2w512">, - Intrinsic<[llvm_v32i16_ty], [llvm_i32_ty], [IntrNoMem]>; - - def int_x86_avx512_cvtmask2d_128 : GCCBuiltin<"__builtin_ia32_cvtmask2d128">, - Intrinsic<[llvm_v4i32_ty], [llvm_i8_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2d_256 : GCCBuiltin<"__builtin_ia32_cvtmask2d256">, - Intrinsic<[llvm_v8i32_ty], [llvm_i8_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2d_512 : GCCBuiltin<"__builtin_ia32_cvtmask2d512">, - Intrinsic<[llvm_v16i32_ty], [llvm_i16_ty], [IntrNoMem]>; - - def int_x86_avx512_cvtmask2q_128 : GCCBuiltin<"__builtin_ia32_cvtmask2q128">, - Intrinsic<[llvm_v2i64_ty], [llvm_i8_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2q_256 : GCCBuiltin<"__builtin_ia32_cvtmask2q256">, - Intrinsic<[llvm_v4i64_ty], [llvm_i8_ty], [IntrNoMem]>; - def int_x86_avx512_cvtmask2q_512 : GCCBuiltin<"__builtin_ia32_cvtmask2q512">, - Intrinsic<[llvm_v8i64_ty], [llvm_i8_ty], [IntrNoMem]>; - } // Pack ops. Index: lib/IR/AutoUpgrade.cpp =================================================================== --- lib/IR/AutoUpgrade.cpp +++ lib/IR/AutoUpgrade.cpp @@ -234,6 +234,7 @@ Name == "xop.vpcmov" || // Added in 3.8 Name == "xop.vpcmov.256" || // Added in 5.0 Name.startswith("avx512.mask.move.s") || // Added in 4.0 + Name.startswith("avx512.cvtmask2") || (Name.startswith("xop.vpcom") && // Added in 3.2 F->arg_size() == 2)) return true; @@ -786,6 +787,25 @@ return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); } +static Value *X86getMaskVecValue(IRBuilder<> &Builder, Value *Mask, + unsigned NumElts) { + llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), + cast(Mask->getType())->getBitWidth()); + Value *MaskVec = Builder.CreateBitCast(Mask, MaskTy); + + // If we have less than 8 elements, then the starting mask was an i8 and + // we need to extract down to the right number of elements. + if (NumElts < 8) { + SmallVector Indices; + for (unsigned i = 0; i != NumElts; ++i) + Indices.push_back(i); + MaskVec = Builder.CreateShuffleVector(MaskVec, MaskVec, + makeArrayRef(Indices), "extract"); + } + return MaskVec; +} + + static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { Value* A = CI.getArgOperand(0); Value* B = CI.getArgOperand(1); @@ -800,6 +820,15 @@ return Builder.CreateInsertElement(A, Select, (uint64_t)0); } + +static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { + Value* Op = CI.getArgOperand(0); + Type* ReturnOp = CI.getType(); + unsigned NumElts = CI.getType()->getVectorNumElements(); + Value *Mask = X86getMaskVecValue(Builder, Op, NumElts); + return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); +} + /// Upgrade a call to an old intrinsic. All argument and return casting must be /// provided to seamlessly integrate with existing context. void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { @@ -1836,6 +1865,8 @@ Rep = UpgradeX86MaskedShift(Builder, *CI, IID); } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { Rep = upgradeMaskedMove(Builder, *CI); + } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { + Rep = UpgradeMaskToInt(Builder, *CI); } else if (IsX86 && Name.startswith("avx512.mask.vpermilvar.")) { Intrinsic::ID IID; if (Name.endswith("ps.128")) Index: lib/Target/X86/X86IntrinsicsInfo.h =================================================================== --- lib/Target/X86/X86IntrinsicsInfo.h +++ lib/Target/X86/X86IntrinsicsInfo.h @@ -440,18 +440,6 @@ X86_INTRINSIC_DATA(avx512_cvtd2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0), X86_INTRINSIC_DATA(avx512_cvtd2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0), X86_INTRINSIC_DATA(avx512_cvtd2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2b_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2b_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2b_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2d_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2d_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2d_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2q_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2q_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2q_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2w_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2w_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), - X86_INTRINSIC_DATA(avx512_cvtmask2w_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0), X86_INTRINSIC_DATA(avx512_cvtq2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0), X86_INTRINSIC_DATA(avx512_cvtq2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0), X86_INTRINSIC_DATA(avx512_cvtq2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0), Index: test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll =================================================================== --- test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll +++ test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll @@ -992,6 +992,42 @@ ret <64 x i8> %res2 } + +declare <64 x i8> @llvm.x86.avx512.cvtmask2b.512(i64) + +define <64 x i8>@test_int_x86_avx512_cvtmask2b_512(i64 %x0) { +; AVX512BW-LABEL: test_int_x86_avx512_cvtmask2b_512: +; AVX512BW: ## BB#0: +; AVX512BW-NEXT: kmovq %rdi, %k0 +; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 +; AVX512BW-NEXT: retq +; +; AVX512F-32-LABEL: test_int_x86_avx512_cvtmask2b_512: +; AVX512F-32: # BB#0: +; AVX512F-32-NEXT: kmovq {{[0-9]+}}(%esp), %k0 +; AVX512F-32-NEXT: vpmovm2b %k0, %zmm0 +; AVX512F-32-NEXT: retl + %res = call <64 x i8> @llvm.x86.avx512.cvtmask2b.512(i64 %x0) + ret <64 x i8> %res +} + +declare <32 x i16> @llvm.x86.avx512.cvtmask2w.512(i32) + +define <32 x i16>@test_int_x86_avx512_cvtmask2w_512(i32 %x0) { +; AVX512BW-LABEL: test_int_x86_avx512_cvtmask2w_512: +; AVX512BW: ## BB#0: +; AVX512BW-NEXT: kmovd %edi, %k0 +; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 +; AVX512BW-NEXT: retq +; +; AVX512F-32-LABEL: test_int_x86_avx512_cvtmask2w_512: +; AVX512F-32: # BB#0: +; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0 +; AVX512F-32-NEXT: vpmovm2w %k0, %zmm0 +; AVX512F-32-NEXT: retl + %res = call <32 x i16> @llvm.x86.avx512.cvtmask2w.512(i32 %x0) + ret <32 x i16> %res +} define <32 x i16> @test_mask_packs_epi32_rr_512(<16 x i32> %a, <16 x i32> %b) { ; AVX512BW-LABEL: test_mask_packs_epi32_rr_512: ; AVX512BW: ## BB#0: Index: test/CodeGen/X86/avx512bw-intrinsics.ll =================================================================== --- test/CodeGen/X86/avx512bw-intrinsics.ll +++ test/CodeGen/X86/avx512bw-intrinsics.ll @@ -2295,44 +2295,6 @@ ret i32 %res } -declare <64 x i8> @llvm.x86.avx512.cvtmask2b.512(i64) - -define <64 x i8>@test_int_x86_avx512_cvtmask2b_512(i64 %x0) { -; AVX512BW-LABEL: test_int_x86_avx512_cvtmask2b_512: -; AVX512BW: ## BB#0: -; AVX512BW-NEXT: kmovq %rdi, %k0 -; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 -; AVX512BW-NEXT: retq -; -; AVX512F-32-LABEL: test_int_x86_avx512_cvtmask2b_512: -; AVX512F-32: # BB#0: -; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0 -; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1 -; AVX512F-32-NEXT: kunpckdq %k0, %k1, %k0 -; AVX512F-32-NEXT: vpmovm2b %k0, %zmm0 -; AVX512F-32-NEXT: retl - %res = call <64 x i8> @llvm.x86.avx512.cvtmask2b.512(i64 %x0) - ret <64 x i8> %res -} - -declare <32 x i16> @llvm.x86.avx512.cvtmask2w.512(i32) - -define <32 x i16>@test_int_x86_avx512_cvtmask2w_512(i32 %x0) { -; AVX512BW-LABEL: test_int_x86_avx512_cvtmask2w_512: -; AVX512BW: ## BB#0: -; AVX512BW-NEXT: kmovd %edi, %k0 -; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 -; AVX512BW-NEXT: retq -; -; AVX512F-32-LABEL: test_int_x86_avx512_cvtmask2w_512: -; AVX512F-32: # BB#0: -; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0 -; AVX512F-32-NEXT: vpmovm2w %k0, %zmm0 -; AVX512F-32-NEXT: retl - %res = call <32 x i16> @llvm.x86.avx512.cvtmask2w.512(i32 %x0) - ret <32 x i16> %res -} - declare <32 x i16> @llvm.x86.avx512.mask.psrlv32hi(<32 x i16>, <32 x i16>, <32 x i16>, i32) define <32 x i16>@test_int_x86_avx512_mask_psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) { Index: test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll =================================================================== --- test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll +++ test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll @@ -1863,6 +1863,54 @@ ret <4 x i64> %res4 } + +declare <16 x i8> @llvm.x86.avx512.cvtmask2b.128(i16) + +define <16 x i8>@test_int_x86_avx512_cvtmask2b_128(i16 %x0) { +; CHECK-LABEL: test_int_x86_avx512_cvtmask2b_128: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7] +; CHECK-NEXT: vpmovm2b %k0, %xmm0 ## encoding: [0x62,0xf2,0x7e,0x08,0x28,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] + %res = call <16 x i8> @llvm.x86.avx512.cvtmask2b.128(i16 %x0) + ret <16 x i8> %res +} + +declare <32 x i8> @llvm.x86.avx512.cvtmask2b.256(i32) + +define <32 x i8>@test_int_x86_avx512_cvtmask2b_256(i32 %x0) { +; CHECK-LABEL: test_int_x86_avx512_cvtmask2b_256: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovd %edi, %k0 ## encoding: [0xc5,0xfb,0x92,0xc7] +; CHECK-NEXT: vpmovm2b %k0, %ymm0 ## encoding: [0x62,0xf2,0x7e,0x28,0x28,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] + %res = call <32 x i8> @llvm.x86.avx512.cvtmask2b.256(i32 %x0) + ret <32 x i8> %res +} + +declare <8 x i16> @llvm.x86.avx512.cvtmask2w.128(i8) + +define <8 x i16>@test_int_x86_avx512_cvtmask2w_128(i8 %x0) { +; CHECK-LABEL: test_int_x86_avx512_cvtmask2w_128: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7] +; CHECK-NEXT: vpmovm2w %k0, %xmm0 ## encoding: [0x62,0xf2,0xfe,0x08,0x28,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] + %res = call <8 x i16> @llvm.x86.avx512.cvtmask2w.128(i8 %x0) + ret <8 x i16> %res +} + +declare <16 x i16> @llvm.x86.avx512.cvtmask2w.256(i16) + +define <16 x i16>@test_int_x86_avx512_cvtmask2w_256(i16 %x0) { +; CHECK-LABEL: test_int_x86_avx512_cvtmask2w_256: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7] +; CHECK-NEXT: vpmovm2w %k0, %ymm0 ## encoding: [0x62,0xf2,0xfe,0x28,0x28,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] + %res = call <16 x i16> @llvm.x86.avx512.cvtmask2w.256(i16 %x0) + ret <16 x i16> %res +} define <8 x i16> @test_mask_packs_epi32_rr_128(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_mask_packs_epi32_rr_128: ; CHECK: ## BB#0: Index: test/CodeGen/X86/avx512bwvl-intrinsics.ll =================================================================== --- test/CodeGen/X86/avx512bwvl-intrinsics.ll +++ test/CodeGen/X86/avx512bwvl-intrinsics.ll @@ -3356,54 +3356,6 @@ ret i16 %res } -declare <16 x i8> @llvm.x86.avx512.cvtmask2b.128(i16) - -define <16 x i8>@test_int_x86_avx512_cvtmask2b_128(i16 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2b_128: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7] -; CHECK-NEXT: vpmovm2b %k0, %xmm0 ## encoding: [0x62,0xf2,0x7e,0x08,0x28,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.avx512.cvtmask2b.128(i16 %x0) - ret <16 x i8> %res -} - -declare <32 x i8> @llvm.x86.avx512.cvtmask2b.256(i32) - -define <32 x i8>@test_int_x86_avx512_cvtmask2b_256(i32 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2b_256: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovd %edi, %k0 ## encoding: [0xc5,0xfb,0x92,0xc7] -; CHECK-NEXT: vpmovm2b %k0, %ymm0 ## encoding: [0x62,0xf2,0x7e,0x28,0x28,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <32 x i8> @llvm.x86.avx512.cvtmask2b.256(i32 %x0) - ret <32 x i8> %res -} - -declare <8 x i16> @llvm.x86.avx512.cvtmask2w.128(i8) - -define <8 x i16>@test_int_x86_avx512_cvtmask2w_128(i8 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2w_128: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7] -; CHECK-NEXT: vpmovm2w %k0, %xmm0 ## encoding: [0x62,0xf2,0xfe,0x08,0x28,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.avx512.cvtmask2w.128(i8 %x0) - ret <8 x i16> %res -} - -declare <16 x i16> @llvm.x86.avx512.cvtmask2w.256(i16) - -define <16 x i16>@test_int_x86_avx512_cvtmask2w_256(i16 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2w_256: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7] -; CHECK-NEXT: vpmovm2w %k0, %ymm0 ## encoding: [0x62,0xf2,0xfe,0x28,0x28,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <16 x i16> @llvm.x86.avx512.cvtmask2w.256(i16 %x0) - ret <16 x i16> %res -} - declare <16 x i16> @llvm.x86.avx512.mask.psrlv16.hi(<16 x i16>, <16 x i16>, <16 x i16>, i16) define <16 x i16>@test_int_x86_avx512_mask_psrlv16_hi(<16 x i16> %x0, <16 x i16> %x1, <16 x i16> %x2, i16 %x3) { Index: test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll =================================================================== --- test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll +++ test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll @@ -131,3 +131,28 @@ %res4 = add <8 x i64> %res2, %res3 ret <8 x i64> %res4 } + + +declare <16 x i32> @llvm.x86.avx512.cvtmask2d.512(i16) + +define <16 x i32>@test_int_x86_avx512_cvtmask2d_512(i16 %x0) { +; CHECK-LABEL: test_int_x86_avx512_cvtmask2d_512: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovw %edi, %k0 +; CHECK-NEXT: vpmovm2d %k0, %zmm0 +; CHECK-NEXT: retq + %res = call <16 x i32> @llvm.x86.avx512.cvtmask2d.512(i16 %x0) + ret <16 x i32> %res +} + +declare <8 x i64> @llvm.x86.avx512.cvtmask2q.512(i8) + +define <8 x i64>@test_int_x86_avx512_cvtmask2q_512(i8 %x0) { +; CHECK-LABEL: test_int_x86_avx512_cvtmask2q_512: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovb %edi, %k0 +; CHECK-NEXT: vpmovm2q %k0, %zmm0 +; CHECK-NEXT: retq + %res = call <8 x i64> @llvm.x86.avx512.cvtmask2q.512(i8 %x0) + ret <8 x i64> %res +} Index: test/CodeGen/X86/avx512dq-intrinsics.ll =================================================================== --- test/CodeGen/X86/avx512dq-intrinsics.ll +++ test/CodeGen/X86/avx512dq-intrinsics.ll @@ -469,30 +469,6 @@ ret i8 %res } -declare <16 x i32> @llvm.x86.avx512.cvtmask2d.512(i16) - -define <16 x i32>@test_int_x86_avx512_cvtmask2d_512(i16 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2d_512: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovw %edi, %k0 -; CHECK-NEXT: vpmovm2d %k0, %zmm0 -; CHECK-NEXT: retq - %res = call <16 x i32> @llvm.x86.avx512.cvtmask2d.512(i16 %x0) - ret <16 x i32> %res -} - -declare <8 x i64> @llvm.x86.avx512.cvtmask2q.512(i8) - -define <8 x i64>@test_int_x86_avx512_cvtmask2q_512(i8 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2q_512: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovb %edi, %k0 -; CHECK-NEXT: vpmovm2q %k0, %zmm0 -; CHECK-NEXT: retq - %res = call <8 x i64> @llvm.x86.avx512.cvtmask2q.512(i8 %x0) - ret <8 x i64> %res -} - declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float>, <16 x float>, i16) define <16 x float>@test_int_x86_avx512_mask_broadcastf32x8_512(<8 x float> %x0, <16 x float> %x2, i16 %mask) { Index: test/CodeGen/X86/avx512dqvl-intrinsics.ll =================================================================== --- test/CodeGen/X86/avx512dqvl-intrinsics.ll +++ test/CodeGen/X86/avx512dqvl-intrinsics.ll @@ -736,54 +736,6 @@ ret i8 %res } -declare <4 x i32> @llvm.x86.avx512.cvtmask2d.128(i8) - -define <4 x i32>@test_int_x86_avx512_cvtmask2d_128(i8 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2d_128: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovb %edi, %k0 ## encoding: [0xc5,0xf9,0x92,0xc7] -; CHECK-NEXT: vpmovm2d %k0, %xmm0 ## encoding: [0x62,0xf2,0x7e,0x08,0x38,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.avx512.cvtmask2d.128(i8 %x0) - ret <4 x i32> %res -} - -declare <8 x i32> @llvm.x86.avx512.cvtmask2d.256(i8) - -define <8 x i32>@test_int_x86_avx512_cvtmask2d_256(i8 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovb %edi, %k0 ## encoding: [0xc5,0xf9,0x92,0xc7] -; CHECK-NEXT: vpmovm2d %k0, %ymm0 ## encoding: [0x62,0xf2,0x7e,0x28,0x38,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <8 x i32> @llvm.x86.avx512.cvtmask2d.256(i8 %x0) - ret <8 x i32> %res -} - -declare <2 x i64> @llvm.x86.avx512.cvtmask2q.128(i8) - -define <2 x i64>@test_int_x86_avx512_cvtmask2q_128(i8 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2q_128: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovb %edi, %k0 ## encoding: [0xc5,0xf9,0x92,0xc7] -; CHECK-NEXT: vpmovm2q %k0, %xmm0 ## encoding: [0x62,0xf2,0xfe,0x08,0x38,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.avx512.cvtmask2q.128(i8 %x0) - ret <2 x i64> %res -} - -declare <4 x i64> @llvm.x86.avx512.cvtmask2q.256(i8) - -define <4 x i64>@test_int_x86_avx512_cvtmask2q_256(i8 %x0) { -; CHECK-LABEL: test_int_x86_avx512_cvtmask2q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: kmovb %edi, %k0 ## encoding: [0xc5,0xf9,0x92,0xc7] -; CHECK-NEXT: vpmovm2q %k0, %ymm0 ## encoding: [0x62,0xf2,0xfe,0x28,0x38,0xc0] -; CHECK-NEXT: retq ## encoding: [0xc3] - %res = call <4 x i64> @llvm.x86.avx512.cvtmask2q.256(i8 %x0) - ret <4 x i64> %res -} - declare <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double>, <4 x double>, i8) define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256(<2 x double> %x0, <4 x double> %x2, i8 %mask) {