Index: include/llvm/MC/MCRegisterInfo.h =================================================================== --- include/llvm/MC/MCRegisterInfo.h +++ include/llvm/MC/MCRegisterInfo.h @@ -41,7 +41,6 @@ const uint16_t RegsSize; const uint16_t RegSetSize; const uint16_t ID; - const uint16_t RegSize, Alignment; // Size & Alignment of register in bytes const int8_t CopyCost; const bool Allocatable; @@ -80,14 +79,6 @@ return contains(Reg1) && contains(Reg2); } - /// getSize - Return the size of the register in bytes, which is also the size - /// of a stack slot allocated to hold a spilled copy of this register. - unsigned getSize() const { return RegSize; } - - /// getAlignment - Return the minimum required alignment for a register of - /// this class. - unsigned getAlignment() const { return Alignment; } - /// getCopyCost - Return the cost of copying a value between two registers in /// this class. A negative number means the register class is very expensive /// to copy e.g. status flag register classes. Index: include/llvm/Target/TargetRegisterInfo.h =================================================================== --- include/llvm/Target/TargetRegisterInfo.h +++ include/llvm/Target/TargetRegisterInfo.h @@ -45,6 +45,7 @@ // Instance variables filled by tablegen, do not use! const MCRegisterClass *MC; + const uint16_t SpillSize, SpillAlignment; const vt_iterator VTs; const uint32_t *SubClassMask; const uint16_t *SuperRegIndices; @@ -94,10 +95,10 @@ /// Return the size of the register in bytes, which is also the size /// of a stack slot allocated to hold a spilled copy of this register. - unsigned getSize() const { return MC->getSize(); } + unsigned getSize() const { return SpillSize; } /// Return the minimum required alignment for a register of this class. - unsigned getAlignment() const { return MC->getAlignment(); } + unsigned getAlignment() const { return SpillAlignment; } /// Return the cost of copying a value between two registers in this class. /// A negative number means the register class is very expensive Index: utils/TableGen/RegisterInfoEmitter.cpp =================================================================== --- utils/TableGen/RegisterInfoEmitter.cpp +++ utils/TableGen/RegisterInfoEmitter.cpp @@ -1025,16 +1025,12 @@ for (const auto &RC : RegisterClasses) { // Asserts to make sure values will fit in table assuming types from // MCRegisterInfo.h - assert((RC.SpillSize/8) <= 0xffff && "SpillSize too large."); - assert((RC.SpillAlignment/8) <= 0xffff && "SpillAlignment too large."); assert(RC.CopyCost >= -128 && RC.CopyCost <= 127 && "Copy cost too large."); OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, " << RegClassStrings.get(RC.getName()) << ", " << RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits), " << RC.getQualifiedName() + "RegClassID" << ", " - << RC.SpillSize/8 << ", " - << RC.SpillAlignment/8 << ", " << RC.CopyCost << ", " << ( RC.Allocatable ? "true" : "false" ) << " },\n"; } @@ -1316,9 +1312,13 @@ << " { // Register class instances\n"; for (const auto &RC : RegisterClasses) { + assert(isUInt<16>(RC.SpillSize/8) && "SpillSize too large."); + assert(isUInt<16>(RC.SpillAlignment/8) && "SpillAlignment too large."); OS << " extern const TargetRegisterClass " << RC.getName() << "RegClass = {\n " << '&' << Target.getName() << "MCRegisterClasses[" << RC.getName() << "RegClassID],\n " + << RC.SpillSize/8 << ", /* SpillSize */\n " + << RC.SpillAlignment/8 << ", /* SpillAlignment */\n " << "VTLists + " << VTSeqs.get(RC.VTs) << ",\n " << RC.getName() << "SubClassMask,\n SuperRegIdxSeqs + " << SuperRegIdxSeqs.get(SuperRegIdxLists[RC.EnumValue]) << ",\n ";