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Differential D31141

[AMDGPU] Run always inliner early in opt
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Authored by kzhuravl on Mar 20 2017, 10:59 AM.

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rampitec

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rG2534bc07f470: [AMDGPU] Run always inliner early in opt
rL298281: [AMDGPU] Run always inliner early in opt

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Repository: rL LLVM

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kzhuravl created this revision.Mar 20 2017, 10:59 AM

Herald added subscribers: tpr, dstuttard, tony-tye and 4 others. · View Herald TranscriptMar 20 2017, 10:59 AM

Not sure which bug you were trying to solve by original change, but moving if we move it "Internalize" then we would have to make function in early-inline.ll amdgpu_kernel. Would that be ok? I added a separate option for now.

rampitec added inline comments.Mar 20 2017, 11:02 AM

lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
98 ↗	(On Diff #92359)	No need in separate option. It falls under the same ideology as internalize. Having a separate option would mean we need pass it from RT as well.

In D31141#705482, @kzhuravl wrote:

Not sure which bug you were trying to solve by original change, but moving if we move it "Internalize" then we would have to make function in early-inline.ll amdgpu_kernel. Would that be ok? I added a separate option for now.

Yes, changing caller to be a kernel is good.

Address review feedback.

Thanks!

This revision is now accepted and ready to land.Mar 20 2017, 11:13 AM

Closed by commit rL298281: [AMDGPU] Run always inliner early in opt (authored by kzhuravl). · Explain WhyMar 20 2017, 11:18 AM

This revision was automatically updated to reflect the committed changes.

Revision Contents

Path

Size

llvm/

trunk/

lib/

Target/

AMDGPU/

AMDGPUTargetMachine.cpp

1 line

test/

CodeGen/

AMDGPU/

early-inline-alias.ll

12 lines

early-inline.ll

21 lines

Diff 92366

llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Show First 20 Lines • Show All 246 Lines • ▼ Show 20 Lines	[Internalize](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
case CallingConv::AMDGPU_KERNEL:		case CallingConv::AMDGPU_KERNEL:
case CallingConv::SPIR_KERNEL:		case CallingConv::SPIR_KERNEL:
return true;		return true;
}		}
}		}
return !GV.use_empty();		return !GV.use_empty();
}));		}));
PM.add(createGlobalDCEPass());		PM.add(createGlobalDCEPass());
		PM.add(createAMDGPUAlwaysInlinePass());
}		}
});		});
}		}

//===----------------------------------------------------------------------===//		//===----------------------------------------------------------------------===//
// R600 Target Machine (R600 -> Cayman)		// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//		//===----------------------------------------------------------------------===//

▲ Show 20 Lines • Show All 480 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/AMDGPU/early-inline-alias.ll

				; RUN: opt -mtriple=amdgcn-- -O1 -S -inline-threshold=1 %s \| FileCheck %s

				; CHECK: @add1alias = alias i32 (i32), i32 (i32)* @add1
				; CHECK: @add1alias2 = alias i32 (i32), i32 (i32)* @add1

				@add1alias = alias i32 (i32), i32 (i32)* @add1
				@add1alias2 = alias i32 (i32), i32 (i32)* @add1

				define i32 @add1(i32) {
				%2 = add nsw i32 %0, 1
				ret i32 %2
				}

llvm/trunk/test/CodeGen/AMDGPU/early-inline.ll

				; RUN: opt -mtriple=amdgcn-- -O1 -S -inline-threshold=1 -amdgpu-internalize-symbols %s \| FileCheck %s

				define i32 @callee(i32 %x) {
				entry:
				%mul1 = mul i32 %x, %x
				%mul2 = mul i32 %mul1, %x
				%mul3 = mul i32 %mul1, %mul2
				%mul4 = mul i32 %mul3, %mul2
				%mul5 = mul i32 %mul4, %mul3
				ret i32 %mul5
				}

				; CHECK-LABEL: @caller
				; CHECK: mul i32
				; CHECK-NOT: call i32

				define amdgpu_kernel i32 @caller(i32 %x) {
				entry:
				%res = call i32 @callee(i32 %x)
				ret i32 %res
				}