Index: lib/CodeGen/AsmPrinter/ARMException.cpp =================================================================== --- lib/CodeGen/AsmPrinter/ARMException.cpp +++ lib/CodeGen/AsmPrinter/ARMException.cpp @@ -44,8 +44,12 @@ } void ARMException::beginFunction(const MachineFunction *MF) { - if (Asm->MAI->getExceptionHandlingType() == ExceptionHandling::ARM) + const Function *F = MF->getFunction(); + + if (Asm->MAI->getExceptionHandlingType() == ExceptionHandling::ARM && + F->hasUWTable()) getTargetStreamer().emitFnStart(); + // See if we need call frame info. AsmPrinter::CFIMoveType MoveType = Asm->needsCFIMoves(); assert(MoveType != AsmPrinter::CFI_M_EH && @@ -76,10 +80,8 @@ F->needsUnwindTableEntry(); bool shouldEmitPersonality = forceEmitPersonality || !MF->getLandingPads().empty(); - if (!Asm->MF->getFunction()->needsUnwindTableEntry() && - !shouldEmitPersonality) - ATS.emitCantUnwind(); - else if (shouldEmitPersonality) { + + if (shouldEmitPersonality) { // Emit references to personality. if (Per) { MCSymbol *PerSym = Asm->getSymbol(Per); @@ -93,8 +95,11 @@ // Emit actual exception table emitExceptionTable(); } + else if (F->doesNotThrow() && F->hasUWTable()) + ATS.emitCantUnwind(); - if (Asm->MAI->getExceptionHandlingType() == ExceptionHandling::ARM) + if (Asm->MAI->getExceptionHandlingType() == ExceptionHandling::ARM && + F->hasUWTable()) ATS.emitFnEnd(); } Index: lib/Target/ARM/ARMAsmPrinter.cpp =================================================================== --- lib/Target/ARM/ARMAsmPrinter.cpp +++ lib/Target/ARM/ARMAsmPrinter.cpp @@ -1062,6 +1062,7 @@ const MachineFunction &MF = *MI->getParent()->getParent(); const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); const ARMFunctionInfo &AFI = *MF.getInfo(); + const Function* F = MF.getFunction(); unsigned FramePtr = RegInfo->getFrameRegister(MF); unsigned Opc = MI->getOpcode(); @@ -1122,7 +1123,8 @@ RegList.push_back(SrcReg); break; } - if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM) + if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM && + F->hasUWTable()) ATS.emitRegSave(RegList, Opc == ARM::VSTMDDB_UPD); } else { // Changes of stack / frame pointer. @@ -1169,7 +1171,8 @@ } } - if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM) { + if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM && + F->hasUWTable()) { if (DstReg == FramePtr && FramePtr != ARM::SP) // Set-up of the frame pointer. Positive values correspond to "add" // instruction. @@ -1216,7 +1219,7 @@ // Emit unwinding stuff for frame-related instructions if (Subtarget->isTargetEHABICompatible() && - MI->getFlag(MachineInstr::FrameSetup)) + MI->getFlag(MachineInstr::FrameSetup)) EmitUnwindingInstruction(MI); // Do any auto-generated pseudo lowerings. Index: test/CodeGen/ARM/atomic-cmpxchg.ll =================================================================== --- test/CodeGen/ARM/atomic-cmpxchg.ll +++ test/CodeGen/ARM/atomic-cmpxchg.ll @@ -32,7 +32,6 @@ ; CHECK-THUMB: movs r0, [[R2]] ; CHECK-ARMV6-LABEL: test_cmpxchg_res_i8: -; CHECK-ARMV6-NEXT: .fnstart ; CHECK-ARMV6-NEXT: uxtb [[DESIRED:r[0-9]+]], r1 ; CHECK-ARMV6-NEXT: [[TRY:.LBB[0-9_]+]]: ; CHECK-ARMV6-NEXT: ldrexb [[LD:r[0-9]+]], [r0] @@ -58,7 +57,6 @@ ; CHECK-THUMBV6-NEXT: pop {{.*}}pc} ; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8: -; CHECK-ARMV7-NEXT: .fnstart ; CHECK-ARMV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1 ; CHECK-ARMV7-NEXT: b [[TRY:.LBB[0-9_]+]] ; CHECK-ARMV7-NEXT: [[HEAD:.LBB[0-9_]+]]: @@ -75,7 +73,6 @@ ; CHECK-ARMV7-NEXT: bx lr ; CHECK-THUMBV7-LABEL: test_cmpxchg_res_i8: -; CHECK-THUMBV7-NEXT: .fnstart ; CHECK-THUMBV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1 ; CHECK-THUMBV7-NEXT: b [[TRYLD:.LBB[0-9_]+]] ; CHECK-THUMBV7-NEXT: [[TRYST:.LBB[0-9_]+]]: Index: test/CodeGen/ARM/big-endian-eh-unwind.ll =================================================================== --- test/CodeGen/ARM/big-endian-eh-unwind.ll +++ test/CodeGen/ARM/big-endian-eh-unwind.ll @@ -71,3 +71,4 @@ ; CHECK-LABEL: Contents of section .ARM.extab: ; CHECK-NEXT: 0000 00000000 00a8b0b0 +attributes #0 = { uwtable } \ No newline at end of file Index: test/CodeGen/ARM/constantpool-promote-duplicate.ll =================================================================== --- test/CodeGen/ARM/constantpool-promote-duplicate.ll +++ test/CodeGen/ARM/constantpool-promote-duplicate.ll @@ -9,7 +9,7 @@ ; CHECK-LABEL: @test1 ; CHECK-DAG: const1: ; CHECK-DAG: const2: -; CHECK: .fnend + define void @test1() { %1 = load i32, i32* @const1, align 4 call void @a(i32 %1) Index: test/CodeGen/ARM/constantpool-promote.ll =================================================================== --- test/CodeGen/ARM/constantpool-promote.ll +++ test/CodeGen/ARM/constantpool-promote.ll @@ -36,7 +36,6 @@ ; CHECK-LABEL: @test2 ; CHECK-NOT: .asci -; CHECK: .fnend define void @test2() #0 { tail call void @a(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str1, i32 0, i32 0)) #2 ret void @@ -105,7 +104,6 @@ ; This shouldn't be promoted, because the array contains pointers. ; CHECK-LABEL: @test8 ; CHECK-NOT: .zero -; CHECK: .fnend define void @test8() #0 { %a = load i16*, i16** getelementptr inbounds ([2 x i16*], [2 x i16*]* @.arr3, i32 0, i32 0) tail call void @c(i16* %a) #2 Index: test/CodeGen/ARM/disable-fp-elim.ll =================================================================== --- test/CodeGen/ARM/disable-fp-elim.ll +++ test/CodeGen/ARM/disable-fp-elim.ll @@ -22,4 +22,5 @@ declare i32 @foo2(i32) -attributes #0 = { nounwind "no-frame-pointer-elim"="true" } +; unwind annotations only generated if uwtable iset set. +attributes #0 = { uwtable nounwind "no-frame-pointer-elim"="true" } Index: test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll =================================================================== --- test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll +++ test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll @@ -25,7 +25,7 @@ declare void @__cxa_end_catch() -define void @test1() nounwind personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { +define void @test1() nounwind uwtable personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { entry: invoke void @throw_exception() to label %try.cont unwind label %lpad Index: test/CodeGen/ARM/ehabi-handlerdata.ll =================================================================== --- test/CodeGen/ARM/ehabi-handlerdata.ll +++ test/CodeGen/ARM/ehabi-handlerdata.ll @@ -23,7 +23,7 @@ declare void @__cxa_end_catch() -define void @test1() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { +define void @test1() uwtable personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { entry: invoke void @throw_exception() to label %try.cont unwind label %lpad Index: test/CodeGen/ARM/ehabi-no-landingpad.ll =================================================================== --- test/CodeGen/ARM/ehabi-no-landingpad.ll +++ test/CodeGen/ARM/ehabi-no-landingpad.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" target triple = "armv7-unknown-linux-gnueabi" -define void @_Z4testv() { +define void @_Z4testv() uwtable { ; CHECK: _Z4testv ; CHECK: .fnstart ; CHECK: .size Index: test/CodeGen/ARM/ehabi.ll =================================================================== --- test/CodeGen/ARM/ehabi.ll +++ test/CodeGen/ARM/ehabi.ll @@ -10,7 +10,7 @@ ; (4) .vsave directive should come with vpush instruction. ; (5) .pad directive should come with stack pointer adjustment. ; (6) .cantunwind directive should be available if the function is marked with -; nounwind function attribute. +; nounwind uwtable function attributes. ; We have to check several cases: ; (1) arm with -disable-fp-elim @@ -105,7 +105,7 @@ define void @_Z4testiiiiiddddd(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, double %m, double %n, double %p, - double %q, double %r) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { + double %q, double %r) uwtable personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { entry: invoke void @_Z5printiiiii(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) to label %try.cont unwind label %lpad @@ -295,7 +295,7 @@ declare void @throw_exception_2() -define void @test2() { +define void @test2() uwtable { entry: call void @throw_exception_2() ret void @@ -385,7 +385,7 @@ declare void @throw_exception_3(i32) define i32 @test3(i32 %a, i32 %b, i32 %c, i32 %d, - i32 %e, i32 %f, i32 %g, i32 %h) { + i32 %e, i32 %f, i32 %g, i32 %h) uwtable { entry: %add = add nsw i32 %b, %a %add1 = add nsw i32 %add, %c @@ -493,30 +493,6 @@ ret void } -; CHECK-FP-LABEL: test4: -; CHECK-FP: .fnstart -; CHECK-FP: mov pc, lr -; CHECK-FP: .cantunwind -; CHECK-FP: .fnend - -; CHECK-FP-ELIM-LABEL: test4: -; CHECK-FP-ELIM: .fnstart -; CHECK-FP-ELIM: mov pc, lr -; CHECK-FP-ELIM: .cantunwind -; CHECK-FP-ELIM: .fnend - -; CHECK-V7-FP-LABEL: test4: -; CHECK-V7-FP: .fnstart -; CHECK-V7-FP: bx lr -; CHECK-V7-FP: .cantunwind -; CHECK-V7-FP: .fnend - -; CHECK-V7-FP-ELIM-LABEL: test4: -; CHECK-V7-FP-ELIM: .fnstart -; CHECK-V7-FP-ELIM: bx lr -; CHECK-V7-FP-ELIM: .cantunwind -; CHECK-V7-FP-ELIM: .fnend - ; DWARF-FP-LABEL: test4: ; DWARF-FP-NOT: .cfi_startproc ; DWARF-FP: mov pc, lr @@ -540,3 +516,36 @@ ; DWARF-V7-FP-ELIM: bx lr ; DWARF-V7-FP-ELIM-NOT: .cfi_endproc ; DWARF-V7-FP-ELIM: .size test4, + +;------------------------------------------------------------------------------- +; Test 5 +;------------------------------------------------------------------------------- + +define void @test5() nounwind uwtable { +entry: + ret void +} + +; CHECK-FP-LABEL: test5: +; CHECK-FP: .fnstart +; CHECK-FP: mov pc, lr +; CHECK-FP: .cantunwind +; CHECK-FP: .fnend + +; CHECK-FP-ELIM-LABEL: test5: +; CHECK-FP-ELIM: .fnstart +; CHECK-FP-ELIM: mov pc, lr +; CHECK-FP-ELIM: .cantunwind +; CHECK-FP-ELIM: .fnend + +; CHECK-V7-FP-LABEL: test5: +; CHECK-V7-FP: .fnstart +; CHECK-V7-FP: bx lr +; CHECK-V7-FP: .cantunwind +; CHECK-V7-FP: .fnend + +; CHECK-V7-FP-ELIM-LABEL: test5: +; CHECK-V7-FP-ELIM: .fnstart +; CHECK-V7-FP-ELIM: bx lr +; CHECK-V7-FP-ELIM: .cantunwind +; CHECK-V7-FP-ELIM: .fnend Index: test/CodeGen/ARM/execute-only.ll =================================================================== --- test/CodeGen/ARM/execute-only.ll +++ test/CodeGen/ARM/execute-only.ll @@ -73,7 +73,7 @@ @.str = private unnamed_addr constant [4 x i8] c"FOO\00", align 1 -define hidden i8* @string_literal() { +define hidden i8* @string_literal() uwtable { entry: ; CHECK-LABEL: string_literal: ; CHECK-NOT: .asciz Index: test/CodeGen/ARM/float-helpers.s =================================================================== --- test/CodeGen/ARM/float-helpers.s +++ test/CodeGen/ARM/float-helpers.s @@ -39,7 +39,6 @@ define float @fadd(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fadd: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fadd ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -62,7 +61,6 @@ define float @fdiv(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fdiv: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fdiv ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -85,7 +83,6 @@ define float @fmul(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fmul: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fmul ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -108,7 +105,6 @@ define float @fsub(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fsub: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fsub ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -131,7 +127,6 @@ define i32 @fcmpeq(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fcmpeq: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fcmpeq ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -162,7 +157,6 @@ define i32 @fcmplt(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fcmplt: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fcmplt ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -193,7 +187,6 @@ define i32 @fcmple(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fcmple: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fcmple ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -224,7 +217,6 @@ define i32 @fcmpge(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fcmpge: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fcmpge ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -255,7 +247,6 @@ define i32 @fcmpgt(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fcmpgt: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fcmpgt ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -286,7 +277,6 @@ define i32 @fcmpun(float %a, float %b) #0 { ; CHECK-SOFT-LABEL: fcmpun: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_fcmpun ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -317,7 +307,6 @@ define double @dadd(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dadd: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dadd ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -335,7 +324,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dadd: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -350,7 +338,6 @@ define double @ddiv(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: ddiv: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_ddiv ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -368,7 +355,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: ddiv: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -383,7 +369,6 @@ define double @dmul(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dmul: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dmul ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -401,7 +386,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dmul: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -416,7 +400,6 @@ define double @dsub(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dsub: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dsub ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -434,7 +417,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dsub: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -449,7 +431,6 @@ define i32 @dcmpeq(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dcmpeq: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dcmpeq ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -474,7 +455,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dcmpeq: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -491,7 +471,6 @@ define i32 @dcmplt(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dcmplt: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dcmplt ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -516,7 +495,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dcmplt: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -533,7 +511,6 @@ define i32 @dcmple(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dcmple: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dcmple ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -558,7 +535,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dcmple: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -575,7 +551,6 @@ define i32 @dcmpge(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dcmpge: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dcmpge ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -600,7 +575,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dcmpge: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -617,7 +591,6 @@ define i32 @dcmpgt(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dcmpgt: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dcmpgt ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -642,7 +615,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dcmpgt: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -659,7 +631,6 @@ define i32 @dcmpun(double %a, double %b) #0 { ; CHECK-SOFT-LABEL: dcmpun: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_dcmpun ; CHECK-SOFT-NEXT: cmp r0, #0 @@ -684,7 +655,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: dcmpun: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1 @@ -701,7 +671,6 @@ define i32 @d2iz(double %a) #0 { ; CHECK-SOFT-LABEL: d2iz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_d2iz ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -719,7 +688,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: d2iz: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_d2iz @@ -732,7 +700,6 @@ define i32 @d2uiz(double %a) #0 { ; CHECK-SOFT-LABEL: d2uiz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_d2uiz ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -750,7 +717,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: d2uiz: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_d2uiz @@ -763,21 +729,18 @@ define i64 @d2lz(double %a) #0 { ; CHECK-SOFT-LABEL: d2lz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_d2lz ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: d2lz: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_d2lz ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: d2lz: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SP-NEXT: bl __aeabi_d2lz @@ -790,21 +753,18 @@ define i64 @d2ulz(double %a) #0 { ; CHECK-SOFT-LABEL: d2ulz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_d2ulz ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: d2ulz: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_d2ulz ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: d2ulz: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SP-NEXT: bl __aeabi_d2ulz @@ -817,7 +777,6 @@ define i32 @f2iz(float %a) #0 { ; CHECK-SOFT-LABEL: f2iz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_f2iz ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -840,7 +799,6 @@ define i32 @f2uiz(float %a) #0 { ; CHECK-SOFT-LABEL: f2uiz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_f2uiz ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -863,21 +821,18 @@ define i64 @f2lz(float %a) #0 { ; CHECK-SOFT-LABEL: f2lz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_f2lz ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: f2lz: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_f2lz ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: f2lz: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: vmov r0, s0 ; CHECK-HARDFP-SP-NEXT: bl __aeabi_f2lz @@ -890,21 +845,18 @@ define i64 @f2ulz(float %a) #0 { ; CHECK-SOFT-LABEL: f2ulz: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_f2ulz ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: f2ulz: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_f2ulz ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: f2ulz: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: vmov r0, s0 ; CHECK-HARDFP-SP-NEXT: bl __aeabi_f2ulz @@ -917,7 +869,6 @@ define float @d2f(double %a) #0 { ; CHECK-SOFT-LABEL: d2f: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_d2f ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -934,7 +885,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: d2f: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0 ; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_d2f @@ -948,7 +898,6 @@ define double @f2d(float %a) #0 { ; CHECK-SOFT-LABEL: f2d: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_f2d ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -965,7 +914,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: f2d: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: vmov r0, s0 ; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_f2d @@ -979,7 +927,6 @@ define double @i2d(i32 %a) #0 { ; CHECK-SOFT-LABEL: i2d: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_i2d ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -997,7 +944,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: i2d: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_i2d ; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1 @@ -1010,7 +956,6 @@ define double @ui2d(i32 %a) #0 { ; CHECK-SOFT-LABEL: ui2d: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_ui2d ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -1028,7 +973,6 @@ ; CHECK-HARDFP-DP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SPONLY-LABEL: ui2d: -; CHECK-HARDFP-SPONLY: .save {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr} ; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_ui2d ; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1 @@ -1041,21 +985,18 @@ define double @l2d(i64 %a) #0 { ; CHECK-SOFT-LABEL: l2d: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_l2d ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: l2d: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_l2d ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: l2d: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: bl __aeabi_l2d ; CHECK-HARDFP-SP-NEXT: vmov d0, r0, r1 @@ -1068,21 +1009,18 @@ define double @ul2d(i64 %a) #0 { ; CHECK-SOFT-LABEL: ul2d: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_ul2d ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: ul2d: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_ul2d ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: ul2d: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: bl __aeabi_ul2d ; CHECK-HARDFP-SP-NEXT: vmov d0, r0, r1 @@ -1095,7 +1033,6 @@ define float @i2f(i32 %a) #0 { ; CHECK-SOFT-LABEL: i2f: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_i2f ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -1118,7 +1055,6 @@ define float @ui2f(i32 %a) #0 { ; CHECK-SOFT-LABEL: ui2f: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_ui2f ; CHECK-SOFT-NEXT: pop {r11, lr} @@ -1141,21 +1077,18 @@ define float @l2f(i64 %a) #0 { ; CHECK-SOFT-LABEL: l2f: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_l2f ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: l2f: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_l2f ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: l2f: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: bl __aeabi_l2f ; CHECK-HARDFP-SP-NEXT: vmov s0, r0 @@ -1168,21 +1101,18 @@ define float @ul2f(i64 %a) #0 { ; CHECK-SOFT-LABEL: ul2f: -; CHECK-SOFT: .save {r11, lr} ; CHECK-SOFT-NEXT: push {r11, lr} ; CHECK-SOFT-NEXT: bl __aeabi_ul2f ; CHECK-SOFT-NEXT: pop {r11, lr} ; CHECK-SOFT-NEXT: mov pc, lr ; ; CHECK-SOFTFP-LABEL: ul2f: -; CHECK-SOFTFP: .save {r11, lr} ; CHECK-SOFTFP-NEXT: push {r11, lr} ; CHECK-SOFTFP-NEXT: bl __aeabi_ul2f ; CHECK-SOFTFP-NEXT: pop {r11, lr} ; CHECK-SOFTFP-NEXT: mov pc, lr ; ; CHECK-HARDFP-SP-LABEL: ul2f: -; CHECK-HARDFP-SP: .save {r11, lr} ; CHECK-HARDFP-SP-NEXT: push {r11, lr} ; CHECK-HARDFP-SP-NEXT: bl __aeabi_ul2f ; CHECK-HARDFP-SP-NEXT: vmov s0, r0 Index: test/CodeGen/ARM/fp16-promote.ll =================================================================== --- test/CodeGen/ARM/fp16-promote.ll +++ test/CodeGen/ARM/fp16-promote.ll @@ -90,7 +90,6 @@ } ; CHECK-ALL-LABEL: test_load_store: -; CHECK-ALL-NEXT: .fnstart ; CHECK-ALL: ldrh {{r[0-9]+}}, [{{r[0-9]+}}] ; CHECK-ALL: strh {{r[0-9]+}}, [{{r[0-9]+}}] define void @test_load_store(half* %p, half* %q) #0 { @@ -105,8 +104,6 @@ declare half @test_callee(half %a, half %b) #0 ; CHECK-ALL-LABEL: test_call: -; CHECK-ALL-NEXT: .fnstart -; CHECK-ALL-NEXT: .save {r11, lr} ; CHECK-ALL-NEXT: push {r11, lr} ; CHECK-ALL-NEXT: bl test_callee ; CHECK-ALL-NEXT: pop {r11, pc} @@ -116,8 +113,6 @@ } ; CHECK-ALL-LABEL: test_call_flipped: -; CHECK-ALL-NEXT: .fnstart -; CHECK-ALL-NEXT: .save {r11, lr} ; CHECK-ALL-NEXT: push {r11, lr} ; CHECK-VFP-NEXT: vmov.f32 s2, s0 ; CHECK-VFP-NEXT: vmov.f32 s0, s1 @@ -133,7 +128,6 @@ } ; CHECK-ALL-LABEL: test_tailcall_flipped: -; CHECK-ALL-NEXT: .fnstart ; CHECK-VFP-NEXT: vmov.f32 s2, s0 ; CHECK-VFP-NEXT: vmov.f32 s0, s1 ; CHECK-VFP-NEXT: vmov.f32 s1, s2 @@ -375,7 +369,6 @@ } ; CHECK-ALL-LABEL: test_bitcast_halftoi16: -; CHECK-ALL-NEXT: .fnstart ; CHECK-ALL-NEXT: ldrh r0, [r0] ; CHECK-ALL-NEXT: bx lr define i16 @test_bitcast_halftoi16(half* %p) #0 { @@ -385,7 +378,6 @@ } ; CHECK-ALL-LABEL: test_bitcast_i16tohalf: -; CHECK-ALL-NEXT: .fnstart ; CHECK-ALL-NEXT: strh r0, [r1] ; CHECK-ALL-NEXT: bx lr define void @test_bitcast_i16tohalf(i16 %a, half* %p) #0 { @@ -889,7 +881,6 @@ } ; CHECK-ALL-LABEL: test_extractvalue: -; CHECK-ALL: .fnstart ; CHECK-ALL: ldrh ; CHECK-ALL: strh define void @test_extractvalue(%struct.dummy* %p, half* %q) { @@ -910,10 +901,9 @@ } ; CHECK-ALL-LABEL: test_struct_arg: -; CHECK-ALL-NEXT: .fnstart ; CHECK-NOVFP-NEXT: mov r0, r1 ; CHECK-ALL-NEXT: bx lr -define half @test_struct_arg(%struct.dummy %p) { +define half @test_struct_arg(%struct.dummy %p) { %a = extractvalue %struct.dummy %p, 1 ret half %a } Index: test/CodeGen/ARM/illegal-bitfield-loadstore.ll =================================================================== --- test/CodeGen/ARM/illegal-bitfield-loadstore.ll +++ test/CodeGen/ARM/illegal-bitfield-loadstore.ll @@ -156,7 +156,6 @@ ; ; BE-LABEL: i56_insert_bit: ; BE: @ BB#0: -; BE-NEXT: .save {r11, lr} ; BE-NEXT: push {r11, lr} ; BE-NEXT: mov r2, r0 ; BE-NEXT: ldr lr, [r0] Index: test/CodeGen/ARM/select_const.ll =================================================================== --- test/CodeGen/ARM/select_const.ll +++ test/CodeGen/ARM/select_const.ll @@ -279,7 +279,6 @@ define i64 @opaque_constant1(i1 %cond, i64 %x) { ; CHECK-LABEL: opaque_constant1: ; CHECK: @ BB#0: -; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: mov lr, #1 ; CHECK-NEXT: ands r12, r0, #1 Index: test/CodeGen/ARM/setcc-logic.ll =================================================================== --- test/CodeGen/ARM/setcc-logic.ll +++ test/CodeGen/ARM/setcc-logic.ll @@ -49,7 +49,6 @@ define <4 x i1> @and_eq_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) nounwind { ; CHECK-LABEL: and_eq_vec: ; CHECK: @ BB#0: -; CHECK-NEXT: .save {r11, lr} ; CHECK-NEXT: push {r11, lr} ; CHECK-NEXT: vmov d19, r2, r3 ; CHECK-NEXT: add r12, sp, #40 Index: test/CodeGen/ARM/vcvt.ll =================================================================== --- test/CodeGen/ARM/vcvt.ll +++ test/CodeGen/ARM/vcvt.ll @@ -258,9 +258,7 @@ define <2 x i64> @fix_float_to_i64(<2 x float> %in) { ; CHECK-LABEL: fix_float_to_i64: ; CHECK: @ BB#0: -; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: push {r4, lr} -; CHECK-NEXT: .vsave {d8, d9} ; CHECK-NEXT: vpush {d8, d9} ; CHECK-NEXT: vmov d16, r0, r1 ; CHECK-NEXT: vadd.f32 d8, d16, d16 @@ -320,9 +318,7 @@ define <2 x i64> @fix_double_to_i64(<2 x double> %in) { ; CHECK-LABEL: fix_double_to_i64: ; CHECK: @ BB#0: -; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: push {r4, lr} -; CHECK-NEXT: .vsave {d8, d9} ; CHECK-NEXT: vpush {d8, d9} ; CHECK-NEXT: vmov d16, r2, r3 ; CHECK-NEXT: vadd.f64 d16, d16, d16 Index: test/CodeGen/ARM/vuzp.ll =================================================================== --- test/CodeGen/ARM/vuzp.ll +++ test/CodeGen/ARM/vuzp.ll @@ -353,7 +353,6 @@ define <8 x i8> @vuzp_trunc_and_shuffle(<8 x i8> %tr0, <8 x i8> %tr1, ; CHECK-LABEL: vuzp_trunc_and_shuffle: ; CHECK: @ BB#0: -; CHECK-NEXT: .save {r11, lr} ; CHECK-NEXT: push {r11, lr} ; CHECK-NEXT: add r12, sp, #8 ; CHECK-NEXT: add lr, sp, #24 @@ -459,9 +458,7 @@ define <10 x i8> @vuzp_wide_type(<10 x i8> %tr0, <10 x i8> %tr1, ; CHECK-LABEL: vuzp_wide_type: ; CHECK: @ BB#0: -; CHECK-NEXT: .save {r4, r10, r11, lr} ; CHECK-NEXT: push {r4, r10, r11, lr} -; CHECK-NEXT: .setfp r11, sp, #8 ; CHECK-NEXT: add r11, sp, #8 ; CHECK-NEXT: bic sp, sp, #15 ; CHECK-NEXT: add r12, r11, #32 Index: test/CodeGen/Thumb/copy_thumb.ll =================================================================== --- test/CodeGen/Thumb/copy_thumb.ll +++ test/CodeGen/Thumb/copy_thumb.ll @@ -10,7 +10,6 @@ ; CHECK-LOLOMOV-NEXT: mov [[SRC1]], [[SRC2:r[01]]] ; CHECK-LOLOMOV-NEXT: mov [[SRC2]], [[TMP]] ; CHECK-LOLOMOV-LABEL: bar -; CHECK-LOLOMOV-LABEL: fnend ; ; 'MOV lo, lo' in Thumb mode produces undefined results on pre-v6 hardware ; RUN: llc -mtriple=thumbv4t-none--eabi < %s | FileCheck %s --check-prefix=CHECK-NOLOLOMOV @@ -20,7 +19,6 @@ ; CHECK-NOLOLOMOV-NEXT: movs [[SRC1]], [[SRC2:r[01]]] ; CHECK-NOLOLOMOV-NEXT: movs [[SRC2]], [[TMP]] ; CHECK-NOLOLOMOV-LABEL: bar -; CHECK-NOLOLOMOV-LABEL: fnend declare void @bar(i32, i32) Index: test/LTO/ARM/link-arm-and-thumb.ll =================================================================== --- test/LTO/ARM/link-arm-and-thumb.ll +++ test/LTO/ARM/link-arm-and-thumb.ll @@ -14,7 +14,6 @@ ; CHECK: .code 32 ; CHECK-NEXT: main -; CHECK-NEXT: .fnstart ; CHECK-NEXT: mov r0, #30 ; CHECK: .code 16 Index: test/MC/ARM/data-in-code.ll =================================================================== --- test/MC/ARM/data-in-code.ll +++ test/MC/ARM/data-in-code.ll @@ -9,7 +9,7 @@ ;; Ensure that if a jump table is generated that it has Mapping Symbols ;; marking the data-in-code region. -define void @foo(i32* %ptr, i32 %b) nounwind ssp { +define void @foo(i32* %ptr, i32 %b) nounwind uwtable ssp { %tmp = load i32, i32* %ptr, align 4 switch i32 %tmp, label %exit [ i32 0, label %bb0