Index: include/llvm/Support/ELFRelocs/AArch64.def =================================================================== --- include/llvm/Support/ELFRelocs/AArch64.def +++ include/llvm/Support/ELFRelocs/AArch64.def @@ -109,8 +109,8 @@ ELF_RELOC(R_AARCH64_TLSDESC_LD_PREL19, 0x230) ELF_RELOC(R_AARCH64_TLSDESC_ADR_PREL21, 0x231) ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE21, 0x232) -ELF_RELOC(R_AARCH64_TLSDESC_LD64_LO12_NC, 0x233) -ELF_RELOC(R_AARCH64_TLSDESC_ADD_LO12_NC, 0x234) +ELF_RELOC(R_AARCH64_TLSDESC_LD64_LO12, 0x233) +ELF_RELOC(R_AARCH64_TLSDESC_ADD_LO12, 0x234) ELF_RELOC(R_AARCH64_TLSDESC_OFF_G1, 0x235) ELF_RELOC(R_AARCH64_TLSDESC_OFF_G0_NC, 0x236) ELF_RELOC(R_AARCH64_TLSDESC_LDR, 0x237) @@ -191,8 +191,8 @@ ELF_RELOC(R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 0x076) ELF_RELOC(R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 0x077) ELF_RELOC(R_AARCH64_P32_TLSDESC_ADR_PAGE21, 0x051) -ELF_RELOC(R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 0x07d) -ELF_RELOC(R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 0x034) +ELF_RELOC(R_AARCH64_P32_TLSDESC_LD32_LO12, 0x07d) +ELF_RELOC(R_AARCH64_P32_TLSDESC_ADD_LO12, 0x034) ELF_RELOC(R_AARCH64_P32_TLSDESC_CALL, 0x07f) ELF_RELOC(R_AARCH64_P32_COPY, 0x0b4) ELF_RELOC(R_AARCH64_P32_GLOB_DAT, 0x0b5) Index: lib/Target/AArch64/AArch64AsmPrinter.cpp =================================================================== --- lib/Target/AArch64/AArch64AsmPrinter.cpp +++ lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -580,8 +580,7 @@ const MachineOperand &MO_Sym = MI->getOperand(0); MachineOperand MO_TLSDESC_LO12(MO_Sym), MO_TLSDESC(MO_Sym); MCOperand Sym, SymTLSDescLo12, SymTLSDesc; - MO_TLSDESC_LO12.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | - AArch64II::MO_NC); + MO_TLSDESC_LO12.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGEOFF); MO_TLSDESC.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGE); MCInstLowering.lowerOperand(MO_Sym, Sym); MCInstLowering.lowerOperand(MO_TLSDESC_LO12, SymTLSDescLo12); Index: lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp =================================================================== --- lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp +++ lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp @@ -197,7 +197,7 @@ if (RefKind == AArch64MCExpr::VK_TPREL_LO12) return R_CLS(TLSLE_ADD_TPREL_LO12); if (RefKind == AArch64MCExpr::VK_TLSDESC_LO12) - return R_CLS(TLSDESC_ADD_LO12_NC); + return R_CLS(TLSDESC_ADD_LO12); if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) return R_CLS(ADD_ABS_LO12_NC); @@ -245,6 +245,16 @@ return R_CLS(TLSLE_LDST32_TPREL_LO12); if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC) return R_CLS(TLSLE_LDST32_TPREL_LO12_NC); + if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) { + if (IsILP32) { + return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12; + } else { + Ctx.reportError(Fixup.getLoc(), + "LP64 4 byte TLSDESC load/store relocation " + "not supported (ILP32 eqv: TLSDESC_LD64_LO12)"); + return ELF::R_AARCH64_NONE; + } + } Ctx.reportError(Fixup.getLoc(), "invalid fixup for 32-bit load/store instruction"); @@ -265,9 +275,16 @@ if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) return IsILP32 ? ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC : ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; - if (SymLoc == AArch64MCExpr::VK_TLSDESC && IsNC) - return IsILP32 ? ELF::R_AARCH64_P32_TLSDESC_LD32_LO12_NC - : ELF::R_AARCH64_TLSDESC_LD64_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_TLSDESC) { + if (IsILP32) { + Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store " + "relocation not supported (LP64 eqv: " + "TLSDESC_LD64_LO12"); + return ELF::R_AARCH64_NONE; + } else { + return ELF::R_AARCH64_TLSDESC_LD64_LO12; + } + } Ctx.reportError(Fixup.getLoc(), "invalid fixup for 64-bit load/store instruction"); Index: lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h =================================================================== --- lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h +++ lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h @@ -95,7 +95,7 @@ VK_TPREL_HI12 = VK_TPREL | VK_HI12, VK_TPREL_LO12 = VK_TPREL | VK_PAGEOFF, VK_TPREL_LO12_NC = VK_TPREL | VK_PAGEOFF | VK_NC, - VK_TLSDESC_LO12 = VK_TLSDESC | VK_PAGEOFF | VK_NC, + VK_TLSDESC_LO12 = VK_TLSDESC | VK_PAGEOFF, VK_TLSDESC_PAGE = VK_TLSDESC | VK_PAGE, VK_INVALID = 0xfff Index: test/CodeGen/AArch64/arm64-tls-dynamics.ll =================================================================== --- test/CodeGen/AArch64/arm64-tls-dynamics.ll +++ test/CodeGen/AArch64/arm64-tls-dynamics.ll @@ -30,13 +30,13 @@ ; CHECK-NOLD: ldr w0, [x[[TP]], x0] ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL } @@ -56,13 +56,13 @@ ; CHECK: add x0, [[TP]], x0 ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL } @@ -95,15 +95,15 @@ ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL ; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_HI12 ; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL } @@ -131,15 +131,15 @@ ret i32* @local_dynamic_var ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL ; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_HI12 ; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12 +; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12 ; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL } Index: test/MC/AArch64/arm32-elf-relocs.s =================================================================== --- test/MC/AArch64/arm32-elf-relocs.s +++ test/MC/AArch64/arm32-elf-relocs.s @@ -25,7 +25,7 @@ add x5, x0, #:tlsdesc_lo12:sym // CHECK: add x5, x0, :tlsdesc_lo12:sym -// CHECK-OBJ-ILP32: 14 R_AARCH64_P32_TLSDESC_ADD_LO12_NC sym +// CHECK-OBJ-ILP32: 14 R_AARCH64_P32_TLSDESC_ADD_LO12 sym add x0, x2, #:lo12:sym+8 // CHECK: add x0, x2, :lo12:sym @@ -49,7 +49,7 @@ add x5, x0, #:tlsdesc_lo12:sym+70 // CHECK: add x5, x0, :tlsdesc_lo12:sym+70 -// CHECK-OBJ-ILP32: 2c R_AARCH64_P32_TLSDESC_ADD_LO12_NC sym+70 +// CHECK-OBJ-ILP32: 2c R_AARCH64_P32_TLSDESC_ADD_LO12 sym+70 .hword sym + 4 - . // CHECK-OBJ-ILP32: 30 R_AARCH64_P32_PREL16 sym+4 @@ -226,14 +226,12 @@ # ldr x24, [x23, :gottprel_lo12:sym] # ldr d22, [x21, #:gottprel_lo12:sym] - ldr x24, [x23, #:tlsdesc_lo12:sym] - ldr d22, [x21, :tlsdesc_lo12:sym] -// CHECK: ldr x24, [x23, :tlsdesc_lo12:sym] -// CHECK: ldr d22, [x21, :tlsdesc_lo12:sym] -// Why is there a "_NC" at the end? "ELF for the ARM 64-bit architecture -// (AArch64) beta" doesn't have that. -// CHECK-OBJ-ILP32 R_AARCH64_P32_TLSDESC_LD32_LO12_NC sym -// CHECK-OBJ-ILP32 R_AARCH64_P32_TLSDESC_LD64_LO12_NC sym + ldr w24, [x23, #:tlsdesc_lo12:sym] + ldr s22, [x21, :tlsdesc_lo12:sym] +// CHECK: ldr w24, [x23, :tlsdesc_lo12:sym] +// CHECK: ldr s22, [x21, :tlsdesc_lo12:sym] +// CHECK-OBJ-ILP32 R_AARCH64_P32_TLSDESC_LD32_LO12 sym +// CHECK-OBJ-ILP32 R_AARCH64_P32_TLSDESC_LD64_LO12 sym ldr q20, [x19, #:lo12:sym] // CHECK: ldr q20, [x19, :lo12:sym] Index: test/MC/AArch64/arm64-elf-relocs.s =================================================================== --- test/MC/AArch64/arm64-elf-relocs.s +++ test/MC/AArch64/arm64-elf-relocs.s @@ -25,7 +25,7 @@ add x5, x0, #:tlsdesc_lo12:sym // CHECK: add x5, x0, :tlsdesc_lo12:sym -// CHECK-OBJ-LP64: 14 R_AARCH64_TLSDESC_ADD_LO12_NC sym +// CHECK-OBJ-LP64: 14 R_AARCH64_TLSDESC_ADD_LO12 sym add x0, x2, #:lo12:sym+8 // CHECK: add x0, x2, :lo12:sym @@ -49,7 +49,7 @@ add x5, x0, #:tlsdesc_lo12:sym+70 // CHECK: add x5, x0, :tlsdesc_lo12:sym+70 -// CHECK-OBJ-LP64: 2c R_AARCH64_TLSDESC_ADD_LO12_NC sym+70 +// CHECK-OBJ-LP64: 2c R_AARCH64_TLSDESC_ADD_LO12 sym+70 .hword sym + 4 - . // CHECK-OBJ-LP64: 30 R_AARCH64_PREL16 sym+4 @@ -238,8 +238,8 @@ ldr d22, [x21, :tlsdesc_lo12:sym] // CHECK: ldr x24, [x23, :tlsdesc_lo12:sym] // CHECK: ldr d22, [x21, :tlsdesc_lo12:sym] -// CHECK-OBJ-LP64 R_AARCH64_TLSDESC_LD64_LO12_NC sym -// CHECK-OBJ-LP64 R_AARCH64_TLSDESC_LD64_LO12_NC sym +// CHECK-OBJ-LP64 R_AARCH64_TLSDESC_LD64_LO12 sym +// CHECK-OBJ-LP64 R_AARCH64_TLSDESC_LD64_LO12 sym ldr q20, [x19, #:lo12:sym] // CHECK: ldr q20, [x19, :lo12:sym] Index: test/MC/AArch64/arm64-tls-relocs.s =================================================================== --- test/MC/AArch64/arm64-tls-relocs.s +++ test/MC/AArch64/arm64-tls-relocs.s @@ -305,8 +305,8 @@ // CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE21 [[VARSYM]] -// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]] -// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_LD64_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADD_LO12 [[VARSYM]] // CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_CALL [[VARSYM]] // Make sure symbol 5 has type STT_TLS: Index: test/MC/AArch64/inline-asm-modifiers.s =================================================================== --- test/MC/AArch64/inline-asm-modifiers.s +++ test/MC/AArch64/inline-asm-modifiers.s @@ -30,7 +30,7 @@ // CHECK: R_AARCH64_ADD_ABS_LO12_NC var_simple // CHECK: R_AARCH64_LD64_GOT_LO12_NC var_got -// CHECK: R_AARCH64_TLSDESC_ADD_LO12_NC var_tlsgd +// CHECK: R_AARCH64_TLSDESC_ADD_LO12 var_tlsgd // CHECK: R_AARCH64_TLSLD_ADD_DTPREL_LO12 var_tlsld // CHECK: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC var_tlsie // CHECK: R_AARCH64_TLSLE_ADD_TPREL_LO12 var_tlsle Index: test/MC/AArch64/tls-relocs.s =================================================================== --- test/MC/AArch64/tls-relocs.s +++ test/MC/AArch64/tls-relocs.s @@ -392,8 +392,8 @@ // CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6] // CHECK-ELF-NEXT: 0x104 R_AARCH64_TLSDESC_ADR_PAGE21 [[VARSYM]] -// CHECK-ELF-NEXT: 0x108 R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]] -// CHECK-ELF-NEXT: 0x10C R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x108 R_AARCH64_TLSDESC_LD64_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x10C R_AARCH64_TLSDESC_ADD_LO12 [[VARSYM]] // CHECK-ELF-NEXT: 0x110 R_AARCH64_TLSDESC_CALL [[VARSYM]] Index: test/tools/llvm-readobj/reloc-types.test =================================================================== --- test/tools/llvm-readobj/reloc-types.test +++ test/tools/llvm-readobj/reloc-types.test @@ -253,8 +253,8 @@ ELF-AARCH64: Type: R_AARCH64_TLSDESC_LD_PREL19 (560) ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADR_PREL21 (561) ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADR_PAGE21 (562) -ELF-AARCH64: Type: R_AARCH64_TLSDESC_LD64_LO12_NC (563) -ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADD_LO12_NC (564) +ELF-AARCH64: Type: R_AARCH64_TLSDESC_LD64_LO12 (563) +ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADD_LO12 (564) ELF-AARCH64: Type: R_AARCH64_TLSDESC_OFF_G1 (565) ELF-AARCH64: Type: R_AARCH64_TLSDESC_OFF_G0_NC (566) ELF-AARCH64: Type: R_AARCH64_TLSDESC_LDR (567)