Index: lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- lib/CodeGen/GlobalISel/IRTranslator.cpp +++ lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1067,7 +1067,16 @@ EntryBuilder.buildConstant(Reg, 0); else if (auto GV = dyn_cast(&C)) EntryBuilder.buildGlobalValue(Reg, GV); - else if (auto CE = dyn_cast(&C)) { + else if (auto CAZ = dyn_cast(&C)) { + if (!CAZ->getType()->isVectorTy()) + return false; + std::vector Ops; + for (unsigned i = 0; i < CAZ->getNumElements(); ++i) { + Constant &Elt = *CAZ->getElementValue(i); + Ops.push_back(getOrCreateVReg(Elt)); + } + EntryBuilder.buildMerge(Reg, Ops); + } else if (auto CE = dyn_cast(&C)) { switch(CE->getOpcode()) { #define HANDLE_INST(NUM, OPCODE, CLASS) \ case Instruction::OPCODE: return translate##OPCODE(*CE, EntryBuilder); Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll =================================================================== --- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -1303,3 +1303,28 @@ %res = extractelement <1 x i32> %vec, i32 0 ret i32 %res } + +define <2 x i32> @test_constantaggzerovector_v2i32() { +; CHECK-LABEL: name: test_constantaggzerovector_v2i32 +; CHECK: [[ZERO:%[0-9]+]](s32) = G_CONSTANT i32 0 +; CHECK: [[VEC:%[0-9]+]](<2 x s32>) = G_MERGE_VALUES [[ZERO]](s32), [[ZERO]](s32) +; CHECK: %d0 = COPY [[VEC]](<2 x s32>) + ret <2 x i32> zeroinitializer +} + +define <2 x float> @test_constantaggzerovector_v2f32() { +; CHECK-LABEL: name: test_constantaggzerovector_v2f32 +; CHECK: [[ZERO:%[0-9]+]](s32) = G_FCONSTANT float 0.000000e+00 +; CHECK: [[VEC:%[0-9]+]](<2 x s32>) = G_MERGE_VALUES [[ZERO]](s32), [[ZERO]](s32) +; CHECK: %d0 = COPY [[VEC]](<2 x s32>) + ret <2 x float> zeroinitializer +} + +define i32 @test_constantaggzerovector_v3i32() { +; CHECK-LABEL: name: test_constantaggzerovector_v3i32 +; CHECK: [[ZERO:%[0-9]+]](s32) = G_CONSTANT i32 0 +; CHECK: [[VEC:%[0-9]+]](<3 x s32>) = G_MERGE_VALUES [[ZERO]](s32), [[ZERO]](s32), [[ZERO]](s32) +; CHECK: G_EXTRACT_VECTOR_ELT [[VEC]](<3 x s32>) + %elt = extractelement <3 x i32> zeroinitializer, i32 1 + ret i32 %elt +}