Index: lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -979,7 +979,21 @@
     EntryBuilder.buildConstant(Reg, 0);
   else if (auto GV = dyn_cast<GlobalValue>(&C))
     EntryBuilder.buildGlobalValue(Reg, GV);
-  else if (auto CE = dyn_cast<ConstantExpr>(&C)) {
+  else if (auto CAZ = dyn_cast<ConstantAggregateZero>(&C)) {
+    if (!CAZ->getType()->isVectorTy()) {
+      if (!TPC->isGlobalISelAbortEnabled())
+        return false;
+      llvm_unreachable("unhandled constant aggregate zero");
+    }
+    std::vector<unsigned> Ops;
+    std::vector<uint64_t> Indices;
+    for (unsigned i = 0; i < CAZ->getNumElements(); ++i) {
+      Constant &Elt = *CAZ->getElementValue(i);
+      Ops.push_back(getOrCreateVReg(Elt));
+      Indices.push_back(i * CAZ->getType()->getScalarSizeInBits());
+    }
+    EntryBuilder.buildSequence(Reg, Ops, Indices);
+  } else if (auto CE = dyn_cast<ConstantExpr>(&C)) {
     switch(CE->getOpcode()) {
 #define HANDLE_INST(NUM, OPCODE, CLASS)                         \
       case Instruction::OPCODE: return translate##OPCODE(*CE, EntryBuilder);
Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -1189,3 +1189,12 @@
 
   ret void
 }
+
+define <2 x i32> @test_constant_agg_zero_vector() {
+; CHECK-LABEL: name: test_constant_agg_zero_vector
+; CHECK: [[ZERO:%[0-9]+]](s32) = G_CONSTANT i32 0
+; CHECK: [[RES:%[0-9]+]](<2 x s32>) = G_SEQUENCE [[ZERO]](s32), 0, [[ZERO]](s32), 32
+; CHECK: %d0 = COPY [[RES]](<2 x s32>)
+entry:
+	ret <2 x i32> zeroinitializer
+}