Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6557,34 +6557,6 @@ if (SimplifySelectOps(N, N1, N2)) return SDValue(N, 0); // Don't revisit N. - // If the VSELECT result requires splitting and the mask is provided by a - // SETCC, then split both nodes and its operands before legalization. This - // prevents the type legalizer from unrolling SETCC into scalar comparisons - // and enables future optimizations (e.g. min/max pattern matching on X86). - if (N0.getOpcode() == ISD::SETCC) { - EVT VT = N->getValueType(0); - - // Check if any splitting is required. - if (TLI.getTypeAction(*DAG.getContext(), VT) != - TargetLowering::TypeSplitVector) - return SDValue(); - - SDValue Lo, Hi, CCLo, CCHi, LL, LH, RL, RH; - std::tie(CCLo, CCHi) = SplitVSETCC(N0.getNode(), DAG); - std::tie(LL, LH) = DAG.SplitVectorOperand(N, 1); - std::tie(RL, RH) = DAG.SplitVectorOperand(N, 2); - - Lo = DAG.getNode(N->getOpcode(), DL, LL.getValueType(), CCLo, LL, RL); - Hi = DAG.getNode(N->getOpcode(), DL, LH.getValueType(), CCHi, LH, RH); - - // Add the new VSELECT nodes to the work list in case they need to be split - // again. - AddToWorklist(Lo.getNode()); - AddToWorklist(Hi.getNode()); - - return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); - } - // Fold (vselect (build_vector all_ones), N1, N2) -> N1 if (ISD::isBuildVectorAllOnes(N0.getNode())) return N1; Index: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -1089,6 +1089,10 @@ SDValue Cond = N->getOperand(0); EVT OpTy = N->getOperand(1).getValueType(); + if (N->getOpcode() == ISD::VSELECT) + if (SDValue Res = WidenVSELECTAndMask(N)) + return Res; + // Promote all the way up to the canonical SetCC type. EVT OpVT = N->getOpcode() == ISD::SELECT ? OpTy.getScalarType() : OpTy; Cond = PromoteTargetBoolean(Cond, OpVT); Index: lib/CodeGen/SelectionDAG/LegalizeTypes.h =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -719,6 +719,7 @@ SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N); SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N); SDValue WidenVecRes_SELECT(SDNode* N); + SDValue WidenVSELECTAndMask(SDNode *N); SDValue WidenVecRes_SELECT_CC(SDNode* N); SDValue WidenVecRes_SETCC(SDNode* N); SDValue WidenVecRes_UNDEF(SDNode *N); @@ -788,6 +789,13 @@ /// By default, the vector will be widened with undefined values. SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false); + /// Return a mask of vector type MaskVT to replace InMask. Also adjust + /// MaskVT to ToMaskVT if needed with vector extension or truncation. + SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT); + + /// Get the target mask VT, and widen if needed. + EVT getSETCCWidenedResultTy(SDValue SetCC); + //===--------------------------------------------------------------------===// // Generic Splitting: LegalizeTypesGeneric.cpp //===--------------------------------------------------------------------===// Index: lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp +++ lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp @@ -512,8 +512,24 @@ GetSplitOp(Op, Lo, Hi); } -void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, - SDValue &Hi) { +static std::pair SplitVSETCC(const SDNode *N, + SelectionDAG &DAG) { + SDLoc DL(N); + EVT LoVT, HiVT; + std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + + // Split the inputs. + SDValue Lo, Hi, LL, LH, RL, RH; + std::tie(LL, LH) = DAG.SplitVectorOperand(N, 0); + std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1); + + Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2)); + Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); + + return std::make_pair(Lo, Hi); +} + +void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) { SDValue LL, LH, RL, RH, CL, CH; SDLoc dl(N); GetSplitOp(N->getOperand(1), LL, LH); @@ -522,9 +538,16 @@ SDValue Cond = N->getOperand(0); CL = CH = Cond; if (Cond.getValueType().isVector()) { + if (SDValue Res = WidenVSELECTAndMask(N)) + std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl); + // It seems to improve code to generate two narrow SETCCs as opposed to + // splitting a wide result vector. + else if (Cond.getOpcode() == ISD::SETCC) + std::tie(CL, CH) = SplitVSETCC(Cond.getNode(), DAG); // Check if there are already splitted versions of the vector available and // use those instead of splitting the mask operand again. - if (getTypeAction(Cond.getValueType()) == TargetLowering::TypeSplitVector) + else if (getTypeAction(Cond.getValueType()) == + TargetLowering::TypeSplitVector) GetSplitVector(Cond, CL, CH); else std::tie(CL, CH) = DAG.SplitVector(Cond, dl); Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -2864,6 +2864,212 @@ WidenVT, N->getOperand(0)); } +// Return true if this is a node that could have two SETCCs as operands. +static inline bool isLogicalMaskOp(unsigned Opcode) { + switch (Opcode) { + case ISD::AND: + case ISD::OR: + case ISD::XOR: + return true; + } + return false; +} + +// This is used just for the assert in convertMask(). Check that this either +// a SETCC or a previously handled SETCC by convertMask(). +#ifndef NDEBUG +static inline bool isSETCCorConvertedSETCC(SDValue N) { + if (N.getOpcode() == ISD::EXTRACT_SUBVECTOR) + N = N.getOperand(0); + else if (N.getOpcode() == ISD::CONCAT_VECTORS) { + for (unsigned i = 1; i < N->getNumOperands(); ++i) + if (!N->getOperand(i)->isUndef()) + return false; + N = N.getOperand(0); + } + + if (N.getOpcode() == ISD::TRUNCATE) + N = N.getOperand(0); + else if (N.getOpcode() == ISD::SIGN_EXTEND) + N = N.getOperand(0); + + return (N.getOpcode() == ISD::SETCC); +} +#endif + +// Return a mask of vector type MaskVT to replace InMask. Also adjust MaskVT +// to ToMaskVT if needed with vector extension or truncation. +SDValue DAGTypeLegalizer::convertMask(SDValue InMask, EVT MaskVT, + EVT ToMaskVT) { + LLVMContext &Ctx = *DAG.getContext(); + + // Currently a SETCC or a AND/OR/XOR with two SETCCs are handled. + unsigned InMaskOpc = InMask->getOpcode(); + assert((InMaskOpc == ISD::SETCC || + (isLogicalMaskOp(InMaskOpc) && + isSETCCorConvertedSETCC(InMask->getOperand(0)) && + isSETCCorConvertedSETCC(InMask->getOperand(1)))) && + "Unexpected mask argument."); + + // Make a new Mask node, with a legal result VT. + SmallVector Ops; + for (unsigned i = 0; i < InMask->getNumOperands(); ++i) + Ops.push_back(InMask->getOperand(i)); + SDValue Mask = DAG.getNode(InMaskOpc, SDLoc(InMask), MaskVT, Ops); + + // If MaskVT has smaller or bigger elements than ToMaskVT, a vector sign + // extend or truncate is needed. + unsigned MaskScalarBits = MaskVT.getScalarSizeInBits(); + unsigned ToMaskScalBits = ToMaskVT.getScalarSizeInBits(); + if (MaskScalarBits < ToMaskScalBits) { + EVT ExtVT = EVT::getVectorVT(Ctx, ToMaskVT.getVectorElementType(), + MaskVT.getVectorNumElements()); + Mask = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(Mask), ExtVT, Mask); + } else if (MaskScalarBits > ToMaskScalBits) { + EVT TruncVT = EVT::getVectorVT(Ctx, ToMaskVT.getVectorElementType(), + MaskVT.getVectorNumElements()); + Mask = DAG.getNode(ISD::TRUNCATE, SDLoc(Mask), TruncVT, Mask); + } + + assert(Mask->getValueType(0).getScalarSizeInBits() == + ToMaskVT.getScalarSizeInBits() && + "Mask should have the right element size by now."); + + // Adjust Mask to the right number of elements. + unsigned CurrMaskNumEls = Mask->getValueType(0).getVectorNumElements(); + if (CurrMaskNumEls > ToMaskVT.getVectorNumElements()) { + MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout()); + SDValue ZeroIdx = DAG.getConstant(0, SDLoc(Mask), IdxTy); + Mask = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(Mask), ToMaskVT, Mask, + ZeroIdx); + } else if (CurrMaskNumEls < ToMaskVT.getVectorNumElements()) { + unsigned NumSubVecs = (ToMaskVT.getVectorNumElements() / CurrMaskNumEls); + EVT SubVT = Mask->getValueType(0); + SmallVector SubConcatOps(NumSubVecs); + SubConcatOps[0] = Mask; + for (unsigned i = 1; i < NumSubVecs; ++i) + SubConcatOps[i] = DAG.getUNDEF(SubVT); + Mask = + DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Mask), ToMaskVT, SubConcatOps); + } + + assert((Mask->getValueType(0) == ToMaskVT) && + "A mask of ToMaskVT should have been produced by now."); + + return Mask; +} + +// Get the target mask VT, and widen if needed. +EVT DAGTypeLegalizer::getSETCCWidenedResultTy(SDValue SetCC) { + assert(SetCC->getOpcode() == ISD::SETCC); + LLVMContext &Ctx = *DAG.getContext(); + EVT MaskVT = getSetCCResultType(SetCC->getOperand(0).getValueType()); + if (getTypeAction(MaskVT) == TargetLowering::TypeWidenVector) + MaskVT = TLI.getTypeToTransformTo(Ctx, MaskVT); + return MaskVT; +} + +// This method tries to handle VSELECT and its mask by legalizing operands +// (which may require widening) and if needed adjusting the mask vector type +// to match that of the VSELECT. Without it, many cases end up with +// scalarization of the SETCC, with many unnecessary instructions. +SDValue DAGTypeLegalizer::WidenVSELECTAndMask(SDNode *N) { + LLVMContext &Ctx = *DAG.getContext(); + SDValue Cond = N->getOperand(0); + + if (N->getOpcode() != ISD::VSELECT) + return SDValue(); + + if (Cond->getOpcode() != ISD::SETCC && !isLogicalMaskOp(Cond->getOpcode())) + return SDValue(); + + // If this is a splitted VSELECT that was previously already handled, do + // nothing. + if (Cond->getValueType(0).getScalarSizeInBits() != 1) + return SDValue(); + + EVT VSelVT = N->getValueType(0); + // Only handle vector types which are a power of 2. + if (!isPowerOf2_64(VSelVT.getSizeInBits())) + return SDValue(); + + // Don't touch if this will be scalarized. + EVT FinalVT = VSelVT; + while (getTypeAction(FinalVT) == TargetLowering::TypeSplitVector) + FinalVT = EVT::getVectorVT(Ctx, FinalVT.getVectorElementType(), + FinalVT.getVectorNumElements() / 2); + if (FinalVT.getVectorNumElements() == 1) + return SDValue(); + + // If there is support for an i1 vector mask, don't touch. + if (Cond.getOpcode() == ISD::SETCC) { + EVT SetCCOpVT = Cond->getOperand(0).getValueType(); + while (TLI.getTypeAction(Ctx, SetCCOpVT) != TargetLowering::TypeLegal) + SetCCOpVT = TLI.getTypeToTransformTo(Ctx, SetCCOpVT); + EVT SetCCResVT = getSetCCResultType(SetCCOpVT); + if (SetCCResVT.getScalarSizeInBits() == 1) + return SDValue(); + } + + // Get the VT and operands for VSELECT, and widen if needed. + SDValue VSelOp1 = N->getOperand(1); + SDValue VSelOp2 = N->getOperand(2); + if (getTypeAction(VSelVT) == TargetLowering::TypeWidenVector) { + VSelVT = TLI.getTypeToTransformTo(Ctx, VSelVT); + VSelOp1 = GetWidenedVector(VSelOp1); + VSelOp2 = GetWidenedVector(VSelOp2); + } + + // The mask of the VSELECT should have integer elements. + EVT ToMaskVT = VSelVT; + if (!ToMaskVT.getScalarType().isInteger()) + ToMaskVT = ToMaskVT.changeVectorElementTypeToInteger(); + + SDValue Mask; + if (Cond->getOpcode() == ISD::SETCC) { + EVT MaskVT = getSETCCWidenedResultTy(Cond); + Mask = convertMask(Cond, MaskVT, ToMaskVT); + } else if (isLogicalMaskOp(Cond->getOpcode()) && + Cond->getOperand(0).getOpcode() == ISD::SETCC && + Cond->getOperand(1).getOpcode() == ISD::SETCC) { + // Cond is (AND/OR/XOR (SETCC, SETCC)) + SDValue SETCC0 = Cond->getOperand(0); + SDValue SETCC1 = Cond->getOperand(1); + EVT VT0 = getSETCCWidenedResultTy(SETCC0); + EVT VT1 = getSETCCWidenedResultTy(SETCC1); + unsigned ScalarBits0 = VT0.getScalarSizeInBits(); + unsigned ScalarBits1 = VT1.getScalarSizeInBits(); + unsigned ScalarBits_ToMask = ToMaskVT.getScalarSizeInBits(); + EVT MaskVT; + // If the two SETCCs have different VTs, either extend/truncate one of + // them to the other "towards" ToMaskVT, or truncate one and extend the + // other to ToMaskVT. + if (ScalarBits0 != ScalarBits1) { + EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); + EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); + if (ScalarBits_ToMask >= WideVT.getScalarSizeInBits()) + MaskVT = WideVT; + else if (ScalarBits_ToMask <= NarrowVT.getScalarSizeInBits()) + MaskVT = NarrowVT; + else + MaskVT = ToMaskVT; + } else + // If the two SETCCs have the same VT, don't change it. + MaskVT = VT0; + + // Make new SETCCs and logical nodes. + SETCC0 = convertMask(SETCC0, VT0, MaskVT); + SETCC1 = convertMask(SETCC1, VT1, MaskVT); + Cond = DAG.getNode(Cond->getOpcode(), SDLoc(Cond), MaskVT, SETCC0, SETCC1); + + // Convert the logical op for VSELECT if needed. + Mask = convertMask(Cond, MaskVT, ToMaskVT); + } else + return SDValue(); + + return DAG.getNode(ISD::VSELECT, SDLoc(N), VSelVT, Mask, VSelOp1, VSelOp2); +} + SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) { EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); unsigned WidenNumElts = WidenVT.getVectorNumElements(); @@ -2871,6 +3077,9 @@ SDValue Cond1 = N->getOperand(0); EVT CondVT = Cond1.getValueType(); if (CondVT.isVector()) { + if (SDValue Res = WidenVSELECTAndMask(N)) + return Res; + EVT CondEltVT = CondVT.getVectorElementType(); EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(), CondEltVT, WidenNumElts); Index: test/CodeGen/ARM/vuzp.ll =================================================================== --- test/CodeGen/ARM/vuzp.ll +++ test/CodeGen/ARM/vuzp.ll @@ -318,33 +318,29 @@ ret void } -define <8 x i8> @vuzp_trunc(<8 x i8> %in0, <8 x i8> %in1, <8 x i32> %cmp0, <8 x i32> %cmp1) { +define <8 x i8> @cmpsel_trunc(<8 x i8> %in0, <8 x i8> %in1, <8 x i32> %cmp0, <8 x i32> %cmp1) { ; In order to create the select we need to truncate the vcgt result from a vector of i32 to a vector of i8. ; This results in a build_vector with mismatched types. We will generate two vmovn.i32 instructions to -; truncate from i32 to i16 and one vuzp to perform the final truncation for i8. -; CHECK-LABEL: vuzp_trunc: +; truncate from i32 to i16 and one vmovn.i16 to perform the final truncation for i8. +; CHECK-LABEL: cmpsel_trunc: ; CHECK: @ BB#0: ; CHECK-NEXT: .save {r4, r5, r11, lr} ; CHECK-NEXT: push {r4, r5, r11, lr} -; CHECK-NEXT: add r12, sp, #48 -; CHECK-NEXT: add lr, sp, #16 ; CHECK-NEXT: add r4, sp, #64 ; CHECK-NEXT: add r5, sp, #32 +; CHECK-NEXT: add r12, sp, #48 +; CHECK-NEXT: add lr, sp, #16 ; CHECK-NEXT: vld1.64 {d16, d17}, [r5] ; CHECK-NEXT: vld1.64 {d18, d19}, [r4] ; CHECK-NEXT: vld1.64 {d20, d21}, [lr] ; CHECK-NEXT: vld1.64 {d22, d23}, [r12] ; CHECK-NEXT: vcgt.u32 q8, q9, q8 ; CHECK-NEXT: vcgt.u32 q9, q11, q10 -; CHECK-NEXT: vmovn.i32 d16, q8 -; CHECK-NEXT: vmovn.i32 d17, q9 -; CHECK-NEXT: vmov.i8 d18, #0x7 -; CHECK-NEXT: vmov d19, r0, r1 -; CHECK-NEXT: vuzp.8 d17, d16 -; CHECK-NEXT: vneg.s8 d16, d18 -; CHECK-NEXT: vshl.i8 d17, d17, #7 +; CHECK-NEXT: vmovn.i32 d17, q8 +; CHECK-NEXT: vmovn.i32 d16, q9 ; CHECK-NEXT: vmov d18, r2, r3 -; CHECK-NEXT: vshl.s8 d16, d17, d16 +; CHECK-NEXT: vmov d19, r0, r1 +; CHECK-NEXT: vmovn.i16 d16, q8 ; CHECK-NEXT: vbsl d16, d19, d18 ; CHECK-NEXT: vmov r0, r1, d16 ; CHECK-NEXT: pop {r4, r5, r11, lr} Index: test/CodeGen/NVPTX/f16x2-instructions.ll =================================================================== --- test/CodeGen/NVPTX/f16x2-instructions.ll +++ test/CodeGen/NVPTX/f16x2-instructions.ll @@ -422,17 +422,10 @@ ; CHECK-DAG: ld.param.v2.f32 {[[B0:%f[0-9]+]], [[B1:%f[0-9]+]]}, [test_select_cc_f32_f16_param_1]; ; CHECK-DAG: ld.param.b32 [[C:%hh[0-9]+]], [test_select_cc_f32_f16_param_2]; ; CHECK-DAG: ld.param.b32 [[D:%hh[0-9]+]], [test_select_cc_f32_f16_param_3]; -; CHECK-DAG: mov.b32 {[[C0:%h[0-9]+]], [[C1:%h[0-9]+]]}, [[C]] -; CHECK-DAG: mov.b32 {[[D0:%h[0-9]+]], [[D1:%h[0-9]+]]}, [[D]] ; -; TODO: Currently DAG combiner scalarizes setcc before we can lower it to setp.f16x2. -; We'd like to see this instruction: -; CHECK-F16-NOTYET: setp.neu.f16x2 [[P0:%p[0-9]+]]|[[P1:%p[0-9]+]], [[C]], [[D]] -; But we end up with a pair of scalar instances of it instead: -; CHECK-F16-DAG: setp.neu.f16 [[P0:%p[0-9]+]], [[C0]], [[D0]] -; CHECK-F16-DAG: setp.neu.f16 [[P1:%p[0-9]+]], [[C1]], [[D1]] - - +; CHECK-F16: setp.neu.f16x2 [[P0:%p[0-9]+]]|[[P1:%p[0-9]+]], [[C]], [[D]] +; CHECK-NOF16-DAG: mov.b32 {[[C0:%h[0-9]+]], [[C1:%h[0-9]+]]}, [[C]] +; CHECK-NOF16-DAG: mov.b32 {[[D0:%h[0-9]+]], [[D1:%h[0-9]+]]}, [[D]] ; CHECK-NOF16-DAG: cvt.f32.f16 [[DF0:%f[0-9]+]], [[D0]]; ; CHECK-NOF16-DAG: cvt.f32.f16 [[CF0:%f[0-9]+]], [[C0]]; ; CHECK-NOF16-DAG: cvt.f32.f16 [[DF1:%f[0-9]+]], [[D1]]; Index: test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll =================================================================== --- /dev/null +++ test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll @@ -0,0 +1,5784 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; +; Test that a vector select with a logic combination of two compares do not +; produce any unnecessary pack, unpack or shift instructions. +; And, Or and Xor are tested. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s + + +define <2 x i8> @fun0(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun0: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun1(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun1: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i8> @fun2(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun2: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i32> @fun3(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun3: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i32> @fun4(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun4: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i16> @fun5(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun5: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun6(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun6: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i8> @fun7(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun7: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun8(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun8: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun9(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun9: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i8> @fun10(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun10: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i8> @fun11(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun11: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI11_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x double> @fun12(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { +; CHECK-LABEL: fun12: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x double> %val5, <2 x double> %val6 + ret <2 x double> %sel +} + +define <2 x i16> @fun13(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun13: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI13_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i16> @fun14(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun14: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun15(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun15: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i64> @fun16(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun16: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun17(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun17: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun18(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun18: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun19(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun19: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i16> @fun20(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun20: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI20_0 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun21(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun21: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun22(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun22: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun23(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun23: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI23_0 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun24(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun24: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i32> @fun25(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun25: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <4 x i16> @fun26(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun26: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i32> @fun27(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun27: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun28(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun28: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i32> @fun29(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun29: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v27 +; CHECK-NEXT: vceqg %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i16> @fun30(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun30: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i8> @fun31(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun31: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI31_0 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <4 x i32> @fun32(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun32: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun33(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun33: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v25, %v29 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i64> @fun34(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun34: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x float> @fun35(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun35: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x i16> @fun36(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun36: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x float> @fun37(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun37: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x double> @fun38(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { +; CHECK-LABEL: fun38: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x double> %val5, <4 x double> %val6 + ret <4 x double> %sel +} + +define <4 x i8> @fun39(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun39: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: larl %r1, .LCPI39_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <8 x i8> @fun40(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun40: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun41(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun41: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun42(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun42: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i64> @fun43(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun43: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vceqf %v0, %v28, %v25 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v27 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i32> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <8 x i8> @fun44(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun44: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v31 +; CHECK-NEXT: vceqg %v2, %v28, %v29 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vlrepg %v1, 200(%r15) +; CHECK-NEXT: vlrepg %v2, 192(%r15) +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun45(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun45: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun46(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun46: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i32> @fun47(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun47: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x double> @fun48(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun48: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v31, %v31 +; CHECK-NEXT: vmrlf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v31, %v31 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x double> @fun49(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun49: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vn %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x i64> @fun50(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun50: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vn %v1, %v1, %v2 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vn %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vfchdb %v2, %v27, %v2 +; CHECK-NEXT: vn %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <8 x float> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <16 x i8> @fun51(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun51: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun52(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun52: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i64> @fun53(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun53: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqh %v0, %v28, %v25 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v0 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vceqh %v2, %v30, %v27 +; CHECK-NEXT: vlr %v30, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vn %v1, %v1, %v2 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vmrlg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun54(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun54: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vmrlg %v3, %v1, %v1 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vn %v2, %v3, %v2 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 416(%r15) +; CHECK-NEXT: vl %v5, 288(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v3, %v27, %v3 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v1, %v1, %v3 +; CHECK-NEXT: vuphf %v3, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun55(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun55: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v28, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 448(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vpkf %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 464(%r15) +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 480(%r15) +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 496(%r15) +; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 512(%r15) +; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v31, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 560(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i16> @fun56(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun56: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlf %v2, %v0, %v0 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v0, %v3, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i8> @fun57(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun57: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vfchdb %v2, %v29, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v2, %v30, %v2 +; CHECK-NEXT: vfchdb %v3, %v28, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i8> @fun58(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun58: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v25, %v29 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun59(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun59: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i32> @fun60(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun60: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v27, %v31 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x i8> @fun61(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun61: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v31, %v0 +; CHECK-NEXT: vceqf %v1, %v29, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v27, %v1 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i32> @fun62(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun62: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vn %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqg %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x double> @fun63(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { +; CHECK-LABEL: fun63: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vmrlf %v1, %v0, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 416(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vn %v1, %v1, %v2 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vuphh %v4, %v3 +; CHECK-NEXT: vn %v2, %v4, %v2 +; CHECK-NEXT: vuphf %v4, %v2 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vmrlf %v5, %v4, %v4 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v4, %v4 +; CHECK-NEXT: vmrlg %v3, %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v31, %v31 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v4, %v6, %v4 +; CHECK-NEXT: vl %v6, 320(%r15) +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v5, 448(%r15) +; CHECK-NEXT: vn %v3, %v3, %v4 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 +; CHECK-NEXT: vl %v4, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vmrlg %v0, %v3, %v3 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x double> %val5, <16 x double> %val6 + ret <16 x double> %sel +} + +define <16 x i32> @fun64(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun64: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vn %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vfchdb %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <2 x i8> @fun65(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun65: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun66(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun66: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i8> @fun67(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun67: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i32> @fun68(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun68: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i32> @fun69(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun69: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i16> @fun70(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun70: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun71(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun71: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i8> @fun72(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun72: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun73(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun73: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun74(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun74: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i8> @fun75(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun75: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i8> @fun76(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun76: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI76_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x double> @fun77(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { +; CHECK-LABEL: fun77: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x double> %val5, <2 x double> %val6 + ret <2 x double> %sel +} + +define <2 x i16> @fun78(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun78: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI78_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i16> @fun79(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun79: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun80(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun80: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i64> @fun81(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun81: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun82(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun82: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun83(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun83: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun84(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun84: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i16> @fun85(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun85: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI85_0 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun86(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun86: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun87(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun87: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun88(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun88: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI88_0 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun89(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun89: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i32> @fun90(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun90: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <4 x i16> @fun91(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun91: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i32> @fun92(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun92: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun93(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun93: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i32> @fun94(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun94: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v27 +; CHECK-NEXT: vceqg %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i16> @fun95(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun95: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i8> @fun96(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun96: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI96_0 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <4 x i32> @fun97(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun97: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun98(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun98: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v25, %v29 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i64> @fun99(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun99: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x float> @fun100(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun100: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x i16> @fun101(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun101: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x float> @fun102(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun102: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x double> @fun103(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { +; CHECK-LABEL: fun103: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x double> %val5, <4 x double> %val6 + ret <4 x double> %sel +} + +define <4 x i8> @fun104(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun104: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: larl %r1, .LCPI104_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <8 x i8> @fun105(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun105: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun106(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun106: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun107(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun107: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i64> @fun108(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun108: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vceqf %v0, %v28, %v25 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v27 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i32> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <8 x i8> @fun109(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun109: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v31 +; CHECK-NEXT: vceqg %v2, %v28, %v29 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vlrepg %v1, 200(%r15) +; CHECK-NEXT: vlrepg %v2, 192(%r15) +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun110(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun110: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun111(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun111: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i32> @fun112(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun112: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x double> @fun113(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun113: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v31, %v31 +; CHECK-NEXT: vmrlf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v31, %v31 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x double> @fun114(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun114: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vo %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x i64> @fun115(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun115: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vo %v1, %v1, %v2 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vo %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vfchdb %v2, %v27, %v2 +; CHECK-NEXT: vo %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <8 x float> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <16 x i8> @fun116(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun116: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun117(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun117: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i64> @fun118(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun118: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqh %v0, %v28, %v25 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v0 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vceqh %v2, %v30, %v27 +; CHECK-NEXT: vlr %v30, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vo %v1, %v1, %v2 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vmrlg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun119(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun119: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vmrlg %v3, %v1, %v1 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vo %v2, %v3, %v2 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 416(%r15) +; CHECK-NEXT: vl %v5, 288(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v3, %v27, %v3 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v1, %v1, %v3 +; CHECK-NEXT: vuphf %v3, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun120(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun120: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v28, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 448(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vpkf %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 464(%r15) +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 480(%r15) +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 496(%r15) +; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 512(%r15) +; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v31, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 560(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i16> @fun121(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun121: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlf %v2, %v0, %v0 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v0, %v3, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i8> @fun122(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun122: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vfchdb %v2, %v29, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v2, %v30, %v2 +; CHECK-NEXT: vfchdb %v3, %v28, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i8> @fun123(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun123: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v25, %v29 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun124(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun124: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i32> @fun125(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun125: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v27, %v31 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x i8> @fun126(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun126: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v31, %v0 +; CHECK-NEXT: vceqf %v1, %v29, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v27, %v1 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i32> @fun127(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun127: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vo %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqg %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x double> @fun128(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { +; CHECK-LABEL: fun128: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vmrlf %v1, %v0, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 416(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vo %v1, %v1, %v2 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vuphh %v4, %v3 +; CHECK-NEXT: vo %v2, %v4, %v2 +; CHECK-NEXT: vuphf %v4, %v2 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vmrlf %v5, %v4, %v4 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v4, %v4 +; CHECK-NEXT: vmrlg %v3, %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v31, %v31 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v4, %v6, %v4 +; CHECK-NEXT: vl %v6, 320(%r15) +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v5, 448(%r15) +; CHECK-NEXT: vo %v3, %v3, %v4 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 +; CHECK-NEXT: vl %v4, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vmrlg %v0, %v3, %v3 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x double> %val5, <16 x double> %val6 + ret <16 x double> %sel +} + +define <16 x i32> @fun129(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun129: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vo %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vfchdb %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <2 x i8> @fun130(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun130: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun131(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun131: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i8> @fun132(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun132: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i32> @fun133(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun133: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i32> @fun134(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun134: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i16> @fun135(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun135: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun136(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun136: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i8> @fun137(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun137: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun138(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun138: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun139(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun139: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i8> @fun140(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun140: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i8> @fun141(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun141: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI141_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x double> @fun142(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { +; CHECK-LABEL: fun142: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x double> %val5, <2 x double> %val6 + ret <2 x double> %sel +} + +define <2 x i16> @fun143(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun143: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI143_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i16> @fun144(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun144: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun145(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun145: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i64> @fun146(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun146: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun147(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun147: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun148(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun148: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun149(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun149: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i16> @fun150(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun150: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI150_0 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun151(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun151: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun152(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun152: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun153(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun153: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI153_0 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun154(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun154: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i32> @fun155(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun155: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <4 x i16> @fun156(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun156: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i32> @fun157(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun157: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun158(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun158: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i32> @fun159(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun159: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v27 +; CHECK-NEXT: vceqg %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i16> @fun160(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun160: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i8> @fun161(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun161: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI161_0 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <4 x i32> @fun162(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun162: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun163(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun163: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v25, %v29 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i64> @fun164(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun164: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x float> @fun165(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun165: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x i16> @fun166(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun166: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x float> @fun167(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun167: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x double> @fun168(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { +; CHECK-LABEL: fun168: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x double> %val5, <4 x double> %val6 + ret <4 x double> %sel +} + +define <4 x i8> @fun169(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun169: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: larl %r1, .LCPI169_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <8 x i8> @fun170(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun170: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun171(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun171: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun172(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun172: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i64> @fun173(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun173: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vceqf %v0, %v28, %v25 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v27 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i32> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <8 x i8> @fun174(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun174: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v31 +; CHECK-NEXT: vceqg %v2, %v28, %v29 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vlrepg %v1, 200(%r15) +; CHECK-NEXT: vlrepg %v2, 192(%r15) +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun175(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun175: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun176(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun176: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i32> @fun177(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun177: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x double> @fun178(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun178: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v31, %v31 +; CHECK-NEXT: vmrlf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v31, %v31 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x double> @fun179(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun179: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vx %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x i64> @fun180(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun180: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vx %v1, %v1, %v2 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vx %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vfchdb %v2, %v27, %v2 +; CHECK-NEXT: vx %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <8 x float> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <16 x i8> @fun181(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun181: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun182(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun182: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i64> @fun183(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun183: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqh %v0, %v28, %v25 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v0 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vceqh %v2, %v30, %v27 +; CHECK-NEXT: vlr %v30, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vx %v1, %v1, %v2 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vmrlg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun184(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun184: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vmrlg %v3, %v1, %v1 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vx %v2, %v3, %v2 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 416(%r15) +; CHECK-NEXT: vl %v5, 288(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v3, %v27, %v3 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v1, %v1, %v3 +; CHECK-NEXT: vuphf %v3, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun185(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun185: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v28, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 448(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vpkf %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 464(%r15) +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 480(%r15) +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 496(%r15) +; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 512(%r15) +; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v31, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 560(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i16> @fun186(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun186: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlf %v2, %v0, %v0 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v0, %v3, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i8> @fun187(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun187: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vfchdb %v2, %v29, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v2, %v30, %v2 +; CHECK-NEXT: vfchdb %v3, %v28, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i8> @fun188(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun188: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v25, %v29 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun189(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun189: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i32> @fun190(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun190: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v27, %v31 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x i8> @fun191(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun191: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v31, %v0 +; CHECK-NEXT: vceqf %v1, %v29, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v27, %v1 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i32> @fun192(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun192: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vx %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqg %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x double> @fun193(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { +; CHECK-LABEL: fun193: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vmrlf %v1, %v0, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 416(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vx %v1, %v1, %v2 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vuphh %v4, %v3 +; CHECK-NEXT: vx %v2, %v4, %v2 +; CHECK-NEXT: vuphf %v4, %v2 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vmrlf %v5, %v4, %v4 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v4, %v4 +; CHECK-NEXT: vmrlg %v3, %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v31, %v31 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v4, %v6, %v4 +; CHECK-NEXT: vl %v6, 320(%r15) +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v5, 448(%r15) +; CHECK-NEXT: vx %v3, %v3, %v4 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 +; CHECK-NEXT: vl %v4, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vmrlg %v0, %v3, %v3 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x double> %val5, <16 x double> %val6 + ret <16 x double> %sel +} + +define <16 x i32> @fun194(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun194: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vx %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vfchdb %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + Index: test/CodeGen/SystemZ/vec-cmpsel.ll =================================================================== --- /dev/null +++ test/CodeGen/SystemZ/vec-cmpsel.ll @@ -0,0 +1,3378 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; +; Test that vector compare / select combinations do not produce any +; unnecessary pack /unpack / shift instructions. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s + + +define <2 x i8> @fun0(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun0: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun1(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun1: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun2(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun2: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun3(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun3: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun4(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun4: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun5(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun5: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun6(<2 x i16> %val1, <2 x i16> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun6: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun7(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun7: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun8(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun8: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun9(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun9: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun10(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun10: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun11(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun11: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun12(<2 x i32> %val1, <2 x i32> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun12: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI12_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun13(<2 x i32> %val1, <2 x i32> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun13: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun14(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun14: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun15(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun15: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun16(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun16: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun17(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun17: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun18(<2 x i64> %val1, <2 x i64> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun18: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vrepih %v1, 1807 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun19(<2 x i64> %val1, <2 x i64> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun19: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI19_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun20(<2 x i64> %val1, <2 x i64> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun20: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun21(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun21: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun22(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun22: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun23(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun23: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <4 x i8> @fun24(<4 x i8> %val1, <4 x i8> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun24: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun25(<4 x i8> %val1, <4 x i8> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun25: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun26(<4 x i8> %val1, <4 x i8> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun26: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun27(<4 x i8> %val1, <4 x i8> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun27: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun28(<4 x i8> %val1, <4 x i8> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun28: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun29(<4 x i8> %val1, <4 x i8> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun29: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun30(<4 x i16> %val1, <4 x i16> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun30: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun31(<4 x i16> %val1, <4 x i16> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun31: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun32(<4 x i16> %val1, <4 x i16> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun32: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun33(<4 x i16> %val1, <4 x i16> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun33: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun34(<4 x i16> %val1, <4 x i16> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun34: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun35(<4 x i16> %val1, <4 x i16> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun35: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun36(<4 x i32> %val1, <4 x i32> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun36: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI36_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun37(<4 x i32> %val1, <4 x i32> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun37: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun38(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun38: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun39(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun39: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun40(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun40: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun41(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun41: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun42(<4 x i64> %val1, <4 x i64> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun42: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI42_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun43(<4 x i64> %val1, <4 x i64> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun43: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI43_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun44(<4 x i64> %val1, <4 x i64> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun44: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun45(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun45: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun46(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun46: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun47(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun47: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <8 x i8> @fun48(<8 x i8> %val1, <8 x i8> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun48: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun49(<8 x i8> %val1, <8 x i8> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun49: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun50(<8 x i8> %val1, <8 x i8> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun50: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun51(<8 x i8> %val1, <8 x i8> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun51: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 6 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun52(<8 x i8> %val1, <8 x i8> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun52: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun53(<8 x i8> %val1, <8 x i8> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun53: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 6 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun54(<8 x i16> %val1, <8 x i16> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun54: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun55(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun55: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun56(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun56: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun57(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun57: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun58(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun58: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun59(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun59: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun60(<8 x i32> %val1, <8 x i32> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun60: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI60_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun61(<8 x i32> %val1, <8 x i32> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun61: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun62(<8 x i32> %val1, <8 x i32> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun62: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun63(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun63: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun64(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun64: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun65(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun65: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun66(<8 x i64> %val1, <8 x i64> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun66: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v27 +; CHECK-NEXT: vceqg %v2, %v24, %v25 +; CHECK-NEXT: larl %r1, .LCPI66_0 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vlrepg %v1, 168(%r15) +; CHECK-NEXT: vlrepg %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun67(<8 x i64> %val1, <8 x i64> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun67: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v27 +; CHECK-NEXT: vceqg %v2, %v24, %v25 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun68(<8 x i64> %val1, <8 x i64> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun68: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vceqg %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun69(<8 x i64> %val1, <8 x i64> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun69: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun70(<8 x i64> %val1, <8 x i64> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun70: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vceqg %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun71(<8 x i64> %val1, <8 x i64> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun71: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <16 x i8> @fun72(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun72: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun73(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun73: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun74(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun74: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun75(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun75: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v2, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v27, %v2, %v1 +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v25, %v29, %v2, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v31, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun76(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun76: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun77(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun77: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v2, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v27, %v2, %v1 +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v25, %v29, %v2, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v31, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun78(<16 x i16> %val1, <16 x i16> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun78: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v26, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun79(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun79: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqh %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun80(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun80: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun81(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun81: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v27, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsldb %v0, %v1, %v1, 12 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun82(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun82: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun83(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun83: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v27, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsldb %v0, %v1, %v1, 12 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun84(<16 x i32> %val1, <16 x i32> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun84: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vceqf %v1, %v28, %v29 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v27 +; CHECK-NEXT: vceqf %v2, %v24, %v25 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun85(<16 x i32> %val1, <16 x i32> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun85: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v26, %v27 +; CHECK-NEXT: vceqf %v1, %v24, %v25 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vceqf %v1, %v28, %v29 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun86(<16 x i32> %val1, <16 x i32> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun86: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqf %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun87(<16 x i32> %val1, <16 x i32> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun87: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v25 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vceqf %v2, %v26, %v27 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vceqf %v3, %v28, %v29 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vceqf %v4, %v30, %v31 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun88(<16 x i32> %val1, <16 x i32> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun88: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqf %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun89(<16 x i32> %val1, <16 x i32> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun89: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v25 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vceqf %v2, %v26, %v27 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vceqf %v3, %v28, %v29 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vceqf %v4, %v30, %v31 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun90(<16 x i64> %val1, <16 x i64> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun90: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vceqg %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v26, %v2 +; CHECK-NEXT: vceqg %v3, %v24, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun91(<16 x i64> %val1, <16 x i64> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun91: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqg %v1, %v26, %v1 +; CHECK-NEXT: vceqg %v2, %v24, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun92(<16 x i64> %val1, <16 x i64> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun92: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun93(<16 x i64> %val1, <16 x i64> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun93: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vceqg %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun94(<16 x i64> %val1, <16 x i64> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun94: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun95(<16 x i64> %val1, <16 x i64> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun95: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vceqg %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <2 x i8> @fun96(<2 x float> %val1, <2 x float> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun96: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: larl %r1, .LCPI96_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun97(<2 x float> %val1, <2 x float> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun97: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun98(<2 x float> %val1, <2 x float> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun98: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun99(<2 x float> %val1, <2 x float> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun99: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun100(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun100: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun101(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun101: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun102(<2 x double> %val1, <2 x double> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun102: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vrepih %v1, 1807 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun103(<2 x double> %val1, <2 x double> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun103: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI103_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun104(<2 x double> %val1, <2 x double> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun104: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun105(<2 x double> %val1, <2 x double> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun105: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun106(<2 x double> %val1, <2 x double> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun106: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun107(<2 x double> %val1, <2 x double> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun107: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <4 x i8> @fun108(<4 x float> %val1, <4 x float> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun108: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: larl %r1, .LCPI108_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun109(<4 x float> %val1, <4 x float> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun109: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun110(<4 x float> %val1, <4 x float> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun110: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun111(<4 x float> %val1, <4 x float> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun111: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun112(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun112: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun113(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun113: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun114(<4 x double> %val1, <4 x double> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun114: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI114_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun115(<4 x double> %val1, <4 x double> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun115: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI115_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun116(<4 x double> %val1, <4 x double> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun116: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun117(<4 x double> %val1, <4 x double> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun117: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun118(<4 x double> %val1, <4 x double> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun118: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun119(<4 x double> %val1, <4 x double> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun119: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <8 x i8> @fun120(<8 x float> %val1, <8 x float> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun120: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: larl %r1, .LCPI120_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun121(<8 x float> %val1, <8 x float> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun121: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun122(<8 x float> %val1, <8 x float> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun122: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun123(<8 x float> %val1, <8 x float> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun123: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun124(<8 x float> %val1, <8 x float> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun124: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun125(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun125: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun126(<8 x double> %val1, <8 x double> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun126: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v26, %v27 +; CHECK-NEXT: vfchdb %v2, %v24, %v25 +; CHECK-NEXT: larl %r1, .LCPI126_0 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vlrepg %v1, 168(%r15) +; CHECK-NEXT: vlrepg %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun127(<8 x double> %val1, <8 x double> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun127: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v26, %v27 +; CHECK-NEXT: vfchdb %v2, %v24, %v25 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun128(<8 x double> %val1, <8 x double> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun128: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vfchdb %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun129(<8 x double> %val1, <8 x double> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun129: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun130(<8 x double> %val1, <8 x double> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun130: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vfchdb %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun131(<8 x double> %val1, <8 x double> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun131: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <16 x i8> @fun132(<16 x float> %val1, <16 x float> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun132: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrhf %v4, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vmrlf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v25, %v25 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun133(<16 x float> %val1, <16 x float> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun133: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun134(<16 x float> %val1, <16 x float> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun134: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun135(<16 x float> %val1, <16 x float> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun135: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vpkg %v1, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrhf %v5, %v28, %v28 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v0 +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vmrlf %v3, %v29, %v29 +; CHECK-NEXT: vmrlf %v4, %v28, %v28 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vmrlf %v4, %v31, %v31 +; CHECK-NEXT: vmrlf %v5, %v30, %v30 +; CHECK-NEXT: vmrhf %v6, %v30, %v30 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v31, %v31 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun136(<16 x float> %val1, <16 x float> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun136: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun137(<16 x float> %val1, <16 x float> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun137: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vpkg %v1, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrhf %v5, %v28, %v28 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v0 +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vmrlf %v3, %v29, %v29 +; CHECK-NEXT: vmrlf %v4, %v28, %v28 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vmrlf %v4, %v31, %v31 +; CHECK-NEXT: vmrlf %v5, %v30, %v30 +; CHECK-NEXT: vmrhf %v6, %v30, %v30 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v31, %v31 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun138(<16 x double> %val1, <16 x double> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun138: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v30, %v1 +; CHECK-NEXT: vfchdb %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v26, %v2 +; CHECK-NEXT: vfchdb %v3, %v24, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun139(<16 x double> %val1, <16 x double> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun139: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v26, %v1 +; CHECK-NEXT: vfchdb %v2, %v24, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun140(<16 x double> %val1, <16 x double> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun140: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vfchdb %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun141(<16 x double> %val1, <16 x double> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun141: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun142(<16 x double> %val1, <16 x double> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun142: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vfchdb %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun143(<16 x double> %val1, <16 x double> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun143: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + Index: test/CodeGen/X86/2011-10-19-widen_vselect.ll =================================================================== --- test/CodeGen/X86/2011-10-19-widen_vselect.ll +++ test/CodeGen/X86/2011-10-19-widen_vselect.ll @@ -27,7 +27,6 @@ ; X32: # BB#0: # %entry ; X32-NEXT: movaps %xmm0, %xmm2 ; X32-NEXT: cmpordps %xmm0, %xmm0 -; X32-NEXT: pslld $31, %xmm0 ; X32-NEXT: blendvps %xmm0, %xmm2, %xmm1 ; X32-NEXT: extractps $1, %xmm1, (%eax) ; X32-NEXT: movss %xmm1, (%eax) @@ -37,7 +36,6 @@ ; X64: # BB#0: # %entry ; X64-NEXT: movaps %xmm0, %xmm2 ; X64-NEXT: cmpordps %xmm0, %xmm0 -; X64-NEXT: pslld $31, %xmm0 ; X64-NEXT: blendvps %xmm0, %xmm2, %xmm1 ; X64-NEXT: movlps %xmm1, (%rax) ; X64-NEXT: retq @@ -78,7 +76,6 @@ ; X32-NEXT: cvtdq2ps %xmm0, %xmm1 ; X32-NEXT: xorps %xmm0, %xmm0 ; X32-NEXT: cmpltps %xmm2, %xmm0 -; X32-NEXT: pslld $31, %xmm0 ; X32-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u> ; X32-NEXT: addps %xmm1, %xmm3 ; X32-NEXT: movaps %xmm1, %xmm4 Index: test/CodeGen/X86/2011-10-21-widen-cmp.ll =================================================================== --- test/CodeGen/X86/2011-10-21-widen-cmp.ll +++ test/CodeGen/X86/2011-10-21-widen-cmp.ll @@ -9,7 +9,6 @@ ; CHECK: # BB#0: # %entry ; CHECK-NEXT: movaps %xmm0, %xmm2 ; CHECK-NEXT: cmpordps %xmm0, %xmm0 -; CHECK-NEXT: pslld $31, %xmm0 ; CHECK-NEXT: blendvps %xmm0, %xmm2, %xmm1 ; CHECK-NEXT: movlps %xmm1, (%rax) ; CHECK-NEXT: retq Index: test/CodeGen/X86/psubus.ll =================================================================== --- test/CodeGen/X86/psubus.ll +++ test/CodeGen/X86/psubus.ll @@ -542,8 +542,6 @@ ; SSE2-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm3[0] -; SSE2-NEXT: psllw $15, %xmm4 -; SSE2-NEXT: psraw $15, %xmm4 ; SSE2-NEXT: psubd %xmm2, %xmm1 ; SSE2-NEXT: pslld $16, %xmm0 ; SSE2-NEXT: psrad $16, %xmm0 @@ -577,8 +575,6 @@ ; SSSE3-NEXT: pcmpgtd %xmm4, %xmm6 ; SSSE3-NEXT: pshufb %xmm5, %xmm6 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm3[0] -; SSSE3-NEXT: psllw $15, %xmm6 -; SSSE3-NEXT: psraw $15, %xmm6 ; SSSE3-NEXT: psubd %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm5, %xmm0 ; SSSE3-NEXT: pshufb %xmm5, %xmm1 @@ -648,145 +644,118 @@ define void @test14(i8* nocapture %head, i32* nocapture %w) nounwind { ; SSE2-LABEL: test14: ; SSE2: ## BB#0: ## %vector.ph -; SSE2-NEXT: movdqu (%rdi), %xmm1 +; SSE2-NEXT: movdqu (%rdi), %xmm0 ; SSE2-NEXT: movdqu (%rsi), %xmm8 ; SSE2-NEXT: movdqu 16(%rsi), %xmm9 ; SSE2-NEXT: movdqu 32(%rsi), %xmm10 -; SSE2-NEXT: movdqu 48(%rsi), %xmm6 -; SSE2-NEXT: pxor %xmm11, %xmm11 -; SSE2-NEXT: movdqa %xmm1, %xmm0 -; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm11[0],xmm0[1],xmm11[1],xmm0[2],xmm11[2],xmm0[3],xmm11[3],xmm0[4],xmm11[4],xmm0[5],xmm11[5],xmm0[6],xmm11[6],xmm0[7],xmm11[7] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm11[0],xmm3[1],xmm11[1],xmm3[2],xmm11[2],xmm3[3],xmm11[3] -; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm11[4],xmm0[5],xmm11[5],xmm0[6],xmm11[6],xmm0[7],xmm11[7] -; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm11[8],xmm1[9],xmm11[9],xmm1[10],xmm11[10],xmm1[11],xmm11[11],xmm1[12],xmm11[12],xmm1[13],xmm11[13],xmm1[14],xmm11[14],xmm1[15],xmm11[15] -; SSE2-NEXT: movdqa %xmm1, %xmm5 -; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3] -; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm11[4],xmm1[5],xmm11[5],xmm1[6],xmm11[6],xmm1[7],xmm11[7] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm1, %xmm7 -; SSE2-NEXT: psubd %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm4, %xmm6 -; SSE2-NEXT: pxor %xmm4, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm7, %xmm6 -; SSE2-NEXT: pshuflw {{.*#+}} xmm6 = xmm6[0,2,2,3,4,5,6,7] -; SSE2-NEXT: pshufhw {{.*#+}} xmm6 = xmm6[0,1,2,3,4,6,6,7] -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3] -; SSE2-NEXT: movdqa %xmm5, %xmm7 -; SSE2-NEXT: psubd %xmm10, %xmm5 -; SSE2-NEXT: pxor %xmm4, %xmm10 -; SSE2-NEXT: pxor %xmm4, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm7, %xmm10 -; SSE2-NEXT: pshuflw {{.*#+}} xmm7 = xmm10[0,2,2,3,4,5,6,7] -; SSE2-NEXT: pshufhw {{.*#+}} xmm7 = xmm7[0,1,2,3,4,6,6,7] -; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[0,2,2,3] -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0] -; SSE2-NEXT: psllw $15, %xmm7 -; SSE2-NEXT: psraw $15, %xmm7 -; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [255,255,255,255,255,255,255,255] -; SSE2-NEXT: pand %xmm10, %xmm7 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: psubd %xmm9, %xmm0 -; SSE2-NEXT: pxor %xmm4, %xmm9 -; SSE2-NEXT: pxor %xmm4, %xmm2 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm9 -; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm9[0,2,2,3,4,5,6,7] -; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7] -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] -; SSE2-NEXT: movdqa %xmm8, %xmm6 -; SSE2-NEXT: pxor %xmm4, %xmm6 +; SSE2-NEXT: movdqu 48(%rsi), %xmm7 +; SSE2-NEXT: pxor %xmm3, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm1 +; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] +; SSE2-NEXT: movdqa %xmm1, %xmm2 +; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] +; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] +; SSE2-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm3[8],xmm0[9],xmm3[9],xmm0[10],xmm3[10],xmm0[11],xmm3[11],xmm0[12],xmm3[12],xmm0[13],xmm3[13],xmm0[14],xmm3[14],xmm0[15],xmm3[15] +; SSE2-NEXT: movdqa %xmm0, %xmm6 +; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3] +; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648] +; SSE2-NEXT: movdqa %xmm0, %xmm5 +; SSE2-NEXT: psubd %xmm7, %xmm0 +; SSE2-NEXT: pxor %xmm3, %xmm7 +; SSE2-NEXT: pxor %xmm3, %xmm5 +; SSE2-NEXT: pcmpgtd %xmm5, %xmm7 +; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [255,255,255,255] +; SSE2-NEXT: pand %xmm5, %xmm7 +; SSE2-NEXT: movdqa %xmm6, %xmm4 +; SSE2-NEXT: psubd %xmm10, %xmm6 +; SSE2-NEXT: pxor %xmm3, %xmm10 ; SSE2-NEXT: pxor %xmm3, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm4, %xmm6 -; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm6[0,2,2,3,4,5,6,7] -; SSE2-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7] -; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm2[0] -; SSE2-NEXT: psllw $15, %xmm4 -; SSE2-NEXT: psraw $15, %xmm4 -; SSE2-NEXT: pand %xmm10, %xmm4 -; SSE2-NEXT: packuswb %xmm7, %xmm4 -; SSE2-NEXT: psllw $7, %xmm4 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm4 -; SSE2-NEXT: pcmpgtb %xmm4, %xmm11 -; SSE2-NEXT: psubd %xmm8, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] -; SSE2-NEXT: pand %xmm2, %xmm1 -; SSE2-NEXT: pand %xmm2, %xmm5 -; SSE2-NEXT: packuswb %xmm1, %xmm5 -; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm2, %xmm3 -; SSE2-NEXT: packuswb %xmm0, %xmm3 -; SSE2-NEXT: packuswb %xmm5, %xmm3 -; SSE2-NEXT: pandn %xmm3, %xmm11 -; SSE2-NEXT: movdqu %xmm11, (%rdi) +; SSE2-NEXT: pcmpgtd %xmm4, %xmm10 +; SSE2-NEXT: pand %xmm5, %xmm10 +; SSE2-NEXT: packuswb %xmm7, %xmm10 +; SSE2-NEXT: movdqa %xmm1, %xmm4 +; SSE2-NEXT: psubd %xmm9, %xmm1 +; SSE2-NEXT: pxor %xmm3, %xmm9 +; SSE2-NEXT: pxor %xmm3, %xmm4 +; SSE2-NEXT: pcmpgtd %xmm4, %xmm9 +; SSE2-NEXT: pand %xmm5, %xmm9 +; SSE2-NEXT: movdqa %xmm8, %xmm4 +; SSE2-NEXT: pxor %xmm3, %xmm4 +; SSE2-NEXT: pxor %xmm2, %xmm3 +; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 +; SSE2-NEXT: pand %xmm5, %xmm4 +; SSE2-NEXT: packuswb %xmm9, %xmm4 +; SSE2-NEXT: packuswb %xmm10, %xmm4 +; SSE2-NEXT: psubd %xmm8, %xmm2 +; SSE2-NEXT: pand %xmm5, %xmm0 +; SSE2-NEXT: pand %xmm5, %xmm6 +; SSE2-NEXT: packuswb %xmm0, %xmm6 +; SSE2-NEXT: pand %xmm5, %xmm1 +; SSE2-NEXT: pand %xmm5, %xmm2 +; SSE2-NEXT: packuswb %xmm1, %xmm2 +; SSE2-NEXT: packuswb %xmm6, %xmm2 +; SSE2-NEXT: pandn %xmm2, %xmm4 +; SSE2-NEXT: movdqu %xmm4, (%rdi) ; SSE2-NEXT: retq ; ; SSSE3-LABEL: test14: ; SSSE3: ## BB#0: ## %vector.ph -; SSSE3-NEXT: movdqu (%rdi), %xmm1 +; SSSE3-NEXT: movdqu (%rdi), %xmm0 ; SSSE3-NEXT: movdqu (%rsi), %xmm8 ; SSSE3-NEXT: movdqu 16(%rsi), %xmm9 ; SSSE3-NEXT: movdqu 32(%rsi), %xmm10 -; SSSE3-NEXT: movdqu 48(%rsi), %xmm4 -; SSSE3-NEXT: pxor %xmm0, %xmm0 +; SSSE3-NEXT: movdqu 48(%rsi), %xmm7 +; SSSE3-NEXT: pxor %xmm3, %xmm3 +; SSSE3-NEXT: movdqa %xmm0, %xmm1 +; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] ; SSSE3-NEXT: movdqa %xmm1, %xmm2 -; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] -; SSSE3-NEXT: movdqa %xmm2, %xmm3 -; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] -; SSSE3-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] -; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] -; SSSE3-NEXT: movdqa %xmm1, %xmm7 -; SSSE3-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm0[0],xmm7[1],xmm0[1],xmm7[2],xmm0[2],xmm7[3],xmm0[3] -; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] -; SSSE3-NEXT: movdqa {{.*#+}} xmm6 = [2147483648,2147483648,2147483648,2147483648] -; SSSE3-NEXT: movdqa %xmm1, %xmm5 -; SSSE3-NEXT: psubd %xmm4, %xmm1 -; SSSE3-NEXT: pxor %xmm6, %xmm4 -; SSSE3-NEXT: pxor %xmm6, %xmm5 -; SSSE3-NEXT: pcmpgtd %xmm5, %xmm4 -; SSSE3-NEXT: movdqa {{.*#+}} xmm11 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] -; SSSE3-NEXT: pshufb %xmm11, %xmm4 -; SSSE3-NEXT: movdqa %xmm7, %xmm5 -; SSSE3-NEXT: psubd %xmm10, %xmm7 -; SSSE3-NEXT: pxor %xmm6, %xmm10 -; SSSE3-NEXT: pxor %xmm6, %xmm5 -; SSSE3-NEXT: pcmpgtd %xmm5, %xmm10 -; SSSE3-NEXT: pshufb %xmm11, %xmm10 -; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm10 = xmm10[0],xmm4[0] -; SSSE3-NEXT: psllw $15, %xmm10 -; SSSE3-NEXT: psraw $15, %xmm10 -; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> -; SSSE3-NEXT: pshufb %xmm4, %xmm10 -; SSSE3-NEXT: movdqa %xmm2, %xmm5 -; SSSE3-NEXT: psubd %xmm9, %xmm2 -; SSSE3-NEXT: pxor %xmm6, %xmm9 -; SSSE3-NEXT: pxor %xmm6, %xmm5 -; SSSE3-NEXT: pcmpgtd %xmm5, %xmm9 -; SSSE3-NEXT: pshufb %xmm11, %xmm9 +; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] +; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] +; SSSE3-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm3[8],xmm0[9],xmm3[9],xmm0[10],xmm3[10],xmm0[11],xmm3[11],xmm0[12],xmm3[12],xmm0[13],xmm3[13],xmm0[14],xmm3[14],xmm0[15],xmm3[15] +; SSSE3-NEXT: movdqa %xmm0, %xmm6 +; SSSE3-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3] +; SSSE3-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] +; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648] +; SSSE3-NEXT: movdqa %xmm0, %xmm5 +; SSSE3-NEXT: psubd %xmm7, %xmm0 +; SSSE3-NEXT: pxor %xmm3, %xmm7 +; SSSE3-NEXT: pxor %xmm3, %xmm5 +; SSSE3-NEXT: pcmpgtd %xmm5, %xmm7 +; SSSE3-NEXT: movdqa {{.*#+}} xmm5 = +; SSSE3-NEXT: pshufb %xmm5, %xmm7 +; SSSE3-NEXT: movdqa %xmm6, %xmm4 +; SSSE3-NEXT: psubd %xmm10, %xmm6 +; SSSE3-NEXT: pxor %xmm3, %xmm10 +; SSSE3-NEXT: pxor %xmm3, %xmm4 +; SSSE3-NEXT: pcmpgtd %xmm4, %xmm10 +; SSSE3-NEXT: pshufb %xmm5, %xmm10 +; SSSE3-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm7[0],xmm10[1],xmm7[1] +; SSSE3-NEXT: movdqa %xmm1, %xmm4 +; SSSE3-NEXT: psubd %xmm9, %xmm1 +; SSSE3-NEXT: pxor %xmm3, %xmm9 +; SSSE3-NEXT: pxor %xmm3, %xmm4 +; SSSE3-NEXT: pcmpgtd %xmm4, %xmm9 +; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> +; SSSE3-NEXT: pshufb %xmm4, %xmm9 ; SSSE3-NEXT: movdqa %xmm8, %xmm5 -; SSSE3-NEXT: pxor %xmm6, %xmm5 -; SSSE3-NEXT: pxor %xmm3, %xmm6 -; SSSE3-NEXT: pcmpgtd %xmm6, %xmm5 -; SSSE3-NEXT: pshufb %xmm11, %xmm5 -; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm9[0] -; SSSE3-NEXT: psllw $15, %xmm5 -; SSSE3-NEXT: psraw $15, %xmm5 +; SSSE3-NEXT: pxor %xmm3, %xmm5 +; SSSE3-NEXT: pxor %xmm2, %xmm3 +; SSSE3-NEXT: pcmpgtd %xmm3, %xmm5 ; SSSE3-NEXT: pshufb %xmm4, %xmm5 -; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm10[0] -; SSSE3-NEXT: psllw $7, %xmm5 -; SSSE3-NEXT: pand {{.*}}(%rip), %xmm5 -; SSSE3-NEXT: pcmpgtb %xmm5, %xmm0 -; SSSE3-NEXT: psubd %xmm8, %xmm3 -; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] -; SSSE3-NEXT: pand %xmm4, %xmm1 -; SSSE3-NEXT: pand %xmm4, %xmm7 -; SSSE3-NEXT: packuswb %xmm1, %xmm7 -; SSSE3-NEXT: pand %xmm4, %xmm2 -; SSSE3-NEXT: pand %xmm4, %xmm3 -; SSSE3-NEXT: packuswb %xmm2, %xmm3 -; SSSE3-NEXT: packuswb %xmm7, %xmm3 -; SSSE3-NEXT: pandn %xmm3, %xmm0 -; SSSE3-NEXT: movdqu %xmm0, (%rdi) +; SSSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1] +; SSSE3-NEXT: movsd {{.*#+}} xmm10 = xmm5[0],xmm10[1] +; SSSE3-NEXT: psubd %xmm8, %xmm2 +; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] +; SSSE3-NEXT: pand %xmm3, %xmm0 +; SSSE3-NEXT: pand %xmm3, %xmm6 +; SSSE3-NEXT: packuswb %xmm0, %xmm6 +; SSSE3-NEXT: pand %xmm3, %xmm1 +; SSSE3-NEXT: pand %xmm3, %xmm2 +; SSSE3-NEXT: packuswb %xmm1, %xmm2 +; SSSE3-NEXT: packuswb %xmm6, %xmm2 +; SSSE3-NEXT: andnpd %xmm2, %xmm10 +; SSSE3-NEXT: movupd %xmm10, (%rdi) ; SSSE3-NEXT: retq ; ; AVX1-LABEL: test14: @@ -805,23 +774,18 @@ ; AVX1-NEXT: vpxor %xmm6, %xmm10, %xmm7 ; AVX1-NEXT: vpxor %xmm6, %xmm1, %xmm4 ; AVX1-NEXT: vpcmpgtd %xmm7, %xmm4, %xmm4 -; AVX1-NEXT: vpacksswb %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm11 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> -; AVX1-NEXT: vpshufb %xmm11, %xmm3, %xmm12 -; AVX1-NEXT: vpxor %xmm6, %xmm9, %xmm7 -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; AVX1-NEXT: vpxor %xmm6, %xmm4, %xmm3 -; AVX1-NEXT: vpcmpgtd %xmm7, %xmm3, %xmm3 -; AVX1-NEXT: vpxor %xmm6, %xmm8, %xmm7 +; AVX1-NEXT: vpacksswb %xmm3, %xmm4, %xmm11 +; AVX1-NEXT: vpxor %xmm6, %xmm9, %xmm4 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm7 +; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm3 +; AVX1-NEXT: vpcmpgtd %xmm4, %xmm3, %xmm3 +; AVX1-NEXT: vpxor %xmm6, %xmm8, %xmm4 ; AVX1-NEXT: vpxor %xmm6, %xmm0, %xmm6 -; AVX1-NEXT: vpcmpgtd %xmm7, %xmm6, %xmm6 -; AVX1-NEXT: vpacksswb %xmm3, %xmm6, %xmm3 -; AVX1-NEXT: vpshufb %xmm11, %xmm3, %xmm3 -; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm12[0] -; AVX1-NEXT: vpsllw $7, %xmm3, %xmm3 -; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3 +; AVX1-NEXT: vpcmpgtd %xmm4, %xmm6, %xmm4 +; AVX1-NEXT: vpacksswb %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vpacksswb %xmm11, %xmm3, %xmm3 ; AVX1-NEXT: vpsubd %xmm0, %xmm8, %xmm0 -; AVX1-NEXT: vpsubd %xmm4, %xmm9, %xmm4 +; AVX1-NEXT: vpsubd %xmm7, %xmm9, %xmm4 ; AVX1-NEXT: vpsubd %xmm1, %xmm10, %xmm1 ; AVX1-NEXT: vpsubd %xmm2, %xmm5, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] @@ -850,26 +814,22 @@ ; AVX2-NEXT: vpcmpgtd %ymm5, %ymm6, %ymm5 ; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm6 ; AVX2-NEXT: vpacksswb %xmm6, %xmm5, %xmm5 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm6 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> -; AVX2-NEXT: vpshufb %xmm6, %xmm5, %xmm5 -; AVX2-NEXT: vpxor %ymm4, %ymm2, %ymm7 +; AVX2-NEXT: vpxor %ymm4, %ymm2, %ymm6 ; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm4 -; AVX2-NEXT: vpcmpgtd %ymm7, %ymm4, %ymm4 -; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm7 -; AVX2-NEXT: vpacksswb %xmm7, %xmm4, %xmm4 -; AVX2-NEXT: vpshufb %xmm6, %xmm4, %xmm4 -; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0] -; AVX2-NEXT: vpsllw $7, %xmm4, %xmm4 -; AVX2-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4 +; AVX2-NEXT: vpcmpgtd %ymm6, %ymm4, %ymm4 +; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm6 +; AVX2-NEXT: vpacksswb %xmm6, %xmm4, %xmm4 +; AVX2-NEXT: vpacksswb %xmm5, %xmm4, %xmm4 ; AVX2-NEXT: vpsubd %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: vpsubd %ymm1, %ymm3, %ymm1 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] ; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] -; AVX2-NEXT: vpshufb %xmm6, %xmm1, %xmm1 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> +; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 ; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] -; AVX2-NEXT: vpshufb %xmm6, %xmm0, %xmm0 +; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 ; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX2-NEXT: vpblendvb %xmm4, %xmm1, %xmm0, %xmm0 @@ -919,8 +879,6 @@ ; SSE2-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm3[0] -; SSE2-NEXT: psllw $15, %xmm4 -; SSE2-NEXT: psraw $15, %xmm4 ; SSE2-NEXT: psubd %xmm2, %xmm1 ; SSE2-NEXT: pslld $16, %xmm0 ; SSE2-NEXT: psrad $16, %xmm0 @@ -954,8 +912,6 @@ ; SSSE3-NEXT: pcmpgtd %xmm6, %xmm3 ; SSSE3-NEXT: pshufb %xmm4, %xmm3 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0] -; SSSE3-NEXT: psllw $15, %xmm3 -; SSSE3-NEXT: psraw $15, %xmm3 ; SSSE3-NEXT: psubd %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm4, %xmm0 ; SSSE3-NEXT: pshufb %xmm4, %xmm1 @@ -1049,8 +1005,6 @@ ; SSE2-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm3[0] -; SSE2-NEXT: psllw $15, %xmm4 -; SSE2-NEXT: psraw $15, %xmm4 ; SSE2-NEXT: psubd %xmm2, %xmm1 ; SSE2-NEXT: pslld $16, %xmm0 ; SSE2-NEXT: psrad $16, %xmm0 @@ -1084,8 +1038,6 @@ ; SSSE3-NEXT: pcmpgtd %xmm6, %xmm3 ; SSSE3-NEXT: pshufb %xmm4, %xmm3 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0] -; SSSE3-NEXT: psllw $15, %xmm3 -; SSSE3-NEXT: psraw $15, %xmm3 ; SSSE3-NEXT: psubd %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm4, %xmm0 ; SSSE3-NEXT: pshufb %xmm4, %xmm1 Index: test/CodeGen/X86/vselect-pcmp.ll =================================================================== --- test/CodeGen/X86/vselect-pcmp.ll +++ test/CodeGen/X86/vselect-pcmp.ll @@ -247,8 +247,6 @@ define <4 x double> @signbit_sel_v4f64_small_mask(<4 x double> %x, <4 x double> %y, <4 x i32> %mask) { ; AVX1-LABEL: signbit_sel_v4f64_small_mask: ; AVX1: # BB#0: -; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpmovsxdq %xmm2, %xmm3 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; AVX1-NEXT: vpmovsxdq %xmm2, %xmm2 Index: utils/update_llc_test_checks.py =================================================================== --- utils/update_llc_test_checks.py +++ utils/update_llc_test_checks.py @@ -68,6 +68,13 @@ r'.Lfunc_end[0-9]+:\n', flags=(re.M | re.S)) +ASM_FUNCTION_SYSTEMZ_RE = re.compile( + r'^_?(?P[^:]+):[ \t]*#+[ \t]*@(?P=func)\n' + r'[ \t]+.cfi_startproc\n' + r'(?P.*?)\n' + r'.Lfunc_end[0-9]+:\n', + flags=(re.M | re.S)) + def scrub_asm_x86(asm): # Scrub runs of whitespace out of the assembly, but leave the leading @@ -111,6 +118,16 @@ asm = SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm) return asm +def scrub_asm_systemz(asm): + # Scrub runs of whitespace out of the assembly, but leave the leading + # whitespace in place. + asm = SCRUB_WHITESPACE_RE.sub(r' ', asm) + # Expand the tabs used for indentation. + asm = string.expandtabs(asm, 2) + # Strip trailing whitespace. + asm = SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm) + return asm + # Build up a dictionary of all the function bodies. def build_function_body_dictionary(raw_tool_output, triple, prefixes, func_dict, @@ -125,6 +142,7 @@ 'thumbv8-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'armeb-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'powerpc64le': (scrub_asm_powerpc64le, ASM_FUNCTION_PPC_RE), + 's390x': (scrub_asm_systemz, ASM_FUNCTION_SYSTEMZ_RE), } handlers = None for prefix, s in target_handlers.items():