Index: include/llvm/ADT/Triple.h =================================================================== --- include/llvm/ADT/Triple.h +++ include/llvm/ADT/Triple.h @@ -110,6 +110,7 @@ ARMSubArch_v7m, ARMSubArch_v7s, ARMSubArch_v7k, + ARMSubArch_v7ve, ARMSubArch_v6, ARMSubArch_v6m, ARMSubArch_v6k, Index: include/llvm/Support/ARMTargetParser.def =================================================================== --- include/llvm/Support/ARMTargetParser.def +++ include/llvm/Support/ARMTargetParser.def @@ -82,6 +82,9 @@ FK_NONE, ARM::AEK_HWDIV) ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M, FK_NONE, (ARM::AEK_HWDIV | ARM::AEK_DSP)) +ARM_ARCH("armv7ve", AK_ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7, + FK_NEON, (ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | + ARM::AEK_DSP)) ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | Index: lib/Support/TargetParser.cpp =================================================================== --- lib/Support/TargetParser.cpp +++ lib/Support/TargetParser.cpp @@ -725,6 +725,7 @@ case ARM::AK_ARMV8R: return ARM::PK_R; case ARM::AK_ARMV7A: + case ARM::AK_ARMV7VE: case ARM::AK_ARMV7K: case ARM::AK_ARMV8A: case ARM::AK_ARMV8_1A: @@ -766,6 +767,7 @@ case ARM::AK_ARMV7S: case ARM::AK_ARMV7EM: case ARM::AK_ARMV7K: + case ARM::AK_ARMV7VE: return 7; case ARM::AK_ARMV8A: case ARM::AK_ARMV8_1A: Index: lib/Support/Triple.cpp =================================================================== --- lib/Support/Triple.cpp +++ lib/Support/Triple.cpp @@ -559,6 +559,8 @@ return Triple::ARMSubArch_v7s; case ARM::AK_ARMV7EM: return Triple::ARMSubArch_v7em; + case ARM::AK_ARMV7VE: + return Triple::ARMSubArch_v7ve; case ARM::AK_ARMV8A: return Triple::ARMSubArch_v8; case ARM::AK_ARMV8_1A: Index: lib/Target/ARM/ARM.td =================================================================== --- lib/Target/ARM/ARM.td +++ lib/Target/ARM/ARM.td @@ -441,6 +441,16 @@ FeatureDSP, FeatureT2XtPk]>; +def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops, + FeatureNEON, + FeatureDB, + FeatureDSP, + FeatureHWDiv, + FeatureHWDivARM, + FeatureVirtualization, + FeatureAClass, + FeatureT2XtPk]>; + def ARMv8a : Architecture<"armv8-a", "ARMv8a", [HasV8Ops, FeatureAClass, FeatureDB, Index: lib/Target/ARM/ARMSubtarget.h =================================================================== --- lib/Target/ARM/ARMSubtarget.h +++ lib/Target/ARM/ARMSubtarget.h @@ -52,8 +52,8 @@ enum ARMArchEnum { ARMv2, ARMv2a, ARMv3, ARMv3m, ARMv4, ARMv4t, ARMv5, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6k, ARMv6kz, ARMv6t2, ARMv6m, ARMv6sm, ARMv7a, ARMv7r, - ARMv7m, ARMv7em, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline, ARMv8mBaseline, - ARMv8r + ARMv7m, ARMv7em, ARMv7ve, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline, + ARMv8mBaseline, ARMv8r }; public: Index: test/CodeGen/ARM/div.ll =================================================================== --- test/CodeGen/ARM/div.ll +++ test/CodeGen/ARM/div.ll @@ -10,12 +10,18 @@ ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 | \ ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-EABI +; RUN: llc < %s -mtriple=armv7ve-apple-ios | \ +; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV +; RUN: llc < %s -mtriple=thumbv7ve-apple-ios | \ +; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \ +; RUN: -check-prefix=CHECK-THUMB define i32 @f1(i32 %a, i32 %b) { entry: ; CHECK-LABEL: f1 ; CHECK-SWDIV: __divsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: sdiv ; CHECK-EABI: __aeabi_idiv @@ -28,6 +34,7 @@ ; CHECK-LABEL: f2 ; CHECK-SWDIV: __udivsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: udiv ; CHECK-EABI: __aeabi_uidiv @@ -40,6 +47,7 @@ ; CHECK-LABEL: f3 ; CHECK-SWDIV: __modsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: sdiv ; CHECK-HWDIV: mls @@ -55,6 +63,7 @@ ; CHECK-LABEL: f4 ; CHECK-SWDIV: __umodsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: udiv ; CHECK-HWDIV: mls Index: unittests/Support/TargetParserTest.cpp =================================================================== --- unittests/Support/TargetParserTest.cpp +++ unittests/Support/TargetParserTest.cpp @@ -17,17 +17,17 @@ namespace { const char *ARMArch[] = { - "armv2", "armv2a", "armv3", "armv3m", "armv4", - "armv4t", "armv5", "armv5t", "armv5e", "armv5te", - "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl", - "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m", - "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7", - "armv7a", "armv7hl", "armv7l", "armv7-r", "armv7r", - "armv7-m", "armv7m", "armv7k", "armv7s", "armv7e-m", - "armv7em", "armv8-a", "armv8", "armv8a", "armv8.1-a", - "armv8.1a", "armv8.2-a", "armv8.2a", "armv8-r", "armv8r", - "armv8-m.base", "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt", - "iwmmxt2", "xscale"}; + "armv2", "armv2a", "armv3", "armv3m", "armv4", + "armv4t", "armv5", "armv5t", "armv5e", "armv5te", + "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl", + "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m", + "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7", + "armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r", + "armv7r", "armv7-m", "armv7m", "armv7k", "armv7s", + "armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a", + "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a", "armv8-r", + "armv8r", "armv8-m.base", "armv8m.base", "armv8-m.main", "armv8m.main", + "iwmmxt", "iwmmxt2", "xscale"}; bool testARMCPU(StringRef CPUName, StringRef ExpectedArch, StringRef ExpectedFPU, unsigned ExpectedFlags, @@ -356,6 +356,9 @@ EXPECT_TRUE( testARMArch("armv7k", "generic", "v7k", ARMBuildAttrs::CPUArch::v7)); + EXPECT_TRUE( + testARMArch("armv7ve", "generic", "v7ve", + ARMBuildAttrs::CPUArch::v7)); } bool testARMExtension(StringRef CPUName, unsigned ArchKind, StringRef ArchExt) { @@ -502,12 +505,12 @@ TEST(TargetParserTest, ARMparseArchEndianAndISA) { const char *Arch[] = { - "v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t", - "v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2", - "v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a", - "v7", "v7a", "v7hl", "v7l", "v7-r", "v7r", "v7-m", "v7m", - "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a", "v8.1-a", - "v8.1a", "v8.2-a", "v8.2a", "v8-r"}; + "v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t", + "v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2", + "v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a", + "v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m", + "v7m", "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a", + "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8-r"}; for (unsigned i = 0; i < array_lengthof(Arch); i++) { std::string arm_1 = "armeb" + (std::string)(Arch[i]); @@ -559,6 +562,7 @@ EXPECT_EQ(ARM::PK_R, ARM::parseArchProfile(ARMArch[i])); continue; case ARM::AK_ARMV7A: + case ARM::AK_ARMV7VE: case ARM::AK_ARMV7K: case ARM::AK_ARMV8A: case ARM::AK_ARMV8_1A: